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nickdesaulniersgregkh
nickdesaulniers
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gregkh
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hexagon: parenthesize registers in asm predicates
[ Upstream commit 780a0cf ] Hexagon requires that register predicates in assembly be parenthesized. Link: ClangBuiltLinux/linux#754 Link: http://lkml.kernel.org/r/20191209222956.239798-3-ndesaulniers@google.com Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Suggested-by: Sid Manning <sidneym@codeaurora.org> Acked-by: Brian Cain <bcain@codeaurora.org> Cc: Lee Jones <lee.jones@linaro.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Tuowen Zhao <ztuowen@gmail.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Luis Chamberlain <mcgrof@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Alexios Zavras <alexios.zavras@intel.com> Cc: Allison Randal <allison@lohutok.net> Cc: Will Deacon <will@kernel.org> Cc: Richard Fontana <rfontana@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
1 parent 3bc95f5 commit 93814de

6 files changed

Lines changed: 23 additions & 23 deletions

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‎arch/hexagon/include/asm/atomic.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ static inline void atomic_##op(int i, atomic_t *v) \
9191
"1: %0 = memw_locked(%1);\n" \
9292
" %0 = "#op "(%0,%2);\n" \
9393
" memw_locked(%1,P3)=%0;\n" \
94-
" if !P3 jump 1b;\n" \
94+
" if (!P3) jump 1b;\n" \
9595
: "=&r" (output) \
9696
: "r" (&v->counter), "r" (i) \
9797
: "memory", "p3" \
@@ -107,7 +107,7 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
107107
"1: %0 = memw_locked(%1);\n" \
108108
" %0 = "#op "(%0,%2);\n" \
109109
" memw_locked(%1,P3)=%0;\n" \
110-
" if !P3 jump 1b;\n" \
110+
" if (!P3) jump 1b;\n" \
111111
: "=&r" (output) \
112112
: "r" (&v->counter), "r" (i) \
113113
: "memory", "p3" \
@@ -124,7 +124,7 @@ static inline int atomic_fetch_##op(int i, atomic_t *v) \
124124
"1: %0 = memw_locked(%2);\n" \
125125
" %1 = "#op "(%0,%3);\n" \
126126
" memw_locked(%2,P3)=%1;\n" \
127-
" if !P3 jump 1b;\n" \
127+
" if (!P3) jump 1b;\n" \
128128
: "=&r" (output), "=&r" (val) \
129129
: "r" (&v->counter), "r" (i) \
130130
: "memory", "p3" \
@@ -173,7 +173,7 @@ static inline int atomic_fetch_add_unless(atomic_t *v, int a, int u)
173173
" }"
174174
" memw_locked(%2, p3) = %1;"
175175
" {"
176-
" if !p3 jump 1b;"
176+
" if (!p3) jump 1b;"
177177
" }"
178178
"2:"
179179
: "=&r" (__oldval), "=&r" (tmp)

‎arch/hexagon/include/asm/bitops.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ static inline int test_and_clear_bit(int nr, volatile void *addr)
3838
"1: R12 = memw_locked(R10);\n"
3939
" { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
4040
" memw_locked(R10,P1) = R12;\n"
41-
" {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
41+
" {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n"
4242
: "=&r" (oldval)
4343
: "r" (addr), "r" (nr)
4444
: "r10", "r11", "r12", "p0", "p1", "memory"
@@ -62,7 +62,7 @@ static inline int test_and_set_bit(int nr, volatile void *addr)
6262
"1: R12 = memw_locked(R10);\n"
6363
" { P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n"
6464
" memw_locked(R10,P1) = R12;\n"
65-
" {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
65+
" {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n"
6666
: "=&r" (oldval)
6767
: "r" (addr), "r" (nr)
6868
: "r10", "r11", "r12", "p0", "p1", "memory"
@@ -88,7 +88,7 @@ static inline int test_and_change_bit(int nr, volatile void *addr)
8888
"1: R12 = memw_locked(R10);\n"
8989
" { P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n"
9090
" memw_locked(R10,P1) = R12;\n"
91-
" {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
91+
" {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n"
9292
: "=&r" (oldval)
9393
: "r" (addr), "r" (nr)
9494
: "r10", "r11", "r12", "p0", "p1", "memory"
@@ -223,7 +223,7 @@ static inline int ffs(int x)
223223
int r;
224224

225225
asm("{ P0 = cmp.eq(%1,#0); %0 = ct0(%1);}\n"
226-
"{ if P0 %0 = #0; if !P0 %0 = add(%0,#1);}\n"
226+
"{ if (P0) %0 = #0; if (!P0) %0 = add(%0,#1);}\n"
227227
: "=&r" (r)
228228
: "r" (x)
229229
: "p0");

‎arch/hexagon/include/asm/cmpxchg.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
3030
__asm__ __volatile__ (
3131
"1: %0 = memw_locked(%1);\n" /* load into retval */
3232
" memw_locked(%1,P0) = %2;\n" /* store into memory */
33-
" if !P0 jump 1b;\n"
33+
" if (!P0) jump 1b;\n"
3434
: "=&r" (retval)
3535
: "r" (ptr), "r" (x)
3636
: "memory", "p0"

‎arch/hexagon/include/asm/futex.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
/* For example: %1 = %4 */ \
1717
insn \
1818
"2: memw_locked(%3,p2) = %1;\n" \
19-
" if !p2 jump 1b;\n" \
19+
" if (!p2) jump 1b;\n" \
2020
" %1 = #0;\n" \
2121
"3:\n" \
2222
".section .fixup,\"ax\"\n" \
@@ -84,10 +84,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval,
8484
"1: %1 = memw_locked(%3)\n"
8585
" {\n"
8686
" p2 = cmp.eq(%1,%4)\n"
87-
" if !p2.new jump:NT 3f\n"
87+
" if (!p2.new) jump:NT 3f\n"
8888
" }\n"
8989
"2: memw_locked(%3,p2) = %5\n"
90-
" if !p2 jump 1b\n"
90+
" if (!p2) jump 1b\n"
9191
"3:\n"
9292
".section .fixup,\"ax\"\n"
9393
"4: %0 = #%6\n"

‎arch/hexagon/include/asm/spinlock.h‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,9 @@ static inline void arch_read_lock(arch_rwlock_t *lock)
3030
__asm__ __volatile__(
3131
"1: R6 = memw_locked(%0);\n"
3232
" { P3 = cmp.ge(R6,#0); R6 = add(R6,#1);}\n"
33-
" { if !P3 jump 1b; }\n"
33+
" { if (!P3) jump 1b; }\n"
3434
" memw_locked(%0,P3) = R6;\n"
35-
" { if !P3 jump 1b; }\n"
35+
" { if (!P3) jump 1b; }\n"
3636
:
3737
: "r" (&lock->lock)
3838
: "memory", "r6", "p3"
@@ -46,7 +46,7 @@ static inline void arch_read_unlock(arch_rwlock_t *lock)
4646
"1: R6 = memw_locked(%0);\n"
4747
" R6 = add(R6,#-1);\n"
4848
" memw_locked(%0,P3) = R6\n"
49-
" if !P3 jump 1b;\n"
49+
" if (!P3) jump 1b;\n"
5050
:
5151
: "r" (&lock->lock)
5252
: "memory", "r6", "p3"
@@ -61,7 +61,7 @@ static inline int arch_read_trylock(arch_rwlock_t *lock)
6161
__asm__ __volatile__(
6262
" R6 = memw_locked(%1);\n"
6363
" { %0 = #0; P3 = cmp.ge(R6,#0); R6 = add(R6,#1);}\n"
64-
" { if !P3 jump 1f; }\n"
64+
" { if (!P3) jump 1f; }\n"
6565
" memw_locked(%1,P3) = R6;\n"
6666
" { %0 = P3 }\n"
6767
"1:\n"
@@ -78,9 +78,9 @@ static inline void arch_write_lock(arch_rwlock_t *lock)
7878
__asm__ __volatile__(
7979
"1: R6 = memw_locked(%0)\n"
8080
" { P3 = cmp.eq(R6,#0); R6 = #-1;}\n"
81-
" { if !P3 jump 1b; }\n"
81+
" { if (!P3) jump 1b; }\n"
8282
" memw_locked(%0,P3) = R6;\n"
83-
" { if !P3 jump 1b; }\n"
83+
" { if (!P3) jump 1b; }\n"
8484
:
8585
: "r" (&lock->lock)
8686
: "memory", "r6", "p3"
@@ -94,7 +94,7 @@ static inline int arch_write_trylock(arch_rwlock_t *lock)
9494
__asm__ __volatile__(
9595
" R6 = memw_locked(%1)\n"
9696
" { %0 = #0; P3 = cmp.eq(R6,#0); R6 = #-1;}\n"
97-
" { if !P3 jump 1f; }\n"
97+
" { if (!P3) jump 1f; }\n"
9898
" memw_locked(%1,P3) = R6;\n"
9999
" %0 = P3;\n"
100100
"1:\n"
@@ -117,9 +117,9 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
117117
__asm__ __volatile__(
118118
"1: R6 = memw_locked(%0);\n"
119119
" P3 = cmp.eq(R6,#0);\n"
120-
" { if !P3 jump 1b; R6 = #1; }\n"
120+
" { if (!P3) jump 1b; R6 = #1; }\n"
121121
" memw_locked(%0,P3) = R6;\n"
122-
" { if !P3 jump 1b; }\n"
122+
" { if (!P3) jump 1b; }\n"
123123
:
124124
: "r" (&lock->lock)
125125
: "memory", "r6", "p3"
@@ -139,7 +139,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
139139
__asm__ __volatile__(
140140
" R6 = memw_locked(%1);\n"
141141
" P3 = cmp.eq(R6,#0);\n"
142-
" { if !P3 jump 1f; R6 = #1; %0 = #0; }\n"
142+
" { if (!P3) jump 1f; R6 = #1; %0 = #0; }\n"
143143
" memw_locked(%1,P3) = R6;\n"
144144
" %0 = P3;\n"
145145
"1:\n"

‎arch/hexagon/kernel/vm_entry.S‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -369,7 +369,7 @@ ret_from_fork:
369369
R26.L = #LO(do_work_pending);
370370
R0 = #VM_INT_DISABLE;
371371
}
372-
if P0 jump check_work_pending
372+
if (P0) jump check_work_pending
373373
{
374374
R0 = R25;
375375
callr R24

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