drm: atmel-hlcdc: bypass LCDC pixel clock divider with LCDC generic clock

In SAM9X7 SoC where XLCDC IP is used, add support to bypass the LCDC pixel
clock divider when LCDC Generic clock is enabled and used to match
and drive the panel requested Pixel clock.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>

Author: manikandan-m11

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

@@ -163,8 +163,14 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
 
 			if (div_low >= 2 &&
 			    ((prate / div_low >= mode_rate) &&
-			     (prate / div < mode_rate)))
+			     (prate / div < mode_rate))) {
 				div = div_low;
+			} else {
+				if (is_xlcdc) {
+					cfg |= ATMEL_XLCDC_CLKBYP;
+					mask |= ATMEL_XLCDC_CLKBYP;
+				}
+			}
 		}
 		cfg |= ATMEL_HLCDC_CLKDIV(div);
 	}