@@ -368,6 +368,8 @@ static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
368368}
369369
370370static struct gpio_chip atmel_gpio_chip = {
371+ .request = gpiochip_generic_request ,
372+ .free = gpiochip_generic_free ,
371373 .direction_input = atmel_gpio_direction_input ,
372374 .get = atmel_gpio_get ,
373375 .direction_output = atmel_gpio_direction_output ,
@@ -655,11 +657,27 @@ static int atmel_pmx_set_mux(struct pinctrl_dev *pctldev,
655657 return 0 ;
656658}
657659
660+ static int atmel_pmx_gpio_request_enable (struct pinctrl_dev * pctldev ,
661+ struct pinctrl_gpio_range * range ,
662+ unsigned offset )
663+ {
664+ u32 conf ;
665+
666+ conf = atmel_pin_config_read (pctldev , offset );
667+ conf &= (~ATMEL_PIO_CFGR_FUNC_MASK );
668+ atmel_pin_config_write (pctldev , offset , conf );
669+
670+ dev_dbg (pctldev -> dev , "enable pin %u as GPIO\n" , offset );
671+
672+ return 0 ;
673+ }
674+
658675static const struct pinmux_ops atmel_pmxops = {
659676 .get_functions_count = atmel_pmx_get_functions_count ,
660677 .get_function_name = atmel_pmx_get_function_name ,
661678 .get_function_groups = atmel_pmx_get_function_groups ,
662679 .set_mux = atmel_pmx_set_mux ,
680+ .gpio_request_enable = atmel_pmx_gpio_request_enable ,
663681};
664682
665683static int atmel_conf_pin_config_group_get (struct pinctrl_dev * pctldev ,
@@ -923,7 +941,7 @@ static int __maybe_unused atmel_pctrl_resume(struct device *dev)
923941}
924942
925943static const struct dev_pm_ops atmel_pctrl_pm_ops = {
926- SET_SYSTEM_SLEEP_PM_OPS (atmel_pctrl_suspend , atmel_pctrl_resume )
944+ SET_LATE_SYSTEM_SLEEP_PM_OPS (atmel_pctrl_suspend , atmel_pctrl_resume )
927945};
928946
929947/*
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