clk: at91: sam9x60-pll: keep only one definition for register maps

Merge of stable branch brought dual definition of register map. Fix this
taking latest changes into account.
Avoids the following warning:
"drivers/clk/at91/clk-sam9x60-pll.c:39:
  warning: "PMC_PLL_CTRL1_MUL_MSK" redefined"

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Author: noglitch

drivers/clk/at91/clk-sam9x60-pll.c

@@ -22,7 +22,7 @@
 
 #define PMC_PLL_CTRL1	0x10
 #define		PMC_PLL_CTRL1_FRACR_MSK		GENMASK(21, 0)
-#define		PMC_PLL_CTRL1_MUL_MSK		GENMASK(30, 24)
+#define		PMC_PLL_CTRL1_MUL_MSK		GENMASK(31, 24)
 
 #define PMC_PLL_ACR	0x18
 #define		PMC_PLL_ACR_DEFAULT_UPLL	0x12020010UL
@@ -35,9 +35,6 @@
 #define		PMC_PLL_UPDT_UPDATE		BIT(8)
 
 #define PMC_PLL_ISR0	0xec
-#define	PMC_PLL_CTRL0_DIV_MSK	GENMASK(7, 0)
-#define	PMC_PLL_CTRL1_MUL_MSK	GENMASK(31, 24)
-#define	PMC_PLL_CTRL1_FRACR_MSK	GENMASK(21, 0)
 
 #define PLL_DIV_MAX		(FIELD_GET(PMC_PLL_CTRL0_DIV_MSK, UINT_MAX) + 1)
 #define UPLL_DIV		2