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clk: at91: utmi: set the mainck rate, mainline update
This is an update from the mainline as the SFR presency or not is better handled. Without it, it may cause issues on non SAMA5D2 devices Reported-by: Sergey Organov <sorganov@gmail.com>
1 parent ae1221b commit 66a98cc

1 file changed

Lines changed: 17 additions & 4 deletions

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drivers/clk/at91/clk-utmi.c

Lines changed: 17 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -173,10 +173,23 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
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if (IS_ERR(regmap_pmc))
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return;
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176-
/* SFR node missing is not necessarily an issue. */
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regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
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if (IS_ERR(regmap_sfr))
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regmap_sfr = NULL;
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/*
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* If the device supports different mainck rates, this value has to be
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* set in the UTMI Clock Trimming register.
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* - 9x5: mainck supports several rates but it is indicated that a
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* 12 MHz is needed in case of USB.
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* - sama5d3 and sama5d2: mainck supports several rates. Configuring
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* the FREQ field of the UTMI Clock Trimming register is mandatory.
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* - sama5d4: mainck is at 12 MHz.
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*
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* We only need to retrieve sama5d3 or sama5d2 sfr regmap.
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*/
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regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d3-sfr");
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if (IS_ERR(regmap_sfr)) {
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regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
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if (IS_ERR(regmap_sfr))
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regmap_sfr = NULL;
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}
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hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name);
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if (IS_ERR(hw))

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