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Merge branch 'stable/linux-4.14.y' into linux-4.14-at91
2 parents 504e35d + 1244bbb commit 442c540

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Lines changed: 2276 additions & 1683 deletions

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‎Documentation/networking/ip-sysctl.txt‎

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@@ -133,14 +133,11 @@ min_adv_mss - INTEGER
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IP Fragmentation:
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ipfrag_high_thresh - INTEGER
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Maximum memory used to reassemble IP fragments. When
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ipfrag_high_thresh bytes of memory is allocated for this purpose,
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the fragment handler will toss packets until ipfrag_low_thresh
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is reached. This also serves as a maximum limit to namespaces
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different from the initial one.
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ipfrag_low_thresh - INTEGER
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ipfrag_high_thresh - LONG INTEGER
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Maximum memory used to reassemble IP fragments.
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ipfrag_low_thresh - LONG INTEGER
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(Obsolete since linux-4.17)
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Maximum memory used to reassemble IP fragments before the kernel
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begins to remove incomplete fragment queues to free up resources.
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The kernel still accepts new fragments for defragmentation.

‎Makefile‎

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@@ -1,8 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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PATCHLEVEL = 14
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SUBLEVEL = 69
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EXTRAVERSION = -linux4sam_6.0-rc2
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SUBLEVEL = 71
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EXTRAVERSION =
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NAME = Petit Gorille
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# *DOCUMENTATION*

‎arch/arc/configs/axs101_defconfig‎

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@@ -1,5 +1,4 @@
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CONFIG_DEFAULT_HOSTNAME="ARCLinux"
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# CONFIG_SWAP is not set
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CONFIG_SYSVIPC=y
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CONFIG_POSIX_MQUEUE=y
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# CONFIG_CROSS_MEMORY_ATTACH is not set

‎arch/arc/configs/axs103_defconfig‎

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@@ -1,5 +1,4 @@
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CONFIG_DEFAULT_HOSTNAME="ARCLinux"
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# CONFIG_SWAP is not set
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CONFIG_SYSVIPC=y
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CONFIG_POSIX_MQUEUE=y
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# CONFIG_CROSS_MEMORY_ATTACH is not set

‎arch/arc/configs/axs103_smp_defconfig‎

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@@ -1,5 +1,4 @@
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CONFIG_DEFAULT_HOSTNAME="ARCLinux"
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# CONFIG_SWAP is not set
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CONFIG_SYSVIPC=y
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CONFIG_POSIX_MQUEUE=y
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# CONFIG_CROSS_MEMORY_ATTACH is not set

‎arch/arm/configs/imx_v6_v7_defconfig‎

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@@ -289,7 +289,6 @@ CONFIG_USB_STORAGE=y
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CONFIG_USB_CHIPIDEA=y
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CONFIG_USB_CHIPIDEA_UDC=y
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CONFIG_USB_CHIPIDEA_HOST=y
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CONFIG_USB_CHIPIDEA_ULPI=y
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CONFIG_USB_SERIAL=m
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CONFIG_USB_SERIAL_GENERIC=y
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CONFIG_USB_SERIAL_FTDI_SIO=m
@@ -326,7 +325,6 @@ CONFIG_USB_GADGETFS=m
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CONFIG_USB_FUNCTIONFS=m
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CONFIG_USB_MASS_STORAGE=m
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CONFIG_USB_G_SERIAL=m
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CONFIG_USB_ULPI_BUS=y
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CONFIG_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_PLTFM=y

‎arch/arm/mach-rockchip/Kconfig‎

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@@ -18,6 +18,7 @@ config ARCH_ROCKCHIP
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select ARM_GLOBAL_TIMER
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select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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select ZONE_DMA if ARM_LPAE
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select PM
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help
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Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
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containing the RK2928, RK30xx and RK31xx series.

‎arch/arm64/Kconfig.platforms‎

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@@ -148,6 +148,7 @@ config ARCH_ROCKCHIP
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select GPIOLIB
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select PINCTRL
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select PINCTRL_ROCKCHIP
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select PM
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select ROCKCHIP_TIMER
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help
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This enables support for the ARMv8 based Rockchip chipsets,

‎arch/arm64/include/asm/cache.h‎

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@@ -20,9 +20,14 @@
2020

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#define CTR_L1IP_SHIFT 14
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#define CTR_L1IP_MASK 3
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#define CTR_DMINLINE_SHIFT 16
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#define CTR_IMINLINE_SHIFT 0
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#define CTR_CWG_SHIFT 24
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#define CTR_CWG_MASK 15
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#define CTR_CACHE_MINLINE_MASK \
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(0xf << CTR_DMINLINE_SHIFT | 0xf << CTR_IMINLINE_SHIFT)
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#define CTR_L1IP(ctr) (((ctr) >> CTR_L1IP_SHIFT) & CTR_L1IP_MASK)
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#define ICACHE_POLICY_VPIPT 0

‎arch/arm64/include/asm/cpucaps.h‎

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#define ARM64_HARDEN_BRANCH_PREDICTOR 24
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#define ARM64_HARDEN_BP_POST_GUEST_EXIT 25
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#define ARM64_SSBD 26
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#define ARM64_MISMATCHED_CACHE_TYPE 27
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#define ARM64_NCAPS 27
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#define ARM64_NCAPS 28
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#endif /* __ASM_CPUCAPS_H */

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