drm/mediatek: fix a typo of DISP_OD_CFG to OD_RELAYMODE

Bibby Hsieh · ckhu-mediatek · commit 1ee6f347f819 · 2016-11-24T14:53:14.000+08:00
If we want to set the hardware OD to relay mode, we have to set DISP_OD_CFG register rather than OD_RELAYMODE; otherwise, the system will access the wrong address. Change-Id: Ifb9bb4caa63df906437d48b5d5326b6d04ea332a Fixes: 7216436 ("drm/mediatek: set mt8173 dithering function") Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -123,7 +123,7 @@ static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,
 			  unsigned int bpc)
 {
 	writel(w << 16 | h, comp->regs + DISP_OD_SIZE);
-	writel(OD_RELAYMODE, comp->regs + OD_RELAYMODE);
+	writel(OD_RELAYMODE, comp->regs + DISP_OD_CFG);
 	mtk_dither_set(comp, bpc, DISP_OD_CFG);
 }
 

Original file line number	Diff line number	Diff line change
`@@ -123,7 +123,7 @@ static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,`
`123`	`123`	`unsigned int bpc)`
`124`	`124`	`{`
`125`	`125`	`writel(w << 16 \| h, comp->regs + DISP_OD_SIZE);`
`126`		`- writel(OD_RELAYMODE, comp->regs + OD_RELAYMODE);`
	`126`	`+ writel(OD_RELAYMODE, comp->regs + DISP_OD_CFG);`
`127`	`127`	`mtk_dither_set(comp, bpc, DISP_OD_CFG);`
`128`	`128`	`}`
`129`	`129`