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861 | 861 | uart0 { |
862 | 862 | pinctrl_uart0: uart0-0 { |
863 | 863 | atmel,pins = |
864 | | - <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */ |
865 | | - AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */ |
| 864 | + <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */ |
| 865 | + AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */ |
866 | 866 | }; |
867 | 867 | }; |
868 | 868 |
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869 | 869 | uart1 { |
870 | 870 | pinctrl_uart1: uart1-0 { |
871 | 871 | atmel,pins = |
872 | | - <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */ |
873 | | - AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */ |
| 872 | + <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */ |
| 873 | + AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */ |
874 | 874 | }; |
875 | 875 | }; |
876 | 876 |
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877 | 877 | usart0 { |
878 | 878 | pinctrl_usart0: usart0-0 { |
879 | 879 | atmel,pins = |
880 | | - <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */ |
881 | | - AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */ |
| 880 | + <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP |
| 881 | + AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
882 | 882 | }; |
883 | 883 |
|
884 | 884 | pinctrl_usart0_rts_cts: usart0_rts_cts-0 { |
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891 | 891 | usart1 { |
892 | 892 | pinctrl_usart1: usart1-0 { |
893 | 893 | atmel,pins = |
894 | | - <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */ |
895 | | - AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */ |
| 894 | + <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP |
| 895 | + AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
896 | 896 | }; |
897 | 897 |
|
898 | 898 | pinctrl_usart1_rts_cts: usart1_rts_cts-0 { |
|
905 | 905 | usart2 { |
906 | 906 | pinctrl_usart2: usart2-0 { |
907 | 907 | atmel,pins = |
908 | | - <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */ |
909 | | - AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */ |
| 908 | + <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */ |
| 909 | + AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */ |
910 | 910 | }; |
911 | 911 |
|
912 | 912 | pinctrl_usart2_rts_cts: usart2_rts_cts-0 { |
|
919 | 919 | usart3 { |
920 | 920 | pinctrl_usart3: usart3-0 { |
921 | 921 | atmel,pins = |
922 | | - <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */ |
923 | | - AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */ |
| 922 | + <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */ |
| 923 | + AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */ |
924 | 924 | }; |
925 | 925 |
|
926 | 926 | pinctrl_usart3_rts_cts: usart3_rts_cts-0 { |
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