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ConchuODBartosz Golaszewski
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dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation
The microchip,mpfs-gpio binding suffered greatly due to being written with a narrow minded view of the controller, and the interrupt bits ended up incorrect. It was mistakenly assumed that the interrupt configuration was set by platform firmware, based on the FPGA configuration, and that the GPIO DT nodes were the only way to really communicate interrupt configuration to software. Instead, the mux should be a device in its own right, and the GPIO controllers should be connected to it, rather than to the PLIC. Now that a binding exists for that mux, try to fix the misconceptions in the GPIO controller binding. Firstly, it's not possible for this controller to have fewer than 14 GPIOs, and thus 14 interrupts also. There are three controllers, with 14, 24 & 32 GPIOs each. The fabric core, CoreGPIO, can of course have a customisable number of GPIOs. The example is wacky too - it follows from the incorrect understanding that the GPIO controllers are connected to the PLIC directly. They are not however, with a mux sitting in between. Update the example to use the mux as a parent, and the interrupt numbers at the mux for GPIO2 as the example - rather than the strange looking, repeated <53>. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260318-fondly-tradition-90b8241f0cc8@spud Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
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Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,11 @@ allOf:
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contains:
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const: microchip,mpfs-gpio
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then:
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properties:
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ngpios:
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enum: [14, 24, 32]
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interrupts:
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minItems: 14
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required:
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- interrupts
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- "#interrupt-cells"
@@ -85,18 +90,19 @@ examples:
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compatible = "microchip,mpfs-gpio";
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reg = <0x20122000 0x1000>;
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clocks = <&clkcfg 25>;
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interrupt-parent = <&plic>;
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interrupt-parent = <&irqmux>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupts = <53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>;
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interrupts = <64>, <65>, <66>, <67>,
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<68>, <69>, <70>, <71>,
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<72>, <73>, <74>, <75>,
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<76>, <77>, <78>, <79>,
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<80>, <81>, <82>, <83>,
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<84>, <85>, <86>, <87>,
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<88>, <89>, <90>, <91>,
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<92>, <93>, <94>, <95>;
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};
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...

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