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Yang Wangalexdeucher
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drm/amd/pm: optimize logic and remove unnecessary checks in smu v15.0.8
the following two sets of logic are clearly mutually exclusive in smu_v15_0_8_set_soft_freq_limited_range. remove unnecessary code logic to keep the code logic clear. e.g: if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) return -EINVAL; if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { ... } Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 file changed

Lines changed: 23 additions & 29 deletions

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drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c

Lines changed: 23 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1911,42 +1911,36 @@ static int smu_v15_0_8_set_soft_freq_limited_range(struct smu_context *smu,
19111911
if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
19121912
return -EINVAL;
19131913

1914-
if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
1915-
if (min >= max) {
1916-
dev_err(smu->adev->dev,
1917-
"Minimum clk should be less than the maximum allowed clock\n");
1918-
return -EINVAL;
1919-
}
1914+
if (min >= max) {
1915+
dev_err(smu->adev->dev,
1916+
"Minimum clk should be less than the maximum allowed clock\n");
1917+
return -EINVAL;
1918+
}
19201919

1921-
if (clk_type == SMU_GFXCLK || clk_type == SMU_SCLK) {
1922-
if ((min == pstate_table->gfxclk_pstate.curr.min) &&
1923-
(max == pstate_table->gfxclk_pstate.curr.max))
1924-
return 0;
1920+
if (clk_type == SMU_GFXCLK || clk_type == SMU_SCLK) {
1921+
if ((min == pstate_table->gfxclk_pstate.curr.min) &&
1922+
(max == pstate_table->gfxclk_pstate.curr.max))
1923+
return 0;
19251924

1926-
ret = smu_v15_0_8_set_gfx_soft_freq_limited_range(smu,
1927-
min, max);
1928-
if (!ret) {
1929-
pstate_table->gfxclk_pstate.curr.min = min;
1930-
pstate_table->gfxclk_pstate.curr.max = max;
1931-
}
1925+
ret = smu_v15_0_8_set_gfx_soft_freq_limited_range(smu, min,
1926+
max);
1927+
if (!ret) {
1928+
pstate_table->gfxclk_pstate.curr.min = min;
1929+
pstate_table->gfxclk_pstate.curr.max = max;
19321930
}
1931+
}
19331932

1934-
if (clk_type == SMU_UCLK) {
1935-
if (max == pstate_table->uclk_pstate.curr.max)
1936-
return 0;
1937-
1938-
ret = smu_v15_0_set_soft_freq_limited_range(smu,
1939-
SMU_UCLK,
1940-
0, max,
1941-
false);
1942-
if (!ret)
1943-
pstate_table->uclk_pstate.curr.max = max;
1944-
}
1933+
if (clk_type == SMU_UCLK) {
1934+
if (max == pstate_table->uclk_pstate.curr.max)
1935+
return 0;
19451936

1946-
return ret;
1937+
ret = smu_v15_0_set_soft_freq_limited_range(smu, SMU_UCLK, 0,
1938+
max, false);
1939+
if (!ret)
1940+
pstate_table->uclk_pstate.curr.max = max;
19471941
}
19481942

1949-
return 0;
1943+
return ret;
19501944
}
19511945

19521946
static int smu_v15_0_8_od_edit_dpm_table(struct smu_context *smu,

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