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Wolfram Sang
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Merge tag 'i2c-host-7.1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow
i2c-host for v7.1, part 1 - generic cleanups in npcm7xx, qcom-cci, xiic and designware DT bindings - atr: use kzalloc_flex for alias pool allocation - ixp4xx: convert bindings to DT schema - ocores: use read_poll_timeout_atomic() for polling waits - qcom-geni: skip extra TX DMA TRE for single read messages - s3c24xx: validate SMBus block length before using it - spacemit: refactor xfer path and add K1 PIO support - tegra: identify DVC and VI with SoC data variants - tegra: support SoC-specific register offsets - xiic: switch to devres and generic fw properties - xiic: skip input clock setup on non-OF systems rtl9300: - add per-SoC callbacks and clock support for RTL9607C - add support for new 50 kHz and 2.5 MHz bus speeds - general refactoring in preparation for RTL9607C support New support: - DesignWare GOOG5000 (ACPI HID) - Intel Nova Lake (ACPI ID) - Realtek RTL9607C - SpacemiT K3 binding - Tegra410 register layout support
2 parents 73e65c4 + e43f2df commit e336aa3

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Documentation/devicetree/bindings/i2c/i2c-iop3xx.txt

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/intel,ixp4xx-i2c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: I2c Controller on XScale platforms such as IOP3xx and IXP4xx
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maintainers:
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- Andi Shyti <andi.shyti@kernel.org>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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enum:
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- intel,iop3xx-i2c
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- intel,ixp4xx-i2c
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c@c8011000 {
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compatible = "intel,ixp4xx-i2c";
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reg = <0xc8011000 0x18>;
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interrupts = <33 IRQ_TYPE_LEVEL_LOW>;
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};

Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml

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assigned to either I2C controller.
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RTL9310 SoCs have equal capabilities but support 12 common SDA lines which
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can be assigned to either I2C controller.
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RTL9607C SoCs have equal capabilities but each controller only supports 1
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SCL/SDA line.
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properties:
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compatible:
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- enum:
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- realtek,rtl9301-i2c
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- realtek,rtl9310-i2c
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- realtek,rtl9607-i2c
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reg:
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items:
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The SCL line number of this I2C controller.
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enum: [ 0, 1 ]
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clocks:
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maxItems: 1
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patternProperties:
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'^i2c@[0-9ab]$':
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$ref: /schemas/i2c/i2c-controller.yaml
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then:
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patternProperties:
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'^i2c@[89ab]$': false
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- if:
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properties:
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compatible:
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contains:
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const: realtek,rtl9607-i2c
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then:
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required:
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- realtek,scl
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- clocks
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required:
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- compatible

Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml

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- const: renesas,r9a06g032-i2c # RZ/N1D
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- const: renesas,rzn1-i2c # RZ/N1
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- const: snps,designware-i2c
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- description: Baikal-T1 SoC System I2C controller
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const: baikal,bt1-sys-i2c
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- description: Mobileye EyeQ DesignWare I2C controller
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items:
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- enum:

Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml

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properties:
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compatible:
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const: spacemit,k1-i2c
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oneOf:
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- items:
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- const: spacemit,k3-i2c
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- const: spacemit,k1-i2c
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- const: spacemit,k1-i2c
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reg:
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maxItems: 1

drivers/i2c/busses/i2c-designware-platdrv.c

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{ "AMDI0510", 0 },
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{ "APMC0D0F", 0 },
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{ "FUJI200B", 0 },
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{ "GOOG5000", 0 },
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{ "HISI02A1", 0 },
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{ "HISI02A2", 0 },
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{ "HISI02A3", 0 },

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