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dt-bindings: fsl: imx7ulp-smc1: Add #clock-cells property
The SMC1 block on i.MX7ULP is already used as a clock provider in imx7ulp.dtsi, but the corresponding dt-binding schema does not define the required '#clock-cells' property. This results in CHECK_DTBS schema validation errors. Functionally, SMC1 controls the CPU run mode configuration: - 00b: Normal Run (RUN) - 10b: Very-Low-Power Run (VLPR) - 11b: High-Speed Run (HSRUN) These run modes determine the effective CPU operating point, and their programming is tied to the OPP table. Add the missing `#clock-cells` definition so the dt-binding schema is consistent with the DTS and validates correctly. Fixes: 8ba41d6 ("dt-bindings: fsl: Convert i.MX7ULP PM to json-schema") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
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Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml

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@@ -28,6 +28,9 @@ properties:
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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clocks:
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maxItems: 2
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@@ -39,6 +42,7 @@ properties:
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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@@ -47,4 +51,5 @@ examples:
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smc1@40410000 {
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compatible = "fsl,imx7ulp-smc1";
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reg = <0x40410000 0x1000>;
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#clock-cells = <1>;
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};

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