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Merge tag 'drm-rust-next-2026-03-30' of https://gitlab.freedesktop.org/drm/rust/kernel into drm-next
DRM Rust changes for v7.1-rc1 - DMA: - Rework the DMA coherent API: introduce Coherent<T> as a generalized container for arbitrary types, replacing the slice-only CoherentAllocation<T>. Add CoherentBox for memory initialization before exposing a buffer to hardware (converting to Coherent when ready), and CoherentHandle for allocations without kernel mapping. - Add Coherent::init() / init_with_attrs() for one-shot initialization via pin-init, and from-slice constructors for both Coherent and CoherentBox - Add uaccess write_dma() for copying from DMA buffers to userspace and BinaryWriter support for Coherent<T> - DRM: - Add GPU buddy allocator abstraction - Add DRM shmem GEM helper abstraction - Allow drm::Device to dispatch work and delayed work items to driver private data - Add impl_aref_for_gem_obj!() macro to reduce GEM refcount boilerplate, and introduce DriverObject::Args for constructor context - Add dma_resv_lock helper and raw_dma_resv() accessor on GEM objects - Clean up imports across the DRM module - I/O: - Merged via a signed tag from the driver-core tree: register!() macro and I/O infrastructure improvements (IoCapable refactor, RelaxedMmio wrapper, IoLoc trait, generic accessors, write_reg / LocatedRegister) - Nova (Core): - Fix and harden the GSP command queue: correct write pointer advancing, empty slot handling, and ring buffer indexing; add mutex locking and make Cmdq a pinned type; distinguish wait vs no-wait commands - Add support for large RPCs via continuation records, splitting oversized commands across multiple queue slots - Simplify GSP sequencer and message handling code: remove unused trait and Display impls, derive Debug and Zeroable where applicable, warn on unconsumed message data - Refactor Falcon firmware handling: create DMA objects lazily, add PIO upload support, and use the Generic Bootloader to boot FWSEC on Turing - Convert all register definitions (PMC, PBUS, PFB, GC6, FUSE, PDISP, Falcon) to the kernel register!() macro; add bounded_enum macro to define enums usable as register fields - Migrate all DMA usage to the new Coherent, CoherentBox, and CoherentHandle APIs - Harden firmware parsing with checked arithmetic throughout FWSEC, Booter, RISC-V parsing paths - Add debugfs support for reading GSP-RM log buffers; replace module_pci_driver!() with explicit module init to support module-level debugfs setup - Fix auxiliary device registration for multi-GPU systems - Various cleanups: import style, firmware parsing refactoring, framebuffer size logging - Rust: - Add interop::list module providing a C linked list interface - Extend num::Bounded with shift operations, into_bool(), and const get() to support register bitfield manipulation - Enable the generic_arg_infer Rust feature and add EMSGSIZE error code - Tyr: - Adopt vertical import style per kernel Rust guidelines - Clarify driver/device type names and use DRM device type alias consistently across the driver - Fix GPU model/version decoding in GpuInfo - Workqueue: - Add ARef<T> support for work and delayed work Signed-off-by: Dave Airlie <airlied@redhat.com> From: "Danilo Krummrich" <dakr@kernel.org> Link: https://patch.msgid.link/DHGH4BLT03BU.ZJH5U52WE8BY@kernel.org
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Lines changed: 7125 additions & 3058 deletions

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‎Documentation/gpu/nova/core/todo.rst‎

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@@ -51,82 +51,6 @@ There also have been considerations of ToPrimitive [2].
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| Link: https://lore.kernel.org/all/cover.1750689857.git.y.j3ms.n@gmail.com/ [1]
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| Link: https://rust-for-linux.zulipchat.com/#narrow/channel/288089-General/topic/Implement.20.60FromPrimitive.60.20trait.20.2B.20derive.20macro.20for.20nova-core/with/541971854 [2]
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Generic register abstraction [REGA]
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-----------------------------------
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Work out how register constants and structures can be automatically generated
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through generalized macros.
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Example:
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.. code-block:: rust
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register!(BOOT0, 0x0, u32, pci::Bar<SIZE>, Fields [
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MINOR_REVISION(3:0, RO),
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MAJOR_REVISION(7:4, RO),
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REVISION(7:0, RO), // Virtual register combining major and minor rev.
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])
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This could expand to something like:
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.. code-block:: rust
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const BOOT0_OFFSET: usize = 0x00000000;
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const BOOT0_MINOR_REVISION_SHIFT: u8 = 0;
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const BOOT0_MINOR_REVISION_MASK: u32 = 0x0000000f;
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const BOOT0_MAJOR_REVISION_SHIFT: u8 = 4;
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const BOOT0_MAJOR_REVISION_MASK: u32 = 0x000000f0;
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const BOOT0_REVISION_SHIFT: u8 = BOOT0_MINOR_REVISION_SHIFT;
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const BOOT0_REVISION_MASK: u32 = BOOT0_MINOR_REVISION_MASK | BOOT0_MAJOR_REVISION_MASK;
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struct Boot0(u32);
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impl Boot0 {
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#[inline]
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fn read(bar: &RevocableGuard<'_, pci::Bar<SIZE>>) -> Self {
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Self(bar.readl(BOOT0_OFFSET))
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}
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#[inline]
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fn minor_revision(&self) -> u32 {
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(self.0 & BOOT0_MINOR_REVISION_MASK) >> BOOT0_MINOR_REVISION_SHIFT
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}
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#[inline]
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fn major_revision(&self) -> u32 {
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(self.0 & BOOT0_MAJOR_REVISION_MASK) >> BOOT0_MAJOR_REVISION_SHIFT
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}
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#[inline]
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fn revision(&self) -> u32 {
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(self.0 & BOOT0_REVISION_MASK) >> BOOT0_REVISION_SHIFT
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}
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}
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Usage:
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.. code-block:: rust
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let bar = bar.try_access().ok_or(ENXIO)?;
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let boot0 = Boot0::read(&bar);
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pr_info!("Revision: {}\n", boot0.revision());
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A work-in-progress implementation currently resides in
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`drivers/gpu/nova-core/regs/macros.rs` and is used in nova-core. It would be
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nice to improve it (possibly using proc macros) and move it to the `kernel`
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crate so it can be used by other components as well.
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Features desired before this happens:
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* Make I/O optional I/O (for field values that are not registers),
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* Support other sizes than `u32`,
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* Allow visibility control for registers and individual fields,
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* Use Rust slice syntax to express fields ranges.
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| Complexity: Advanced
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| Contact: Alexandre Courbot
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Numerical operations [NUMM]
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---------------------------
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‎MAINTAINERS‎

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@@ -7534,6 +7534,7 @@ F: include/linux/*fence.h
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F: include/linux/dma-buf.h
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F: include/linux/dma-buf/
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F: include/linux/dma-resv.h
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F: rust/helpers/dma-resv.c
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K: \bdma_(?:buf|fence|resv)\b
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DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
@@ -8513,7 +8514,10 @@ T: git https://gitlab.freedesktop.org/drm/rust/kernel.git
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F: drivers/gpu/drm/nova/
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F: drivers/gpu/drm/tyr/
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F: drivers/gpu/nova-core/
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F: rust/helpers/gpu.c
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F: rust/kernel/drm/
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F: rust/kernel/gpu.rs
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F: rust/kernel/gpu/
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DRM DRIVERS FOR ALLWINNER A10
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M: Chen-Yu Tsai <wens@kernel.org>
@@ -8931,7 +8935,7 @@ F: include/drm/ttm/
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GPU BUDDY ALLOCATOR
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M: Matthew Auld <matthew.auld@intel.com>
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M: Arun Pravin <arunpravin.paneerselvam@amd.com>
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R: Christian Koenig <christian.koenig@amd.com>
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R: Joel Fernandes <joelagnelf@nvidia.com>
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L: dri-devel@lists.freedesktop.org
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S: Maintained
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T: git https://gitlab.freedesktop.org/drm/misc/kernel.git
@@ -8940,6 +8944,9 @@ F: drivers/gpu/drm/drm_buddy.c
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F: drivers/gpu/tests/gpu_buddy_test.c
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F: include/drm/drm_buddy.h
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F: include/linux/gpu_buddy.h
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F: rust/helpers/gpu.c
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F: rust/kernel/gpu.rs
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F: rust/kernel/gpu/
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DRM AUTOMATED TESTING
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M: Helen Koike <helen.fornazier@gmail.com>
@@ -23208,6 +23215,15 @@ T: git https://github.com/Rust-for-Linux/linux.git alloc-next
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F: rust/kernel/alloc.rs
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F: rust/kernel/alloc/
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RUST [INTEROP]
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M: Joel Fernandes <joelagnelf@nvidia.com>
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M: Alexandre Courbot <acourbot@nvidia.com>
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L: rust-for-linux@vger.kernel.org
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S: Maintained
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T: git https://github.com/Rust-for-Linux/linux.git interop-next
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F: rust/kernel/interop.rs
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F: rust/kernel/interop/
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RUST [NUM]
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M: Alexandre Courbot <acourbot@nvidia.com>
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R: Yury Norov <yury.norov@gmail.com>

‎drivers/gpu/drm/Kconfig‎

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@@ -268,6 +268,13 @@ config DRM_GEM_SHMEM_HELPER
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help
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Choose this if you need the GEM shmem helper functions
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config RUST_DRM_GEM_SHMEM_HELPER
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bool
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depends on DRM && MMU
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select DRM_GEM_SHMEM_HELPER
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help
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Choose this if you need the GEM shmem helper functions In Rust
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config DRM_SUBALLOC_HELPER
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tristate
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depends on DRM

‎drivers/gpu/drm/nova/gem.rs‎

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@@ -19,8 +19,9 @@ pub(crate) struct NovaObject {}
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impl gem::DriverObject for NovaObject {
2121
type Driver = NovaDriver;
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type Args = ();
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23-
fn new(_dev: &NovaDevice, _size: usize) -> impl PinInit<Self, Error> {
24+
fn new(_dev: &NovaDevice, _size: usize, _args: Self::Args) -> impl PinInit<Self, Error> {
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try_pin_init!(NovaObject {})
2526
}
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}
@@ -33,7 +34,7 @@ impl NovaObject {
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}
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let aligned_size = page::page_align(size).ok_or(EINVAL)?;
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gem::Object::new(dev, aligned_size)
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gem::Object::new(dev, aligned_size, ())
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}
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/// Look up a GEM object handle for a `File` and return an `ObjectRef` for it.

‎drivers/gpu/drm/tyr/driver.rs‎

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@@ -1,44 +1,56 @@
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// SPDX-License-Identifier: GPL-2.0 or MIT
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3-
use kernel::clk::Clk;
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use kernel::clk::OptionalClk;
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use kernel::device::Bound;
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use kernel::device::Core;
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use kernel::device::Device;
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use kernel::devres::Devres;
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use kernel::drm;
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use kernel::drm::ioctl;
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use kernel::io::poll;
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use kernel::new_mutex;
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use kernel::of;
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use kernel::platform;
15-
use kernel::prelude::*;
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use kernel::regulator;
17-
use kernel::regulator::Regulator;
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use kernel::sizes::SZ_2M;
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use kernel::sync::aref::ARef;
20-
use kernel::sync::Arc;
21-
use kernel::sync::Mutex;
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use kernel::time;
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use crate::file::File;
25-
use crate::gem::TyrObject;
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use crate::gpu;
27-
use crate::gpu::GpuInfo;
28-
use crate::regs;
3+
use kernel::{
4+
clk::{
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Clk,
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OptionalClk, //
7+
},
8+
device::{
9+
Bound,
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Core,
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Device, //
12+
},
13+
devres::Devres,
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drm,
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drm::ioctl,
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io::poll,
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new_mutex,
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of,
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platform,
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prelude::*,
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regulator,
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regulator::Regulator,
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sizes::SZ_2M,
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sync::{
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aref::ARef,
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Arc,
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Mutex, //
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},
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time, //
30+
};
31+
32+
use crate::{
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file::TyrDrmFileData,
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gem::TyrObject,
35+
gpu,
36+
gpu::GpuInfo,
37+
regs, //
38+
};
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3040
pub(crate) type IoMem = kernel::io::mem::IoMem<SZ_2M>;
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42+
pub(crate) struct TyrDrmDriver;
43+
3244
/// Convenience type alias for the DRM device type for this driver.
33-
pub(crate) type TyrDevice = drm::Device<TyrDriver>;
45+
pub(crate) type TyrDrmDevice = drm::Device<TyrDrmDriver>;
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3547
#[pin_data(PinnedDrop)]
36-
pub(crate) struct TyrDriver {
37-
_device: ARef<TyrDevice>,
48+
pub(crate) struct TyrPlatformDriverData {
49+
_device: ARef<TyrDrmDevice>,
3850
}
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4052
#[pin_data(PinnedDrop)]
41-
pub(crate) struct TyrData {
53+
pub(crate) struct TyrDrmDeviceData {
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pub(crate) pdev: ARef<platform::Device>,
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4456
#[pin]
@@ -61,9 +73,9 @@ pub(crate) struct TyrData {
6173
// that it will be removed in a future patch.
6274
//
6375
// SAFETY: This will be removed in a future patch.
64-
unsafe impl Send for TyrData {}
76+
unsafe impl Send for TyrDrmDeviceData {}
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// SAFETY: This will be removed in a future patch.
66-
unsafe impl Sync for TyrData {}
78+
unsafe impl Sync for TyrDrmDeviceData {}
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6880
fn issue_soft_reset(dev: &Device<Bound>, iomem: &Devres<IoMem>) -> Result {
6981
regs::GPU_CMD.write(dev, iomem, regs::GPU_CMD_SOFT_RESET)?;
@@ -82,14 +94,14 @@ fn issue_soft_reset(dev: &Device<Bound>, iomem: &Devres<IoMem>) -> Result {
8294
kernel::of_device_table!(
8395
OF_TABLE,
8496
MODULE_OF_TABLE,
85-
<TyrDriver as platform::Driver>::IdInfo,
97+
<TyrPlatformDriverData as platform::Driver>::IdInfo,
8698
[
8799
(of::DeviceId::new(c"rockchip,rk3588-mali"), ()),
88100
(of::DeviceId::new(c"arm,mali-valhall-csf"), ())
89101
]
90102
);
91103

92-
impl platform::Driver for TyrDriver {
104+
impl platform::Driver for TyrPlatformDriverData {
93105
type IdInfo = ();
94106
const OF_ID_TABLE: Option<of::IdTable<Self::IdInfo>> = Some(&OF_TABLE);
95107

@@ -119,7 +131,7 @@ impl platform::Driver for TyrDriver {
119131

120132
let platform: ARef<platform::Device> = pdev.into();
121133

122-
let data = try_pin_init!(TyrData {
134+
let data = try_pin_init!(TyrDrmDeviceData {
123135
pdev: platform.clone(),
124136
clks <- new_mutex!(Clocks {
125137
core: core_clk,
@@ -133,10 +145,10 @@ impl platform::Driver for TyrDriver {
133145
gpu_info,
134146
});
135147

136-
let tdev: ARef<TyrDevice> = drm::Device::new(pdev.as_ref(), data)?;
137-
drm::driver::Registration::new_foreign_owned(&tdev, pdev.as_ref(), 0)?;
148+
let ddev: ARef<TyrDrmDevice> = drm::Device::new(pdev.as_ref(), data)?;
149+
drm::driver::Registration::new_foreign_owned(&ddev, pdev.as_ref(), 0)?;
138150

139-
let driver = TyrDriver { _device: tdev };
151+
let driver = TyrPlatformDriverData { _device: ddev };
140152

141153
// We need this to be dev_info!() because dev_dbg!() does not work at
142154
// all in Rust for now, and we need to see whether probe succeeded.
@@ -146,12 +158,12 @@ impl platform::Driver for TyrDriver {
146158
}
147159

148160
#[pinned_drop]
149-
impl PinnedDrop for TyrDriver {
161+
impl PinnedDrop for TyrPlatformDriverData {
150162
fn drop(self: Pin<&mut Self>) {}
151163
}
152164

153165
#[pinned_drop]
154-
impl PinnedDrop for TyrData {
166+
impl PinnedDrop for TyrDrmDeviceData {
155167
fn drop(self: Pin<&mut Self>) {
156168
// TODO: the type-state pattern for Clks will fix this.
157169
let clks = self.clks.lock();
@@ -172,15 +184,15 @@ const INFO: drm::DriverInfo = drm::DriverInfo {
172184
};
173185

174186
#[vtable]
175-
impl drm::Driver for TyrDriver {
176-
type Data = TyrData;
177-
type File = File;
187+
impl drm::Driver for TyrDrmDriver {
188+
type Data = TyrDrmDeviceData;
189+
type File = TyrDrmFileData;
178190
type Object = drm::gem::Object<TyrObject>;
179191

180192
const INFO: drm::DriverInfo = INFO;
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182194
kernel::declare_drm_ioctls! {
183-
(PANTHOR_DEV_QUERY, drm_panthor_dev_query, ioctl::RENDER_ALLOW, File::dev_query),
195+
(PANTHOR_DEV_QUERY, drm_panthor_dev_query, ioctl::RENDER_ALLOW, TyrDrmFileData::dev_query),
184196
}
185197
}
186198

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