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Merge tag 'drm-misc-next-2025-12-19' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next for 6.20: Core Changes: - dma-buf: Add tracepoints - sched: Introduce new helpers Driver Changes: - amdxdna: Enable hardware context priority, Remove (obsolete and never public) NPU2 Support, Race condition fix - rockchip: Add RK3368 HDMI Support - rz-du: Add RZ/V2H(P) MIPI-DSI Support - panels: - st7571: Introduce SPI support - New panels: Sitronix ST7920, Samsung LTL106HL02, LG LH546WF1-ED01, HannStar HSD156JUW2 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patch.msgid.link/20251219-arcane-quaint-skunk-e383b0@houat
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Lines changed: 3541 additions & 1445 deletions

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‎Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml‎

Lines changed: 91 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -14,16 +14,21 @@ description: |
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RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
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up to four data lanes.
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17-
allOf:
18-
- $ref: /schemas/display/dsi-controller.yaml#
19-
2017
properties:
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compatible:
22-
items:
19+
oneOf:
20+
- items:
21+
- enum:
22+
- renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
23+
- renesas,r9a07g054-mipi-dsi # RZ/V2L
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- const: renesas,rzg2l-mipi-dsi
25+
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- items:
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- const: renesas,r9a09g056-mipi-dsi # RZ/V2N
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- const: renesas,r9a09g057-mipi-dsi
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- enum:
24-
- renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
25-
- renesas,r9a07g054-mipi-dsi # RZ/V2L
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- const: renesas,rzg2l-mipi-dsi
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- renesas,r9a09g057-mipi-dsi # RZ/V2H(P)
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reg:
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maxItems: 1
@@ -49,34 +54,56 @@ properties:
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- const: debug
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clocks:
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items:
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- description: DSI D-PHY PLL multiplied clock
54-
- description: DSI D-PHY system clock
55-
- description: DSI AXI bus clock
56-
- description: DSI Register access clock
57-
- description: DSI Video clock
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- description: DSI D-PHY Escape mode transmit clock
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oneOf:
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- items:
59+
- description: DSI D-PHY PLL multiplied clock
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- description: DSI D-PHY system clock
61+
- description: DSI AXI bus clock
62+
- description: DSI Register access clock
63+
- description: DSI Video clock
64+
- description: DSI D-PHY Escape mode transmit clock
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- items:
66+
- description: DSI D-PHY PLL reference clock
67+
- description: DSI AXI bus clock
68+
- description: DSI Register access clock
69+
- description: DSI Video clock
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- description: DSI D-PHY Escape mode transmit clock
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clock-names:
61-
items:
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- const: pllclk
63-
- const: sysclk
64-
- const: aclk
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- const: pclk
66-
- const: vclk
67-
- const: lpclk
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oneOf:
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- items:
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- const: pllclk
76+
- const: sysclk
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- const: aclk
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- const: pclk
79+
- const: vclk
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- const: lpclk
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- items:
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- const: pllrefclk
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- const: aclk
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- const: pclk
85+
- const: vclk
86+
- const: lpclk
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resets:
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items:
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- description: MIPI_DSI_CMN_RSTB
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- description: MIPI_DSI_ARESET_N
73-
- description: MIPI_DSI_PRESET_N
89+
oneOf:
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- items:
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- description: MIPI_DSI_CMN_RSTB
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- description: MIPI_DSI_ARESET_N
93+
- description: MIPI_DSI_PRESET_N
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- items:
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- description: MIPI_DSI_ARESET_N
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- description: MIPI_DSI_PRESET_N
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reset-names:
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items:
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- const: rst
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- const: arst
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- const: prst
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oneOf:
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- items:
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- const: rst
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- const: arst
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- const: prst
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- items:
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- const: arst
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- const: prst
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power-domains:
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maxItems: 1
@@ -130,6 +157,41 @@ required:
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unevaluatedProperties: false
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allOf:
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- $ref: ../dsi-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a09g057-mipi-dsi
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then:
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properties:
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clocks:
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maxItems: 5
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clock-names:
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maxItems: 5
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resets:
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maxItems: 2
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reset-names:
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maxItems: 2
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else:
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properties:
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clocks:
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minItems: 6
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clock-names:
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minItems: 6
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resets:
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minItems: 3
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reset-names:
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minItems: 3
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examples:
134196
- |
135197
#include <dt-bindings/clock/r9a07g044-cpg.h>

‎Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml‎

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@@ -4,21 +4,26 @@
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$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
66

7-
title: LG SW43408 1080x2160 DSI panel
7+
title: LG SW43408 AMOLED DDIC
88

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maintainers:
1010
- Casey Connolly <casey.connolly@linaro.org>
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1212
description:
13-
This panel is used on the Pixel 3, it is a 60hz OLED panel which
14-
required DSC (Display Stream Compression) and has rounded corners.
13+
The SW43408 is display driver IC with connected panel.
14+
15+
LG LH546WF1-ED01 panel is used on the Pixel 3, it is a 60hz OLED panel
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which required DSC (Display Stream Compression) and has rounded corners.
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allOf:
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- $ref: panel-common.yaml#
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properties:
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compatible:
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items:
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- enum:
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# LG 5.46 inch, 1080x2160 pixels, 18:9 ratio
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- lg,sw43408-lh546wf1-ed01
2227
- const: lg,sw43408
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2429
reg:
@@ -46,7 +51,7 @@ examples:
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#size-cells = <0>;
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panel@0 {
49-
compatible = "lg,sw43408";
54+
compatible = "lg,sw43408-lh546wf1-ed01", "lg,sw43408";
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reg = <0>;
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vddi-supply = <&vreg_l14a_1p88>;

‎Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml‎

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- panasonic,vvx10f004b00
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# Panasonic 10" WUXGA TFT LCD panel
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- panasonic,vvx10f034n00
58+
# Samsung ltl106hl02 10.6" Full HD TFT LCD panel
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- samsung,ltl106hl02-001
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# Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel
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- samsung,s6e3fa7-ams559nk06
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# Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel

‎Documentation/devicetree/bindings/display/panel/panel-simple.yaml‎

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- hannstar,hsd070pww1
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# HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel
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- hannstar,hsd100pxn1
157+
# HannStar Display Corp. HSD156JUW2 15.6" FHD (1920x1080) TFT LCD panel
158+
- hannstar,hsd156juw2
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# Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel
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- hit,tx23d38vm0caa
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# Innolux AT043TN24 4.3" WQVGA TFT LCD panel

‎Documentation/devicetree/bindings/display/panel/samsung,s6e3fc2x01.yaml‎

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title: Samsung S6E3FC2X01 AMOLED DDIC
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description: The S6E3FC2X01 is display driver IC with connected panel.
10-
119
maintainers:
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- David Heidelberg <david@ixit.cz>
1311

12+
description: The S6E3FC2X01 is display driver IC with connected panel.
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allOf:
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- $ref: panel-common.yaml#
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@@ -25,25 +25,21 @@ properties:
2525
reg:
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maxItems: 1
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28-
reset-gpios: true
29-
30-
port: true
31-
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vddio-supply:
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description: VDD regulator
28+
poc-supply:
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description: POC regulator
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vci-supply:
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description: VCI regulator
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poc-supply:
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description: POC regulator
34+
vddio-supply:
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description: VDD regulator
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required:
4238
- compatible
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- reset-gpios
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- vddio-supply
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- vci-supply
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- poc-supply
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- vci-supply
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- vddio-supply
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unevaluatedProperties: false
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‎Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml‎

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@@ -23,6 +23,7 @@ properties:
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- rockchip,rk3228-dw-hdmi
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- rockchip,rk3288-dw-hdmi
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- rockchip,rk3328-dw-hdmi
26+
- rockchip,rk3368-dw-hdmi
2627
- rockchip,rk3399-dw-hdmi
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- rockchip,rk3568-dw-hdmi
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‎Documentation/devicetree/bindings/display/sitronix,st7571.yaml‎

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};
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};
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};
79+
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spi {
81+
#address-cells = <1>;
82+
#size-cells = <0>;
83+
84+
display@0 {
85+
compatible = "sitronix,st7571";
86+
reg = <0>;
87+
reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
88+
width-mm = <37>;
89+
height-mm = <27>;
90+
91+
panel-timing {
92+
hactive = <128>;
93+
vactive = <96>;
94+
hback-porch = <0>;
95+
vback-porch = <0>;
96+
clock-frequency = <0>;
97+
hfront-porch = <0>;
98+
hsync-len = <0>;
99+
vfront-porch = <0>;
100+
vsync-len = <0>;
101+
};
102+
};
103+
};

‎Documentation/devicetree/bindings/display/sitronix,st7920.yaml‎

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1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/display/sitronix,st7920.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Sitronix ST7920 LCD Display Controllers
8+
9+
maintainers:
10+
- Iker Pedrosa <ikerpedrosam@gmail.com>
11+
12+
description:
13+
The Sitronix ST7920 is a controller for monochrome dot-matrix graphical LCDs,
14+
most commonly used for 128x64 pixel displays.
15+
16+
properties:
17+
compatible:
18+
const: sitronix,st7920
19+
20+
reg:
21+
maxItems: 1
22+
23+
vdd-supply:
24+
description: Regulator that provides 5V Vdd power supply
25+
26+
reset-gpios:
27+
maxItems: 1
28+
29+
spi-max-frequency:
30+
maximum: 600000
31+
32+
required:
33+
- compatible
34+
- reg
35+
- spi-max-frequency
36+
37+
allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
39+
40+
unevaluatedProperties: false
41+
42+
examples:
43+
- |
44+
#include <dt-bindings/gpio/gpio.h>
45+
46+
spi {
47+
#address-cells = <1>;
48+
#size-cells = <0>;
49+
50+
display@0 {
51+
compatible = "sitronix,st7920";
52+
reg = <0>;
53+
vdd-supply = <&reg_5v>;
54+
reset-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
55+
spi-max-frequency = <600000>;
56+
spi-cs-high;
57+
};
58+
};

‎MAINTAINERS‎

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82018201
F: Documentation/devicetree/bindings/display/sitronix,st7567.yaml
82028202
F: Documentation/devicetree/bindings/display/sitronix,st7571.yaml
82038203
F: drivers/gpu/drm/sitronix/st7571-i2c.c
8204+
F: drivers/gpu/drm/sitronix/st7571-spi.c
8205+
F: drivers/gpu/drm/sitronix/st7571.c
8206+
F: drivers/gpu/drm/sitronix/st7571.h
82048207

82058208
DRM DRIVER FOR SITRONIX ST7701 PANELS
82068209
M: Jagan Teki <jagan@amarulasolutions.com>
@@ -8223,6 +8226,13 @@ T: git https://gitlab.freedesktop.org/drm/misc/kernel.git
82238226
F: Documentation/devicetree/bindings/display/sitronix,st7735r.yaml
82248227
F: drivers/gpu/drm/sitronix/st7735r.c
82258228

8229+
DRM DRIVER FOR SITRONIX ST7920 LCD DISPLAYS
8230+
M: Iker Pedrosa <ikerpedrosam@gmail.com>
8231+
S: Maintained
8232+
T: git https://gitlab.freedesktop.org/drm/misc/kernel.git
8233+
F: Documentation/devicetree/bindings/display/sitronix,st7920.yaml
8234+
F: drivers/gpu/drm/sitronix/st7920.c
8235+
82268236
DRM DRIVER FOR SOLOMON SSD130X OLED DISPLAYS
82278237
M: Javier Martinez Canillas <javierm@redhat.com>
82288238
S: Maintained

‎drivers/accel/amdxdna/Makefile‎

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@@ -18,7 +18,6 @@ amdxdna-y := \
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amdxdna_sysfs.o \
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amdxdna_ubuf.o \
2020
npu1_regs.o \
21-
npu2_regs.o \
2221
npu4_regs.o \
2322
npu5_regs.o \
2423
npu6_regs.o

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