Skip to content

Commit 6afde01

Browse files
Rustam AdilovAndi Shyti
authored andcommitted
i2c: rtl9300: introduce a property for 8 bit width reg address
In RTL9607C i2c controller, in order to indicate that the width of memory address is 8 bits, 0 is written to MEM_ADDR_WIDTH field as opposed to 1 for RTL9300 and RTL9310. Introduce a new property to a driver data to indicate what value need to written to MEM_ADDR_WIDTH field for this case. Signed-off-by: Rustam Adilov <adilov@disroot.org> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260401180648.337834-5-adilov@disroot.org
1 parent 55284a8 commit 6afde01

1 file changed

Lines changed: 7 additions & 1 deletion

File tree

drivers/i2c/busses/i2c-rtl9300.c

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,7 @@ struct rtl9300_i2c_drv_data {
6666
u32 wd_reg;
6767
u8 max_nchan;
6868
u8 max_data_len;
69+
u8 reg_addr_8bit_len;
6970
};
7071

7172
#define RTL9300_I2C_MUX_NCHAN 8
@@ -111,6 +112,7 @@ struct rtl9300_i2c_xfer {
111112
#define RTL9300_I2C_MST_DATA_WORD2 0x10
112113
#define RTL9300_I2C_MST_DATA_WORD3 0x14
113114
#define RTL9300_I2C_MST_GLB_CTRL 0x384
115+
#define RTL9300_REG_ADDR_8BIT_LEN 1
114116

115117
#define RTL9310_I2C_MST_IF_CTRL 0x1004
116118
#define RTL9310_I2C_MST_IF_SEL 0x1008
@@ -305,6 +307,7 @@ static int rtl9300_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned s
305307
union i2c_smbus_data *data)
306308
{
307309
struct rtl9300_i2c_chan *chan = i2c_get_adapdata(adap);
310+
const struct rtl9300_i2c_drv_data *drv_data;
308311
struct rtl9300_i2c *i2c = chan->i2c;
309312
struct rtl9300_i2c_xfer xfer = {0};
310313
int ret;
@@ -314,14 +317,15 @@ static int rtl9300_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned s
314317

315318
guard(rtl9300_i2c)(i2c);
316319

320+
drv_data = device_get_match_data(i2c->dev);
317321
ret = rtl9300_i2c_config_chan(i2c, chan);
318322
if (ret)
319323
return ret;
320324

321325
xfer.dev_addr = addr & 0x7f;
322326
xfer.write = (read_write == I2C_SMBUS_WRITE);
323327
xfer.reg_addr = command;
324-
xfer.reg_addr_len = 1;
328+
xfer.reg_addr_len = drv_data->reg_addr_8bit_len;
325329

326330
switch (size) {
327331
case I2C_SMBUS_BYTE:
@@ -513,6 +517,7 @@ static const struct rtl9300_i2c_drv_data rtl9300_i2c_drv_data = {
513517
.wd_reg = RTL9300_I2C_MST_DATA_WORD0,
514518
.max_nchan = RTL9300_I2C_MUX_NCHAN,
515519
.max_data_len = RTL9300_I2C_MAX_DATA_LEN,
520+
.reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN,
516521
};
517522

518523
static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = {
@@ -536,6 +541,7 @@ static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = {
536541
.wd_reg = RTL9310_I2C_MST_DATA_CTRL,
537542
.max_nchan = RTL9310_I2C_MUX_NCHAN,
538543
.max_data_len = RTL9300_I2C_MAX_DATA_LEN,
544+
.reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN,
539545
};
540546

541547
static const struct of_device_id i2c_rtl9300_dt_ids[] = {

0 commit comments

Comments
 (0)