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miquelraynalbroonie
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spi: cadence-qspi: Revert the filtering of certain opcodes in ODTR
I got mislead while analyzing the driver by the fact that the second opcode byte was in all cases smashed: if (op->cmd.dtr) opcode = op->cmd.opcode >> 8; else opcode = op->cmd.opcode; While at a first glance this doesn't let a chance to the second byte to be shifted out on the bus, this is actually the second step of an initialization, where the byte being apparently "ignored" in DTR mode has already been written in a dedicated "extended opcode" register. As such, the comment and the extra check that I proposed were entirely wrong, remove them. Fixes: bee0854 ("spi: cadence-qspi: Make sure we filter out unsupported ops") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20260410-winbond-6-19-rc1-oddr-v1-1-2ac4827a3868@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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drivers/spi/spi-cadence-quadspi.c

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Original file line numberDiff line numberDiff line change
@@ -1544,10 +1544,6 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem,
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if (op->data.nbytes && op->data.buswidth != 8)
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return false;
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/* A single opcode is supported, it will be repeated */
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if ((op->cmd.opcode >> 8) != (op->cmd.opcode & 0xFF))
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return false;
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if (cqspi->is_rzn1)
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return false;
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} else if (!all_false) {

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