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airliedairlied
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Merge tag 'drm-msm-fixes-2026-03-06' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
Fixes for v7.0: Core: - Adjusted msm_iommu_pagetable_prealloc_allocate() allocation type DPU: - Fixed blue screens on Hamoa laptops by reverting the LM reservation - Fixed the size of the LM block on several platforms - Dropped usage of %pK (again) - Fixed smatch warning on SSPP v13+ code - Fixed INTF_6 interrupts on Lemans DSI: - Fixed DSI PHY revision on Kaanapali - Fixed pixel clock calculation for the bonded DSI mode panels with compression enabled DT bindings: - Fixed DisplayPort description on Glymur - Fixed model name in SM8750 MDSS schema GPU: - Added MODULE_DEVICE_TABLE to the GPU driver - Fix bogus protect error on X2-85 - Fix dma_free_attrs() buffer size - Gen8 UBWC fix for Glymur From: Rob Clark <rob.clark@oss.qualcomm.com> Link: https://patch.msgid.link/CACSVV00wZ95gFDLfzJ0Ywb8rsjPSjZ1aHdwE4smnyuZ=Fg-g8Q@mail.gmail.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2 parents 1f318b9 + e4eb11b commit 50ae4ce

18 files changed

Lines changed: 138 additions & 108 deletions

‎Documentation/devicetree/bindings/display/msm/dp-controller.yaml‎

Lines changed: 20 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -253,7 +253,6 @@ allOf:
253253
enum:
254254
# these platforms support 2 streams MST on some interfaces,
255255
# others are SST only
256-
- qcom,glymur-dp
257256
- qcom,sc8280xp-dp
258257
- qcom,x1e80100-dp
259258
then:
@@ -310,6 +309,26 @@ allOf:
310309
minItems: 6
311310
maxItems: 8
312311

312+
- if:
313+
properties:
314+
compatible:
315+
contains:
316+
enum:
317+
# these platforms support 2 streams MST on some interfaces,
318+
# others are SST only, but all controllers have 4 ports
319+
- qcom,glymur-dp
320+
then:
321+
properties:
322+
reg:
323+
minItems: 9
324+
maxItems: 9
325+
clocks:
326+
minItems: 5
327+
maxItems: 6
328+
clocks-names:
329+
minItems: 5
330+
maxItems: 6
331+
313332
unevaluatedProperties: false
314333

315334
examples:

‎Documentation/devicetree/bindings/display/msm/qcom,glymur-mdss.yaml‎

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -176,13 +176,17 @@ examples:
176176
};
177177
};
178178
179-
displayport-controller@ae90000 {
179+
displayport-controller@af54000 {
180180
compatible = "qcom,glymur-dp";
181-
reg = <0xae90000 0x200>,
182-
<0xae90200 0x200>,
183-
<0xae90400 0x600>,
184-
<0xae91000 0x400>,
185-
<0xae91400 0x400>;
181+
reg = <0xaf54000 0x200>,
182+
<0xaf54200 0x200>,
183+
<0xaf55000 0xc00>,
184+
<0xaf56000 0x400>,
185+
<0xaf57000 0x400>,
186+
<0xaf58000 0x400>,
187+
<0xaf59000 0x400>,
188+
<0xaf5a000 0x600>,
189+
<0xaf5b000 0x600>;
186190
187191
interrupt-parent = <&mdss>;
188192
interrupts = <12>;

‎Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ maintainers:
1010
- Krzysztof Kozlowski <krzk@kernel.org>
1111

1212
description:
13-
SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
13+
SM8750 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
1414
DPU display controller, DSI and DP interfaces etc.
1515

1616
$ref: /schemas/display/msm/mdss-common.yaml#

‎drivers/gpu/drm/msm/adreno/a2xx_gpummu.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ static void a2xx_gpummu_destroy(struct msm_mmu *mmu)
7878
{
7979
struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);
8080

81-
dma_free_attrs(mmu->dev, TABLE_SIZE, gpummu->table, gpummu->pt_base,
81+
dma_free_attrs(mmu->dev, TABLE_SIZE + 32, gpummu->table, gpummu->pt_base,
8282
DMA_ATTR_FORCE_CONTIGUOUS);
8383

8484
kfree(gpummu);

‎drivers/gpu/drm/msm/adreno/a6xx_catalog.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1759,7 +1759,7 @@ static const u32 x285_protect_regs[] = {
17591759
A6XX_PROTECT_NORDWR(0x27c06, 0x0000),
17601760
};
17611761

1762-
DECLARE_ADRENO_PROTECT(x285_protect, 64);
1762+
DECLARE_ADRENO_PROTECT(x285_protect, 15);
17631763

17641764
static const struct adreno_reglist_pipe a840_nonctxt_regs[] = {
17651765
{ REG_A8XX_CP_SMMU_STREAM_ID_LPAC, 0x00000101, BIT(PIPE_NONE) },
@@ -1966,5 +1966,4 @@ static inline __always_unused void __build_asserts(void)
19661966
BUILD_BUG_ON(a660_protect.count > a660_protect.count_max);
19671967
BUILD_BUG_ON(a690_protect.count > a690_protect.count_max);
19681968
BUILD_BUG_ON(a730_protect.count > a730_protect.count_max);
1969-
BUILD_BUG_ON(a840_protect.count > a840_protect.count_max);
19701969
}

‎drivers/gpu/drm/msm/adreno/a8xx_gpu.c‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -310,11 +310,21 @@ static void a8xx_set_ubwc_config(struct msm_gpu *gpu)
310310
hbb = cfg->highest_bank_bit - 13;
311311
hbb_hi = hbb >> 2;
312312
hbb_lo = hbb & 3;
313-
a8xx_write_pipe(gpu, PIPE_BV, REG_A8XX_GRAS_NC_MODE_CNTL, hbb << 5);
314-
a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_GRAS_NC_MODE_CNTL, hbb << 5);
313+
314+
a8xx_write_pipe(gpu, PIPE_BV, REG_A8XX_GRAS_NC_MODE_CNTL,
315+
hbb << 5 |
316+
level3_swizzling_dis << 4 |
317+
level2_swizzling_dis << 3);
318+
319+
a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_GRAS_NC_MODE_CNTL,
320+
hbb << 5 |
321+
level3_swizzling_dis << 4 |
322+
level2_swizzling_dis << 3);
315323

316324
a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_RB_CCU_NC_MODE_CNTL,
317325
yuvnotcomptofc << 6 |
326+
level3_swizzling_dis << 5 |
327+
level2_swizzling_dis << 4 |
318328
hbb_hi << 3 |
319329
hbb_lo << 1);
320330

‎drivers/gpu/drm/msm/adreno/adreno_device.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -302,6 +302,7 @@ static const struct of_device_id dt_match[] = {
302302
{ .compatible = "qcom,kgsl-3d0" },
303303
{}
304304
};
305+
MODULE_DEVICE_TABLE(of, dt_match);
305306

306307
static int adreno_runtime_resume(struct device *dev)
307308
{

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -133,46 +133,46 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
133133
static const struct dpu_lm_cfg sc8280xp_lm[] = {
134134
{
135135
.name = "lm_0", .id = LM_0,
136-
.base = 0x44000, .len = 0x320,
136+
.base = 0x44000, .len = 0x400,
137137
.features = MIXER_MSM8998_MASK,
138138
.sblk = &sdm845_lm_sblk,
139139
.lm_pair = LM_1,
140140
.pingpong = PINGPONG_0,
141141
.dspp = DSPP_0,
142142
}, {
143143
.name = "lm_1", .id = LM_1,
144-
.base = 0x45000, .len = 0x320,
144+
.base = 0x45000, .len = 0x400,
145145
.features = MIXER_MSM8998_MASK,
146146
.sblk = &sdm845_lm_sblk,
147147
.lm_pair = LM_0,
148148
.pingpong = PINGPONG_1,
149149
.dspp = DSPP_1,
150150
}, {
151151
.name = "lm_2", .id = LM_2,
152-
.base = 0x46000, .len = 0x320,
152+
.base = 0x46000, .len = 0x400,
153153
.features = MIXER_MSM8998_MASK,
154154
.sblk = &sdm845_lm_sblk,
155155
.lm_pair = LM_3,
156156
.pingpong = PINGPONG_2,
157157
.dspp = DSPP_2,
158158
}, {
159159
.name = "lm_3", .id = LM_3,
160-
.base = 0x47000, .len = 0x320,
160+
.base = 0x47000, .len = 0x400,
161161
.features = MIXER_MSM8998_MASK,
162162
.sblk = &sdm845_lm_sblk,
163163
.lm_pair = LM_2,
164164
.pingpong = PINGPONG_3,
165165
.dspp = DSPP_3,
166166
}, {
167167
.name = "lm_4", .id = LM_4,
168-
.base = 0x48000, .len = 0x320,
168+
.base = 0x48000, .len = 0x400,
169169
.features = MIXER_MSM8998_MASK,
170170
.sblk = &sdm845_lm_sblk,
171171
.lm_pair = LM_5,
172172
.pingpong = PINGPONG_4,
173173
}, {
174174
.name = "lm_5", .id = LM_5,
175-
.base = 0x49000, .len = 0x320,
175+
.base = 0x49000, .len = 0x400,
176176
.features = MIXER_MSM8998_MASK,
177177
.sblk = &sdm845_lm_sblk,
178178
.lm_pair = LM_4,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -134,46 +134,46 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
134134
static const struct dpu_lm_cfg sm8450_lm[] = {
135135
{
136136
.name = "lm_0", .id = LM_0,
137-
.base = 0x44000, .len = 0x320,
137+
.base = 0x44000, .len = 0x400,
138138
.features = MIXER_MSM8998_MASK,
139139
.sblk = &sdm845_lm_sblk,
140140
.lm_pair = LM_1,
141141
.pingpong = PINGPONG_0,
142142
.dspp = DSPP_0,
143143
}, {
144144
.name = "lm_1", .id = LM_1,
145-
.base = 0x45000, .len = 0x320,
145+
.base = 0x45000, .len = 0x400,
146146
.features = MIXER_MSM8998_MASK,
147147
.sblk = &sdm845_lm_sblk,
148148
.lm_pair = LM_0,
149149
.pingpong = PINGPONG_1,
150150
.dspp = DSPP_1,
151151
}, {
152152
.name = "lm_2", .id = LM_2,
153-
.base = 0x46000, .len = 0x320,
153+
.base = 0x46000, .len = 0x400,
154154
.features = MIXER_MSM8998_MASK,
155155
.sblk = &sdm845_lm_sblk,
156156
.lm_pair = LM_3,
157157
.pingpong = PINGPONG_2,
158158
.dspp = DSPP_2,
159159
}, {
160160
.name = "lm_3", .id = LM_3,
161-
.base = 0x47000, .len = 0x320,
161+
.base = 0x47000, .len = 0x400,
162162
.features = MIXER_MSM8998_MASK,
163163
.sblk = &sdm845_lm_sblk,
164164
.lm_pair = LM_2,
165165
.pingpong = PINGPONG_3,
166166
.dspp = DSPP_3,
167167
}, {
168168
.name = "lm_4", .id = LM_4,
169-
.base = 0x48000, .len = 0x320,
169+
.base = 0x48000, .len = 0x400,
170170
.features = MIXER_MSM8998_MASK,
171171
.sblk = &sdm845_lm_sblk,
172172
.lm_pair = LM_5,
173173
.pingpong = PINGPONG_4,
174174
}, {
175175
.name = "lm_5", .id = LM_5,
176-
.base = 0x49000, .len = 0x320,
176+
.base = 0x49000, .len = 0x400,
177177
.features = MIXER_MSM8998_MASK,
178178
.sblk = &sdm845_lm_sblk,
179179
.lm_pair = LM_4,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -366,8 +366,8 @@ static const struct dpu_intf_cfg sa8775p_intf[] = {
366366
.type = INTF_NONE,
367367
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
368368
.prog_fetch_lines_worst_case = 24,
369-
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),
370-
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),
369+
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),
370+
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),
371371
}, {
372372
.name = "intf_7", .id = INTF_7,
373373
.base = 0x3b000, .len = 0x280,

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