|
50 | 50 | #size-cells = <1>; |
51 | 51 | compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; |
52 | 52 | reg = <0xe0005000 0x1000>; |
53 | | - interrupts = <77 0x8>; |
| 53 | + interrupts = <77 IRQ_TYPE_LEVEL_LOW>; |
54 | 54 | interrupt-parent = <&ipic>; |
55 | 55 |
|
56 | 56 | // CS0 and CS1 are swapped when |
|
112 | 112 | cell-index = <0>; |
113 | 113 | compatible = "fsl-i2c"; |
114 | 114 | reg = <0x3000 0x100>; |
115 | | - interrupts = <14 0x8>; |
| 115 | + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; |
116 | 116 | interrupt-parent = <&ipic>; |
117 | 117 | dfsrr; |
118 | 118 | rtc@68 { |
|
133 | 133 | cell-index = <0>; |
134 | 134 | compatible = "fsl,spi"; |
135 | 135 | reg = <0x7000 0x1000>; |
136 | | - interrupts = <16 0x8>; |
| 136 | + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |
137 | 137 | interrupt-parent = <&ipic>; |
138 | 138 | mode = "cpu"; |
139 | 139 | }; |
|
145 | 145 | reg = <0x82a8 4>; |
146 | 146 | ranges = <0 0x8100 0x1a8>; |
147 | 147 | interrupt-parent = <&ipic>; |
148 | | - interrupts = <71 8>; |
| 148 | + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; |
149 | 149 | cell-index = <0>; |
150 | 150 | dma-channel@0 { |
151 | 151 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; |
152 | 152 | reg = <0 0x80>; |
153 | 153 | cell-index = <0>; |
154 | 154 | interrupt-parent = <&ipic>; |
155 | | - interrupts = <71 8>; |
| 155 | + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; |
156 | 156 | }; |
157 | 157 | dma-channel@80 { |
158 | 158 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; |
159 | 159 | reg = <0x80 0x80>; |
160 | 160 | cell-index = <1>; |
161 | 161 | interrupt-parent = <&ipic>; |
162 | | - interrupts = <71 8>; |
| 162 | + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; |
163 | 163 | }; |
164 | 164 | dma-channel@100 { |
165 | 165 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; |
166 | 166 | reg = <0x100 0x80>; |
167 | 167 | cell-index = <2>; |
168 | 168 | interrupt-parent = <&ipic>; |
169 | | - interrupts = <71 8>; |
| 169 | + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; |
170 | 170 | }; |
171 | 171 | dma-channel@180 { |
172 | 172 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; |
173 | 173 | reg = <0x180 0x28>; |
174 | 174 | cell-index = <3>; |
175 | 175 | interrupt-parent = <&ipic>; |
176 | | - interrupts = <71 8>; |
| 176 | + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; |
177 | 177 | }; |
178 | 178 | }; |
179 | 179 |
|
|
183 | 183 | #address-cells = <1>; |
184 | 184 | #size-cells = <0>; |
185 | 185 | interrupt-parent = <&ipic>; |
186 | | - interrupts = <38 0x8>; |
| 186 | + interrupts = <38 IRQ_TYPE_LEVEL_LOW>; |
187 | 187 | phy_type = "utmi"; |
188 | 188 | }; |
189 | 189 |
|
|
197 | 197 | reg = <0x24000 0x1000>; |
198 | 198 | ranges = <0x0 0x24000 0x1000>; |
199 | 199 | local-mac-address = [ 00 00 00 00 00 00 ]; |
200 | | - interrupts = <32 0x8 33 0x8 34 0x8>; |
| 200 | + interrupts = <32 IRQ_TYPE_LEVEL_LOW>, |
| 201 | + <33 IRQ_TYPE_LEVEL_LOW>, |
| 202 | + <34 IRQ_TYPE_LEVEL_LOW>; |
201 | 203 | interrupt-parent = <&ipic>; |
202 | 204 | tbi-handle = <&tbi0>; |
203 | 205 | phy-handle = < &phy0 >; |
|
238 | 240 | reg = <0x25000 0x1000>; |
239 | 241 | ranges = <0x0 0x25000 0x1000>; |
240 | 242 | local-mac-address = [ 00 00 00 00 00 00 ]; |
241 | | - interrupts = <35 0x8 36 0x8 37 0x8>; |
| 243 | + interrupts = <35 IRQ_TYPE_LEVEL_LOW>, |
| 244 | + <36 IRQ_TYPE_LEVEL_LOW>, |
| 245 | + <37 IRQ_TYPE_LEVEL_LOW>; |
242 | 246 | interrupt-parent = <&ipic>; |
243 | 247 | tbi-handle = <&tbi1>; |
244 | 248 | phy-handle = < &phy1 >; |
|
263 | 267 | compatible = "fsl,ns16550", "ns16550"; |
264 | 268 | reg = <0x4500 0x100>; |
265 | 269 | clock-frequency = <133333333>; |
266 | | - interrupts = <9 0x8>; |
| 270 | + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; |
267 | 271 | interrupt-parent = <&ipic>; |
268 | 272 | }; |
269 | 273 |
|
|
273 | 277 | compatible = "fsl,ns16550", "ns16550"; |
274 | 278 | reg = <0x4600 0x100>; |
275 | 279 | clock-frequency = <133333333>; |
276 | | - interrupts = <10 0x8>; |
| 280 | + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; |
277 | 281 | interrupt-parent = <&ipic>; |
278 | 282 | }; |
279 | 283 |
|
|
282 | 286 | "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", |
283 | 287 | "fsl,sec2.0"; |
284 | 288 | reg = <0x30000 0x10000>; |
285 | | - interrupts = <11 0x8>; |
| 289 | + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |
286 | 290 | interrupt-parent = <&ipic>; |
287 | 291 | fsl,num-channels = <4>; |
288 | 292 | fsl,channel-fifo-len = <24>; |
|
294 | 298 | compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; |
295 | 299 | reg = <0x18000 0x1000>; |
296 | 300 | cell-index = <1>; |
297 | | - interrupts = <44 0x8>; |
| 301 | + interrupts = <44 IRQ_TYPE_LEVEL_LOW>; |
298 | 302 | interrupt-parent = <&ipic>; |
299 | 303 | }; |
300 | 304 |
|
301 | 305 | sata@19000 { |
302 | 306 | compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; |
303 | 307 | reg = <0x19000 0x1000>; |
304 | 308 | cell-index = <2>; |
305 | | - interrupts = <45 0x8>; |
| 309 | + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; |
306 | 310 | interrupt-parent = <&ipic>; |
307 | 311 | }; |
308 | 312 |
|
309 | 313 | gtm1: timer@500 { |
310 | 314 | compatible = "fsl,mpc8315-gtm", "fsl,gtm"; |
311 | 315 | reg = <0x500 0x100>; |
312 | | - interrupts = <90 8 78 8 84 8 72 8>; |
| 316 | + interrupts = <90 IRQ_TYPE_LEVEL_LOW>, |
| 317 | + <78 IRQ_TYPE_LEVEL_LOW>, |
| 318 | + <84 IRQ_TYPE_LEVEL_LOW>, |
| 319 | + <72 IRQ_TYPE_LEVEL_LOW>; |
313 | 320 | interrupt-parent = <&ipic>; |
314 | 321 | clock-frequency = <133333333>; |
315 | 322 | }; |
316 | 323 |
|
317 | 324 | timer@600 { |
318 | 325 | compatible = "fsl,mpc8315-gtm", "fsl,gtm"; |
319 | 326 | reg = <0x600 0x100>; |
320 | | - interrupts = <91 8 79 8 85 8 73 8>; |
| 327 | + interrupts = <91 IRQ_TYPE_LEVEL_LOW>, |
| 328 | + <79 IRQ_TYPE_LEVEL_LOW>, |
| 329 | + <85 IRQ_TYPE_LEVEL_LOW>, |
| 330 | + <73 IRQ_TYPE_LEVEL_LOW>; |
321 | 331 | interrupt-parent = <&ipic>; |
322 | 332 | clock-frequency = <133333333>; |
323 | 333 | }; |
324 | 334 |
|
325 | 335 | /* IPIC |
326 | | - * interrupts cell = <intr #, sense> |
327 | | - * sense values match linux IORESOURCE_IRQ_* defines: |
328 | | - * sense == 8: Level, low assertion |
329 | | - * sense == 2: Edge, high-to-low change |
| 336 | + * interrupts cell = <intr #, type> |
330 | 337 | */ |
331 | 338 | ipic: interrupt-controller@700 { |
332 | 339 | interrupt-controller; |
|
340 | 347 | compatible = "fsl,ipic-msi"; |
341 | 348 | reg = <0x7c0 0x40>; |
342 | 349 | msi-available-ranges = <0 0x100>; |
343 | | - interrupts = <0x43 0x8 |
344 | | - 0x4 0x8 |
345 | | - 0x51 0x8 |
346 | | - 0x52 0x8 |
347 | | - 0x56 0x8 |
348 | | - 0x57 0x8 |
349 | | - 0x58 0x8 |
350 | | - 0x59 0x8>; |
| 350 | + interrupts = <0x43 IRQ_TYPE_LEVEL_LOW |
| 351 | + 0x4 IRQ_TYPE_LEVEL_LOW |
| 352 | + 0x51 IRQ_TYPE_LEVEL_LOW |
| 353 | + 0x52 IRQ_TYPE_LEVEL_LOW |
| 354 | + 0x56 IRQ_TYPE_LEVEL_LOW |
| 355 | + 0x57 IRQ_TYPE_LEVEL_LOW |
| 356 | + 0x58 IRQ_TYPE_LEVEL_LOW |
| 357 | + 0x59 IRQ_TYPE_LEVEL_LOW>; |
351 | 358 | interrupt-parent = < &ipic >; |
352 | 359 | }; |
353 | 360 |
|
354 | 361 | pmc: power@b00 { |
355 | 362 | compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", |
356 | 363 | "fsl,mpc8349-pmc"; |
357 | 364 | reg = <0xb00 0x100 0xa00 0x100>; |
358 | | - interrupts = <80 8>; |
| 365 | + interrupts = <80 IRQ_TYPE_LEVEL_LOW>; |
359 | 366 | interrupt-parent = <&ipic>; |
360 | 367 | fsl,mpc8313-wakeup-timer = <>m1>; |
361 | 368 | }; |
|
374 | 381 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
375 | 382 | interrupt-map = < |
376 | 383 | /* IDSEL 0x0E -mini PCI */ |
377 | | - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 |
378 | | - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 |
379 | | - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 |
380 | | - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 |
| 384 | + 0x7000 0x0 0x0 0x1 &ipic 18 IRQ_TYPE_LEVEL_LOW |
| 385 | + 0x7000 0x0 0x0 0x2 &ipic 18 IRQ_TYPE_LEVEL_LOW |
| 386 | + 0x7000 0x0 0x0 0x3 &ipic 18 IRQ_TYPE_LEVEL_LOW |
| 387 | + 0x7000 0x0 0x0 0x4 &ipic 18 IRQ_TYPE_LEVEL_LOW |
381 | 388 |
|
382 | 389 | /* IDSEL 0x0F -mini PCI */ |
383 | | - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 |
384 | | - 0x7800 0x0 0x0 0x2 &ipic 17 0x8 |
385 | | - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 |
386 | | - 0x7800 0x0 0x0 0x4 &ipic 17 0x8 |
| 390 | + 0x7800 0x0 0x0 0x1 &ipic 17 IRQ_TYPE_LEVEL_LOW |
| 391 | + 0x7800 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW |
| 392 | + 0x7800 0x0 0x0 0x3 &ipic 17 IRQ_TYPE_LEVEL_LOW |
| 393 | + 0x7800 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW |
387 | 394 |
|
388 | 395 | /* IDSEL 0x10 - PCI slot */ |
389 | | - 0x8000 0x0 0x0 0x1 &ipic 48 0x8 |
390 | | - 0x8000 0x0 0x0 0x2 &ipic 17 0x8 |
391 | | - 0x8000 0x0 0x0 0x3 &ipic 48 0x8 |
392 | | - 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; |
| 396 | + 0x8000 0x0 0x0 0x1 &ipic 48 IRQ_TYPE_LEVEL_LOW |
| 397 | + 0x8000 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW |
| 398 | + 0x8000 0x0 0x0 0x3 &ipic 48 IRQ_TYPE_LEVEL_LOW |
| 399 | + 0x8000 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW>; |
393 | 400 | interrupt-parent = <&ipic>; |
394 | | - interrupts = <66 0x8>; |
| 401 | + interrupts = <66 IRQ_TYPE_LEVEL_LOW>; |
395 | 402 | bus-range = <0x0 0x0>; |
396 | 403 | ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 |
397 | 404 | 0x42000000 0 0x80000000 0x80000000 0 0x10000000 |
|
417 | 424 | 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; |
418 | 425 | bus-range = <0 255>; |
419 | 426 | interrupt-map-mask = <0xf800 0 0 7>; |
420 | | - interrupt-map = <0 0 0 1 &ipic 1 8 |
421 | | - 0 0 0 2 &ipic 1 8 |
422 | | - 0 0 0 3 &ipic 1 8 |
423 | | - 0 0 0 4 &ipic 1 8>; |
| 427 | + interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW |
| 428 | + 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW |
| 429 | + 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW |
| 430 | + 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>; |
424 | 431 | clock-frequency = <0>; |
425 | 432 |
|
426 | 433 | pcie@0 { |
|
448 | 455 | 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; |
449 | 456 | bus-range = <0 255>; |
450 | 457 | interrupt-map-mask = <0xf800 0 0 7>; |
451 | | - interrupt-map = <0 0 0 1 &ipic 2 8 |
452 | | - 0 0 0 2 &ipic 2 8 |
453 | | - 0 0 0 3 &ipic 2 8 |
454 | | - 0 0 0 4 &ipic 2 8>; |
| 458 | + interrupt-map = <0 0 0 1 &ipic 2 IRQ_TYPE_LEVEL_LOW |
| 459 | + 0 0 0 2 &ipic 2 IRQ_TYPE_LEVEL_LOW |
| 460 | + 0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW |
| 461 | + 0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>; |
455 | 462 | clock-frequency = <0>; |
456 | 463 |
|
457 | 464 | pcie@0 { |
|
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