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drm/msm/dpu: correct DP MST interface configuration
Due to historical reasons we ended up with dummy values being specified for MST-related interfaces some of them had INTF_NONE, others had non-existing DP controller indices. Those workarounds are no longer necessary. Fix types and indices for all DP-MST related INTF instances. The only exception is INTF_3 on SC8180X, which has unique design. It can be used either with INTF_0 / DP0 or with INTF_4 / DP1. This interface is left with the dummy value until somebody implements necessary bits for that platform. Co-developed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/713988/ Link: https://lore.kernel.org/r/20260325-fix-dp-mst-interfaces-v1-1-186d1de3fa1b@oss.qualcomm.com
1 parent e224e3a commit 469df8c

16 files changed

Lines changed: 28 additions & 31 deletions

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -377,7 +377,7 @@ static const struct dpu_intf_cfg sm8650_intf[] = {
377377
.name = "intf_3", .id = INTF_3,
378378
.base = 0x37000, .len = 0x280,
379379
.type = INTF_DP,
380-
.controller_id = MSM_DP_CONTROLLER_1,
380+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
381381
.prog_fetch_lines_worst_case = 24,
382382
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
383383
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_12_0_sm8750.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -419,7 +419,7 @@ static const struct dpu_intf_cfg sm8750_intf[] = {
419419
.name = "intf_3", .id = INTF_3,
420420
.base = 0x37000, .len = 0x4bc,
421421
.type = INTF_DP,
422-
.controller_id = MSM_DP_CONTROLLER_1,
422+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
423423
.prog_fetch_lines_worst_case = 24,
424424
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
425425
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_12_2_glymur.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -425,7 +425,7 @@ static const struct dpu_intf_cfg glymur_intf[] = {
425425
}, {
426426
.name = "intf_3", .id = INTF_3,
427427
.base = 0x37000, .len = 0x400,
428-
.type = INTF_NONE,
428+
.type = INTF_DP,
429429
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
430430
.prog_fetch_lines_worst_case = 24,
431431
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
@@ -457,15 +457,15 @@ static const struct dpu_intf_cfg glymur_intf[] = {
457457
}, {
458458
.name = "intf_7", .id = INTF_7,
459459
.base = 0x3b000, .len = 0x400,
460-
.type = INTF_NONE,
460+
.type = INTF_DP,
461461
.controller_id = MSM_DP_CONTROLLER_2, /* pair with intf_6 for DP MST */
462462
.prog_fetch_lines_worst_case = 24,
463463
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 18),
464464
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 19),
465465
}, {
466466
.name = "intf_8", .id = INTF_8,
467467
.base = 0x3c000, .len = 0x400,
468-
.type = INTF_NONE,
468+
.type = INTF_DP,
469469
.controller_id = MSM_DP_CONTROLLER_1, /* pair with intf_4 for DP MST */
470470
.prog_fetch_lines_worst_case = 24,
471471
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_13_0_kaanapali.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -417,7 +417,7 @@ static const struct dpu_intf_cfg kaanapali_intf[] = {
417417
.name = "intf_3", .id = INTF_3,
418418
.base = 0x190000, .len = 0x4bc,
419419
.type = INTF_DP,
420-
.controller_id = MSM_DP_CONTROLLER_1,
420+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
421421
.prog_fetch_lines_worst_case = 24,
422422
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
423423
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -258,7 +258,7 @@ static const struct dpu_intf_cfg sdm845_intf[] = {
258258
.name = "intf_3", .id = INTF_3,
259259
.base = 0x6b800, .len = 0x280,
260260
.type = INTF_DP,
261-
.controller_id = MSM_DP_CONTROLLER_1,
261+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
262262
.prog_fetch_lines_worst_case = 24,
263263
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
264264
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -316,7 +316,7 @@ static const struct dpu_intf_cfg sm8150_intf[] = {
316316
.name = "intf_3", .id = INTF_3,
317317
.base = 0x6b800, .len = 0x280,
318318
.type = INTF_DP,
319-
.controller_id = MSM_DP_CONTROLLER_1,
319+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
320320
.prog_fetch_lines_worst_case = 24,
321321
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
322322
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -230,7 +230,7 @@ static const struct dpu_intf_cfg sm7150_intf[] = {
230230
.name = "intf_3", .id = INTF_3,
231231
.base = 0x6b800, .len = 0x280,
232232
.type = INTF_DP,
233-
.controller_id = MSM_DP_CONTROLLER_1,
233+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
234234
.prog_fetch_lines_worst_case = 24,
235235
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
236236
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,7 @@ static const struct dpu_intf_cfg sm6150_intf[] = {
185185
.name = "intf_3", .id = INTF_3,
186186
.base = 0x6b800, .len = 0x280,
187187
.type = INTF_DP,
188-
.controller_id = MSM_DP_CONTROLLER_1,
188+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
189189
.prog_fetch_lines_worst_case = 24,
190190
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
191191
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -301,7 +301,7 @@ static const struct dpu_intf_cfg sm8250_intf[] = {
301301
.name = "intf_3", .id = INTF_3,
302302
.base = 0x6b800, .len = 0x280,
303303
.type = INTF_DP,
304-
.controller_id = MSM_DP_CONTROLLER_1,
304+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
305305
.prog_fetch_lines_worst_case = 24,
306306
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
307307
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -326,7 +326,7 @@ static const struct dpu_intf_cfg sm8350_intf[] = {
326326
.name = "intf_3", .id = INTF_3,
327327
.base = 0x37000, .len = 0x280,
328328
.type = INTF_DP,
329-
.controller_id = MSM_DP_CONTROLLER_1,
329+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
330330
.prog_fetch_lines_worst_case = 24,
331331
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
332332
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),

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