Skip to content

Commit 456eb49

Browse files
Josua-SRnxpfrankli
Josua-SR
authored and
nxpfrankli
committed
arm64: dts: lx2160a: rename pinmux nodes for readability
LX2160A pinmux is done in groups by various length bitfields within configuration registers. Each group of pins is named in the reference manual after a primary function using soc-specific naming, e.g. IIC1 (for i2c0). Hardware block numbering starts from zero in device-tree but one in the reference manual. Rename the already defined pinmux nodes originally added for changing i2c pins between i2c and gpio functions reflecting the reference manual name (IIC) in the node name, and the device-tree name (i2c, gpio) in the label. Specifically, drop the "_scl" suffix from the I2C labels because the nodes actually configure both SDA and SCL pins together. Instead add "_pins" suffix to avoid conflicts with I2C controller labels. For GPIO functions, include the specific controller and pin numbers in the label to clarify they are generic GPIOs and help spot mistakes. No functional change intended. Fixes: 8a1365c ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery") Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
1 parent 325ca51 commit 456eb49

1 file changed

Lines changed: 32 additions & 32 deletions

File tree

‎arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi‎

Lines changed: 32 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -750,8 +750,8 @@
750750
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
751751
QORIQ_CLK_PLL_DIV(16)>;
752752
pinctrl-names = "default", "gpio";
753-
pinctrl-0 = <&i2c0_scl>;
754-
pinctrl-1 = <&i2c0_scl_gpio>;
753+
pinctrl-0 = <&i2c0_pins>;
754+
pinctrl-1 = <&gpio0_3_2_pins>;
755755
scl-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
756756
status = "disabled";
757757
};
@@ -766,8 +766,8 @@
766766
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
767767
QORIQ_CLK_PLL_DIV(16)>;
768768
pinctrl-names = "default", "gpio";
769-
pinctrl-0 = <&i2c1_scl>;
770-
pinctrl-1 = <&i2c1_scl_gpio>;
769+
pinctrl-0 = <&i2c1_pins>;
770+
pinctrl-1 = <&gpio0_31_30_pins>;
771771
scl-gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
772772
status = "disabled";
773773
};
@@ -782,8 +782,8 @@
782782
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
783783
QORIQ_CLK_PLL_DIV(16)>;
784784
pinctrl-names = "default", "gpio";
785-
pinctrl-0 = <&i2c2_scl>;
786-
pinctrl-1 = <&i2c2_scl_gpio>;
785+
pinctrl-0 = <&i2c2_pins>;
786+
pinctrl-1 = <&gpio0_29_28_pins>;
787787
scl-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
788788
status = "disabled";
789789
};
@@ -798,8 +798,8 @@
798798
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
799799
QORIQ_CLK_PLL_DIV(16)>;
800800
pinctrl-names = "default", "gpio";
801-
pinctrl-0 = <&i2c3_scl>;
802-
pinctrl-1 = <&i2c3_scl_gpio>;
801+
pinctrl-0 = <&i2c3_pins>;
802+
pinctrl-1 = <&gpio0_27_26_pins>;
803803
scl-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
804804
status = "disabled";
805805
};
@@ -814,8 +814,8 @@
814814
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
815815
QORIQ_CLK_PLL_DIV(16)>;
816816
pinctrl-names = "default", "gpio";
817-
pinctrl-0 = <&i2c4_scl>;
818-
pinctrl-1 = <&i2c4_scl_gpio>;
817+
pinctrl-0 = <&i2c4_pins>;
818+
pinctrl-1 = <&gpio0_25_24_pins>;
819819
scl-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
820820
status = "disabled";
821821
};
@@ -830,8 +830,8 @@
830830
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
831831
QORIQ_CLK_PLL_DIV(16)>;
832832
pinctrl-names = "default", "gpio";
833-
pinctrl-0 = <&i2c5_scl>;
834-
pinctrl-1 = <&i2c5_scl_gpio>;
833+
pinctrl-0 = <&i2c5_pins>;
834+
pinctrl-1 = <&gpio0_23_22_pins>;
835835
scl-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
836836
status = "disabled";
837837
};
@@ -846,8 +846,8 @@
846846
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
847847
QORIQ_CLK_PLL_DIV(16)>;
848848
pinctrl-names = "default", "gpio";
849-
pinctrl-0 = <&i2c6_scl>;
850-
pinctrl-1 = <&i2c6_scl_gpio>;
849+
pinctrl-0 = <&i2c6_i2c7_pins>;
850+
pinctrl-1 = <&gpio1_18_15_pins>;
851851
scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
852852
status = "disabled";
853853
};
@@ -862,8 +862,8 @@
862862
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
863863
QORIQ_CLK_PLL_DIV(16)>;
864864
pinctrl-names = "default", "gpio";
865-
pinctrl-0 = <&i2c6_scl>;
866-
pinctrl-1 = <&i2c6_scl_gpio>;
865+
pinctrl-0 = <&i2c6_i2c7_pins>;
866+
pinctrl-1 = <&gpio1_18_15_pins>;
867867
scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
868868
status = "disabled";
869869
};
@@ -1713,47 +1713,47 @@
17131713
pinctrl-single,register-width = <32>;
17141714
pinctrl-single,function-mask = <0x7>;
17151715

1716-
i2c1_scl: i2c1-scl-pins {
1716+
i2c1_pins: iic2-i2c-pins {
17171717
pinctrl-single,bits = <0x0 0 0x7>;
17181718
};
17191719

1720-
i2c1_scl_gpio: i2c1-scl-gpio-pins {
1720+
gpio0_31_30_pins: iic2-gpio-pins {
17211721
pinctrl-single,bits = <0x0 0x1 0x7>;
17221722
};
17231723

17241724
esdhc0_cd_wp_pins: iic2-sdhc-pins {
17251725
pinctrl-single,bits = <0x0 0x6 0x7>;
17261726
};
17271727

1728-
i2c2_scl: i2c2-scl-pins {
1728+
i2c2_pins: iic3-i2c-pins {
17291729
pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
17301730
};
17311731

1732-
i2c2_scl_gpio: i2c2-scl-gpio-pins {
1732+
gpio0_29_28_pins: iic3-gpio-pins {
17331733
pinctrl-single,bits = <0x0 (0x1 << 3) (0x7 << 3)>;
17341734
};
17351735

1736-
i2c3_scl: i2c3-scl-pins {
1736+
i2c3_pins: iic4-i2c-pins {
17371737
pinctrl-single,bits = <0x0 0 (0x7 << 6)>;
17381738
};
17391739

1740-
i2c3_scl_gpio: i2c3-scl-gpio-pins {
1740+
gpio0_27_26_pins: iic4-gpio-pins {
17411741
pinctrl-single,bits = <0x0 (0x1 << 6) (0x7 << 6)>;
17421742
};
17431743

1744-
i2c4_scl: i2c4-scl-pins {
1744+
i2c4_pins: iic5-i2c-pins {
17451745
pinctrl-single,bits = <0x0 0 (0x7 << 9)>;
17461746
};
17471747

1748-
i2c4_scl_gpio: i2c4-scl-gpio-pins {
1748+
gpio0_25_24_pins: iic5-gpio-pins {
17491749
pinctrl-single,bits = <0x0 (0x1 << 9) (0x7 << 9)>;
17501750
};
17511751

1752-
i2c5_scl: i2c5-scl-pins {
1752+
i2c5_pins: iic6-i2c-pins {
17531753
pinctrl-single,bits = <0x0 0 (0x7 << 12)>;
17541754
};
17551755

1756-
i2c5_scl_gpio: i2c5-scl-gpio-pins {
1756+
gpio0_23_22_pins: iic6-gpio-pins {
17571757
pinctrl-single,bits = <0x0 (0x1 << 12) (0x7 << 12)>;
17581758
};
17591759

@@ -1777,19 +1777,19 @@
17771777
pinctrl-single,bits = <0x0 (0x1 << 27) (0x7 << 27)>;
17781778
};
17791779

1780-
i2c6_scl: i2c6-scl-pins {
1781-
pinctrl-single,bits = <0x4 0x2 0x7>;
1780+
gpio1_18_15_pins: iic8-iic7-gpio-pins {
1781+
pinctrl-single,bits = <0x4 0x1 0x7>;
17821782
};
17831783

1784-
i2c6_scl_gpio: i2c6-scl-gpio-pins {
1785-
pinctrl-single,bits = <0x4 0x1 0x7>;
1784+
i2c6_i2c7_pins: iic8-iic7-i2c-pins {
1785+
pinctrl-single,bits = <0x4 0x2 0x7>;
17861786
};
17871787

1788-
i2c0_scl: i2c0-scl-pins {
1788+
i2c0_pins: iic1-i2c-pins {
17891789
pinctrl-single,bits = <0x8 0x0 (0x1 << 10)>;
17901790
};
17911791

1792-
i2c0_scl_gpio: i2c0-scl-gpio-pins {
1792+
gpio0_3_2_pins: iic1-gpio-pins {
17931793
pinctrl-single,bits = <0x8 (0x1 << 10) (0x1 << 10)>;
17941794
};
17951795
};

0 commit comments

Comments
 (0)