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jgunthorpejoergroedel
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iommu/riscv: Remove overflows on the invalidation path
Since RISC-V supports a sign extended page table it should support a gather->end of ULONG_MAX, but if this happens it will infinite loop because of the overflow. Also avoid overflow computing the length by moving the +1 to the other side of the < Fixes: 488ffbf ("iommu/riscv: Paging domain support") Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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Lines changed: 6 additions & 5 deletions

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drivers/iommu/riscv/iommu.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -931,8 +931,6 @@ static void riscv_iommu_iotlb_inval(struct riscv_iommu_domain *domain,
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struct riscv_iommu_bond *bond;
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struct riscv_iommu_device *iommu, *prev;
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struct riscv_iommu_command cmd;
934-
unsigned long len = end - start + 1;
935-
unsigned long iova;
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/*
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* For each IOMMU linked with this protection domain (via bonds->dev),
@@ -975,11 +973,14 @@ static void riscv_iommu_iotlb_inval(struct riscv_iommu_domain *domain,
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riscv_iommu_cmd_inval_vma(&cmd);
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riscv_iommu_cmd_inval_set_pscid(&cmd, domain->pscid);
978-
if (len && len < RISCV_IOMMU_IOTLB_INVAL_LIMIT) {
979-
for (iova = start; iova < end; iova += PAGE_SIZE) {
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if (end - start < RISCV_IOMMU_IOTLB_INVAL_LIMIT - 1) {
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unsigned long iova = start;
978+
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do {
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riscv_iommu_cmd_inval_set_addr(&cmd, iova);
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riscv_iommu_cmd_send(iommu, &cmd);
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}
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} while (!check_add_overflow(iova, PAGE_SIZE, &iova) &&
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iova < end);
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} else {
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riscv_iommu_cmd_send(iommu, &cmd);
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}

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