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mtd: spinand: winbond: Clarify when to enable the HS bit
Above 104MHz when in fast dual or quad I/O reads, the delay between address and data cycles is too short. It is possible to reach higher frequencies, up to 166MHz, by adding a few more dummy cycles through the setting of the HS bit. Improve the condition for enabling this bit, and also make sure we set it at soon as we go over 104MHz. Fixes: f1a9117 ("mtd: spinand: winbond: Enable high-speed modes on w25n0xjw") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Lines changed: 8 additions & 5 deletions

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drivers/mtd/nand/spi/winbond.c

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -337,16 +337,19 @@ static int w25n0xjw_hs_cfg(struct spinand_device *spinand,
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if (iface != SSDR)
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return -EOPNOTSUPP;
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/*
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* SDR dual and quad I/O operations over 104MHz require the HS bit to
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* enable a few more dummy cycles.
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*/
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op = spinand->op_templates->read_cache;
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if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
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hs = false;
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else if (op->cmd.buswidth == 1 && op->addr.buswidth == 1 &&
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op->dummy.buswidth == 1 && op->data.buswidth == 1)
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else if (op->cmd.buswidth != 1 || op->addr.buswidth == 1)
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hs = false;
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else if (!op->max_freq)
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hs = true;
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else
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else if (op->max_freq && op->max_freq <= 104 * HZ_PER_MHZ)
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hs = false;
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else
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hs = true;
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ret = spinand_read_reg_op(spinand, W25N0XJW_SR4, &sr4);
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if (ret)

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