tools arch x86: Sync msr-index.h to pick MSR_{OMR_[0-3],CORE_PERF_GLOBAL_STATUS_SET}

To pick up the changes in:

  4e955c0 ("perf/x86/intel: Support the 4 new OMR MSRs introduced in DMR and NVL")
  736a2dc ("x86/CPU/AMD: Simplify the spectral chicken fix")
  56bb273 ("KVM: x86/pmu: Load/put mediated PMU context when entering/exiting guest")

Addressing this tools/perf build warning:

  Warning: Kernel ABI header differences:
    diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h

That makes the beautification scripts to pick some new entries:

  $ tools/perf/trace/beauty/tracepoints/x86_msr.sh > before.txt
  $ cp arch/x86/include/asm/msr-index.h tools/arch/x86/include/asm/msr-index.h
  $ tools/perf/trace/beauty/tracepoints/x86_msr.sh > after.txt
  $ diff -u before.txt after.txt
  --- before.txt	2026-03-04 17:21:39.165956041 -0300
  +++ after.txt	2026-03-04 17:21:52.479191640 -0300
  @@ -130,6 +130,11 @@
   	[0x0000038e] = "CORE_PERF_GLOBAL_STATUS",
   	[0x0000038f] = "CORE_PERF_GLOBAL_CTRL",
   	[0x00000390] = "CORE_PERF_GLOBAL_OVF_CTRL",
  +	[0x00000391] = "CORE_PERF_GLOBAL_STATUS_SET",
  +	[0x000003e0] = "OMR_0",
  +	[0x000003e1] = "OMR_1",
  +	[0x000003e2] = "OMR_2",
  +	[0x000003e3] = "OMR_3",
   	[0x000003f1] = "IA32_PEBS_ENABLE",
   	[0x000003f2] = "PEBS_DATA_CFG",
   	[0x000003f4] = "IA32_PEBS_BASE",
  $

Now one can use those strings in 'perf trace' to do filtering, e.g.:

  # perf trace -e msr:*_msr/max-stack=32/ --filter="msr==CORE_PERF_GLOBAL_STATUS_SET"

Cc: Borislav Petkov (AMD) <bp@alien8.de>
Cc: Dapeng Mi <dapeng1.mi@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sean Christopherson <seanjc@google.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

Author: acmel

tools/arch/x86/include/asm/msr-index.h

@@ -263,6 +263,11 @@
 #define MSR_SNOOP_RSP_0			0x00001328
 #define MSR_SNOOP_RSP_1			0x00001329
 
+#define MSR_OMR_0			0x000003e0
+#define MSR_OMR_1			0x000003e1
+#define MSR_OMR_2			0x000003e2
+#define MSR_OMR_3			0x000003e3
+
 #define MSR_LBR_SELECT			0x000001c8
 #define MSR_LBR_TOS			0x000001c9
 
@@ -1219,6 +1224,7 @@
 #define MSR_CORE_PERF_GLOBAL_STATUS	0x0000038e
 #define MSR_CORE_PERF_GLOBAL_CTRL	0x0000038f
 #define MSR_CORE_PERF_GLOBAL_OVF_CTRL	0x00000390
+#define MSR_CORE_PERF_GLOBAL_STATUS_SET	0x00000391
 
 #define MSR_PERF_METRICS		0x00000329