|
| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
| 2 | +/* |
| 3 | + * 2017 Copyright (c) Seeed Technology Inc. All right reserved. |
| 4 | + * Author: Baozhu Zuo <zuobaozhu@gmail.com> |
| 5 | + * Copyright (c) Bootlin 2026 |
| 6 | + * |
| 7 | + * This device tree overlay is compatible with the BeagleBone Black, Green |
| 8 | + * and their subversions. |
| 9 | + */ |
| 10 | + |
| 11 | +/dts-v1/; |
| 12 | +/plugin/; |
| 13 | + |
| 14 | +#include <dt-bindings/pinctrl/am33xx.h> |
| 15 | +#include <dt-bindings/interrupt-controller/irq.h> |
| 16 | + |
| 17 | +&{/} { |
| 18 | + hdmi0: connector-hdmi { |
| 19 | + compatible = "hdmi-connector"; |
| 20 | + label = "hdmi"; |
| 21 | + type = "a"; |
| 22 | + port { |
| 23 | + hdmi_connector_in: endpoint { |
| 24 | + remote-endpoint = <&it66121_out>; |
| 25 | + }; |
| 26 | + }; |
| 27 | + }; |
| 28 | + |
| 29 | + clk_mcasp0_fixed: clk-mcasp0-fixed { |
| 30 | + #clock-cells = <0>; |
| 31 | + compatible = "fixed-clock"; |
| 32 | + clock-frequency = <24576000>; |
| 33 | + }; |
| 34 | + |
| 35 | + clk_mcasp0: clk-mcasp0 { |
| 36 | + #clock-cells = <0>; |
| 37 | + compatible = "gpio-gate-clock"; |
| 38 | + clocks = <&clk_mcasp0_fixed>; |
| 39 | + enable-gpios = <&gpio1 27 0>; |
| 40 | + }; |
| 41 | + |
| 42 | + sound { |
| 43 | + compatible = "simple-audio-card"; |
| 44 | + simple-audio-card,name = "TI BeagleBone Green HDMI cape"; |
| 45 | + simple-audio-card,format = "i2s"; |
| 46 | + simple-audio-card,bitclock-master = <&sound_master>; |
| 47 | + simple-audio-card,frame-master = <&sound_master>; |
| 48 | + |
| 49 | + sound_master: simple-audio-card,cpu { |
| 50 | + sound-dai = <&mcasp0>; |
| 51 | + clocks = <&clk_mcasp0>; |
| 52 | + }; |
| 53 | + |
| 54 | + simple-audio-card,codec { |
| 55 | + sound-dai = <&it66121>; |
| 56 | + }; |
| 57 | + }; |
| 58 | +}; |
| 59 | + |
| 60 | +&am33xx_pinmux { |
| 61 | + bb_lcd_pins: pinmux-bb-lcd-pins { |
| 62 | + pinctrl-single,pins = < |
| 63 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) |
| 64 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) |
| 65 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) |
| 66 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) |
| 67 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) |
| 68 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) |
| 69 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) |
| 70 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) |
| 71 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) |
| 72 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) |
| 73 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) |
| 74 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) |
| 75 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) |
| 76 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) |
| 77 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) |
| 78 | + AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) |
| 79 | + AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) |
| 80 | + AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) |
| 81 | + AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) |
| 82 | + AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) |
| 83 | + AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT_PULLDOWN, MUX_MODE7) |
| 84 | + AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) |
| 85 | + AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT, MUX_MODE7) |
| 86 | + >; |
| 87 | + }; |
| 88 | + mcasp0_pins: mcasp0-pins { |
| 89 | + pinctrl-single,pins = < |
| 90 | + AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) |
| 91 | + AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) |
| 92 | + AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) |
| 93 | + AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| 94 | + >; |
| 95 | + }; |
| 96 | +}; |
| 97 | + |
| 98 | +&i2c2 { |
| 99 | + status = "okay"; |
| 100 | + #address-cells = <1>; |
| 101 | + #size-cells = <0>; |
| 102 | + |
| 103 | + it66121: it66121 { |
| 104 | + compatible = "ite,it66121"; |
| 105 | + reg = <0x4d>; |
| 106 | + pinctrl-names = "default"; |
| 107 | + pinctrl-0 = <&bb_lcd_pins>; |
| 108 | + |
| 109 | + #sound-dai-cells = <0>; |
| 110 | + |
| 111 | + interrupt-parent = <&gpio2>; |
| 112 | + interrupts = <4 IRQ_TYPE_EDGE_RISING>; |
| 113 | + ports { |
| 114 | + #address-cells = <1>; |
| 115 | + #size-cells = <0>; |
| 116 | + |
| 117 | + port@0 { |
| 118 | + reg = <0>; |
| 119 | + it66121_in: endpoint { |
| 120 | + bus-width = <24>; |
| 121 | + remote-endpoint = <&lcdc_0>; |
| 122 | + }; |
| 123 | + }; |
| 124 | + |
| 125 | + port@1 { |
| 126 | + reg = <1>; |
| 127 | + it66121_out: endpoint { |
| 128 | + remote-endpoint = <&hdmi_connector_in>; |
| 129 | + }; |
| 130 | + }; |
| 131 | + }; |
| 132 | + }; |
| 133 | +}; |
| 134 | + |
| 135 | +&lcdc { |
| 136 | + status = "okay"; |
| 137 | + blue-and-red-wiring = "straight"; |
| 138 | + port { |
| 139 | + lcdc_0: endpoint@0 { |
| 140 | + remote-endpoint = <&it66121_in>; |
| 141 | + }; |
| 142 | + }; |
| 143 | +}; |
| 144 | + |
| 145 | + |
| 146 | +&mcasp0 { |
| 147 | + status = "okay"; |
| 148 | + #sound-dai-cells = <0>; |
| 149 | + pinctrl-names = "default"; |
| 150 | + pinctrl-0 = <&mcasp0_pins>; |
| 151 | + op-mode = <0>; |
| 152 | + tdm-slots = <2>; |
| 153 | + serial-dir = < 0 0 1 0 >; |
| 154 | + tx-num-evt = <32>; |
| 155 | + rx-num-evt = <32>; |
| 156 | +}; |
| 157 | + |
0 commit comments