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thierryredingthierryreding
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arm64: tegra: Add PCI controllers on Tegra264
A total of six PCIe controllers can be found on Tegra264. One of them is used internally for the integrated GPU while the other five can go to a variety of connectors like full PCIe slots or M.2. Signed-off-by: Thierry Reding <treding@nvidia.com>
1 parent 69ec77b commit 06c3b6c

1 file changed

Lines changed: 221 additions & 27 deletions

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‎arch/arm64/boot/dts/nvidia/tegra264.dtsi‎

Lines changed: 221 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
#address-cells = <2>;
3333
#size-cells = <2>;
3434

35-
ranges = <0x00 0x00000000 0x00 0x00000000 0x01 0x00000000>;
35+
ranges = <0x00 0x00000000 0x00 0x00000000 0x00 0x20000000>; /* MMIO (512 MiB) */
3636

3737
misc@100000 {
3838
compatible = "nvidia,tegra234-misc";
@@ -3356,9 +3356,10 @@
33563356
#address-cells = <2>;
33573357
#size-cells = <2>;
33583358

3359-
ranges = <0x00 0x00000000 0x81 0x00000000 0x01 0x00000000>, /* MMIO */
3360-
<0x01 0x00000000 0x00 0x20000000 0x00 0x40000000>, /* non-prefetchable memory (32-bit) */
3361-
<0x02 0x00000000 0xd0 0x00000000 0x08 0x80000000>; /* ECAM, prefetchable memory, I/O */
3359+
ranges = <0x00 0x00000000 0x81 0x00000000 0x00 0x20000000>, /* MMIO (512 MiB) */
3360+
<0x00 0x20000000 0x00 0x20000000 0x00 0x20000000>, /* non-prefetchable memory (32-bit, 512 MiB) */
3361+
<0x00 0x40000000 0x81 0x40000000 0x00 0x20000000>, /* MMIO (512 MiB) */
3362+
<0xa8 0x80000000 0xa8 0x80000000 0x57 0x80000000>; /* I/O, ECAM, prefetchable memory (64-bit) */
33623363

33633364
smmu1: iommu@5000000 {
33643365
compatible = "nvidia,tegra264-smmu", "arm,smmu-v3";
@@ -3402,23 +3403,23 @@
34023403

34033404
mc: memory-controller@8020000 {
34043405
compatible = "nvidia,tegra264-mc";
3405-
reg = <0x00 0x8020000 0x0 0x20000>, /* MC broadcast */
3406-
<0x00 0x8040000 0x0 0x20000>, /* MC 0 */
3407-
<0x00 0x8060000 0x0 0x20000>, /* MC 1 */
3408-
<0x00 0x8080000 0x0 0x20000>, /* MC 2 */
3409-
<0x00 0x80a0000 0x0 0x20000>, /* MC 3 */
3410-
<0x00 0x80c0000 0x0 0x20000>, /* MC 4 */
3411-
<0x00 0x80e0000 0x0 0x20000>, /* MC 5 */
3412-
<0x00 0x8100000 0x0 0x20000>, /* MC 6 */
3413-
<0x00 0x8120000 0x0 0x20000>, /* MC 7 */
3414-
<0x00 0x8140000 0x0 0x20000>, /* MC 8 */
3415-
<0x00 0x8160000 0x0 0x20000>, /* MC 9 */
3416-
<0x00 0x8180000 0x0 0x20000>, /* MC 10 */
3417-
<0x00 0x81a0000 0x0 0x20000>, /* MC 11 */
3418-
<0x00 0x81c0000 0x0 0x20000>, /* MC 12 */
3419-
<0x00 0x81e0000 0x0 0x20000>, /* MC 13 */
3420-
<0x00 0x8200000 0x0 0x20000>, /* MC 14 */
3421-
<0x00 0x8220000 0x0 0x20000>; /* MC 15 */
3406+
reg = <0x000 0x8020000 0x0 0x20000>, /* MC broadcast */
3407+
<0x000 0x8040000 0x0 0x20000>, /* MC 0 */
3408+
<0x000 0x8060000 0x0 0x20000>, /* MC 1 */
3409+
<0x000 0x8080000 0x0 0x20000>, /* MC 2 */
3410+
<0x000 0x80a0000 0x0 0x20000>, /* MC 3 */
3411+
<0x000 0x80c0000 0x0 0x20000>, /* MC 4 */
3412+
<0x000 0x80e0000 0x0 0x20000>, /* MC 5 */
3413+
<0x000 0x8100000 0x0 0x20000>, /* MC 6 */
3414+
<0x000 0x8120000 0x0 0x20000>, /* MC 7 */
3415+
<0x000 0x8140000 0x0 0x20000>, /* MC 8 */
3416+
<0x000 0x8160000 0x0 0x20000>, /* MC 9 */
3417+
<0x000 0x8180000 0x0 0x20000>, /* MC 10 */
3418+
<0x000 0x81a0000 0x0 0x20000>, /* MC 11 */
3419+
<0x000 0x81c0000 0x0 0x20000>, /* MC 12 */
3420+
<0x000 0x81e0000 0x0 0x20000>, /* MC 13 */
3421+
<0x000 0x8200000 0x0 0x20000>, /* MC 14 */
3422+
<0x000 0x8220000 0x0 0x20000>; /* MC 15 */
34223423
reg-names = "broadcast", "ch0", "ch1", "ch2", "ch3",
34233424
"ch4", "ch5", "ch6", "ch7", "ch8", "ch9",
34243425
"ch10", "ch11", "ch12", "ch13", "ch14",
@@ -3437,12 +3438,12 @@
34373438
#size-cells = <2>;
34383439

34393440
/* limit the DMA range for memory clients to [39:0] */
3440-
dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
3441+
dma-ranges = <0x000 0x0 0x000 0x0 0x100 0x0>;
34413442

34423443
emc: external-memory-controller@8800000 {
34433444
compatible = "nvidia,tegra264-emc";
3444-
reg = <0x00 0x8800000 0x0 0x20000>,
3445-
<0x00 0x8890000 0x0 0x20000>;
3445+
reg = <0x000 0x8800000 0x0 0x20000>,
3446+
<0x000 0x8890000 0x0 0x20000>;
34463447
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
34473448
clocks = <&bpmp TEGRA264_CLK_EMC>,
34483449
<&bpmp TEGRA264_CLK_DBB_UPHY0>;
@@ -3493,6 +3494,38 @@
34933494
status = "disabled";
34943495
};
34953496

3497+
pci@c000000 {
3498+
compatible = "nvidia,tegra264-pcie";
3499+
reg = <0xd0 0xb0000000 0x0 0x10000000>,
3500+
<0x00 0x0c000000 0x0 0x00004000>,
3501+
<0x00 0x0c004000 0x0 0x00001000>,
3502+
<0x00 0x0c005000 0x0 0x00001000>;
3503+
reg-names = "ecam", "xal", "xtl", "xtl-pri";
3504+
#address-cells = <3>;
3505+
#size-cells = <2>;
3506+
device_type = "pci";
3507+
linux,pci-domain = <0x00>;
3508+
#interrupt-cells = <0x1>;
3509+
3510+
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3511+
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 155 IRQ_TYPE_LEVEL_HIGH>,
3512+
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 156 IRQ_TYPE_LEVEL_HIGH>,
3513+
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 157 IRQ_TYPE_LEVEL_HIGH>,
3514+
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 158 IRQ_TYPE_LEVEL_HIGH>;
3515+
3516+
iommu-map = <0x0 &smmu2 0x10000 0x10000>;
3517+
msi-map = <0x0 &its 0x210000 0x10000>;
3518+
dma-coherent;
3519+
3520+
ranges = <0x81000000 0x00 0x84000000 0xd0 0x84000000 0x00 0x00200000>, /* I/O */
3521+
<0x82000000 0x00 0x20000000 0x00 0x20000000 0x00 0x08000000>, /* non-prefetchable memory (128 MiB) */
3522+
<0xc3000000 0xd0 0xc0000000 0xd0 0xc0000000 0x07 0xc0000000>; /* prefetchable memory */
3523+
bus-range = <0x0 0xff>;
3524+
3525+
nvidia,bpmp = <&bpmp 0>;
3526+
status = "disabled";
3527+
};
3528+
34963529
i2c14: i2c@c410000 {
34973530
compatible = "nvidia,tegra264-i2c";
34983531
reg = <0x00 0x0c410000 0x0 0x10000>;
@@ -3720,7 +3753,7 @@
37203753
#address-cells = <2>;
37213754
#size-cells = <2>;
37223755

3723-
ranges = <0x00 0x00000000 0x88 0x00000000 0x01 0x00000000>;
3756+
ranges = <0x00 0x00000000 0x88 0x00000000 0x00 0x20000000>; /* MMIO (512 MiB) */
37243757

37253758
smmu3: iommu@6000000 {
37263759
compatible = "nvidia,tegra264-smmu", "arm,smmu-v3";
@@ -3765,8 +3798,169 @@
37653798
#address-cells = <2>;
37663799
#size-cells = <2>;
37673800

3768-
ranges = <0x00 0x00000000 0xa8 0x00000000 0x40 0x00000000>, /* MMIO, ECAM, prefetchable memory, I/O */
3769-
<0x80 0x00000000 0x00 0x20000000 0x00 0x40000000>; /* non-prefetchable memory (32-bit) */
3801+
ranges = <0x00 0x00000000 0xa8 0x00000000 0x00 0x20000000>, /* MMIO (512 MiB) */
3802+
<0x00 0x20000000 0x00 0x20000000 0x00 0x60000000>, /* non-prefetchable memory (32-bit, 1536 GiB) */
3803+
<0xa8 0x80000000 0xa8 0x80000000 0x57 0x80000000>; /* I/O, ECAM, prefetchable memory (64-bit) */
3804+
3805+
pci@8400000 {
3806+
compatible = "nvidia,tegra264-pcie";
3807+
reg = <0xa8 0xb0000000 0x0 0x10000000>,
3808+
<0x00 0x08400000 0x0 0x00004000>,
3809+
<0x00 0x08404000 0x0 0x00001000>,
3810+
<0x00 0x08405000 0x0 0x00001000>,
3811+
<0x00 0x08410000 0x0 0x00010000>;
3812+
reg-names = "ecam", "xal", "xtl", "xtl-pri", "xpl";
3813+
#address-cells = <3>;
3814+
#size-cells = <2>;
3815+
device_type = "pci";
3816+
linux,pci-domain = <0x01>;
3817+
#interrupt-cells = <1>;
3818+
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3819+
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 908 IRQ_TYPE_LEVEL_HIGH>, /* INTA */
3820+
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 909 IRQ_TYPE_LEVEL_HIGH>, /* INTB */
3821+
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 910 IRQ_TYPE_LEVEL_HIGH>, /* INTC */
3822+
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 911 IRQ_TYPE_LEVEL_HIGH>; /* INTD */
3823+
3824+
iommu-map = <0x0 &smmu1 0x10000 0x10000>;
3825+
msi-map = <0x0 &its 0x110000 0x10000>;
3826+
dma-coherent;
3827+
3828+
ranges = <0x81000000 0x00 0x84000000 0xa8 0x84000000 0x00 0x00200000>, /* I/O */
3829+
<0x82000000 0x00 0x28000000 0x00 0x28000000 0x00 0x08000000>, /* non-prefetchable memory */
3830+
<0xc3000000 0xa8 0xc0000000 0xa8 0xc0000000 0x07 0xc0000000>; /* prefetchable memory */
3831+
bus-range = <0x00 0xff>;
3832+
3833+
nvidia,bpmp = <&bpmp 1>;
3834+
status = "disabled";
3835+
};
3836+
3837+
pci@8420000 {
3838+
compatible = "nvidia,tegra264-pcie";
3839+
reg = <0xb0 0xb0000000 0x0 0x10000000>,
3840+
<0x00 0x08420000 0x0 0x00004000>,
3841+
<0x00 0x08424000 0x0 0x00001000>,
3842+
<0x00 0x08425000 0x0 0x00001000>,
3843+
<0x00 0x08430000 0x0 0x00010000>;
3844+
reg-names = "ecam", "xal", "xtl", "xtl-pri", "xpl";
3845+
#address-cells = <3>;
3846+
#size-cells = <2>;
3847+
device_type = "pci";
3848+
linux,pci-domain = <0x02>;
3849+
#interrupt-cells = <1>;
3850+
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3851+
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 917 IRQ_TYPE_LEVEL_HIGH>, /* INTA */
3852+
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 918 IRQ_TYPE_LEVEL_HIGH>, /* INTB */
3853+
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 919 IRQ_TYPE_LEVEL_HIGH>, /* INTC */
3854+
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 920 IRQ_TYPE_LEVEL_HIGH>; /* INTD */
3855+
3856+
iommu-map = <0x0 &smmu1 0x20000 0x10000>;
3857+
msi-map = <0x0 &its 0x120000 0x10000>;
3858+
dma-coherent;
3859+
3860+
ranges = <0x81000000 0x00 0x84000000 0xb0 0x84000000 0x00 0x00200000>, /* I/O */
3861+
<0x82000000 0x00 0x30000000 0x00 0x30000000 0x00 0x08000000>, /* non-prefetchable memory */
3862+
<0xc3000000 0xb0 0xc0000000 0xb0 0xc0000000 0x07 0xc0000000>; /* prefetchable memory */
3863+
bus-range = <0x00 0xff>;
3864+
3865+
nvidia,bpmp = <&bpmp 2>;
3866+
status = "disabled";
3867+
};
3868+
3869+
pci@8440000 {
3870+
compatible = "nvidia,tegra264-pcie";
3871+
reg = <0xb8 0xb0000000 0x0 0x10000000>,
3872+
<0x00 0x08440000 0x0 0x00004000>,
3873+
<0x00 0x08444000 0x0 0x00001000>,
3874+
<0x00 0x08445000 0x0 0x00001000>,
3875+
<0x00 0x08450000 0x0 0x00010000>;
3876+
reg-names = "ecam", "xal", "xtl", "xtl-pri", "xpl";
3877+
#address-cells = <3>;
3878+
#size-cells = <2>;
3879+
device_type = "pci";
3880+
linux,pci-domain = <0x03>;
3881+
#interrupt-cells = <1>;
3882+
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3883+
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 926 IRQ_TYPE_LEVEL_HIGH>, /* INTA */
3884+
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 927 IRQ_TYPE_LEVEL_HIGH>, /* INTB */
3885+
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 928 IRQ_TYPE_LEVEL_HIGH>, /* INTC */
3886+
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 929 IRQ_TYPE_LEVEL_HIGH>; /* INTD */
3887+
3888+
iommu-map = <0x0 &smmu1 0x30000 0x10000>;
3889+
msi-map = <0x0 &its 0x130000 0x10000>;
3890+
dma-coherent;
3891+
3892+
ranges = <0x81000000 0x00 0x84000000 0xb8 0x84000000 0x00 0x00200000>, /* I/O */
3893+
<0x82000000 0x00 0x38000000 0x00 0x38000000 0x00 0x08000000>, /* non-prefetchable memory */
3894+
<0xc3000000 0xb8 0xc0000000 0xb8 0xc0000000 0x07 0xc0000000>; /* prefetchable memory */
3895+
bus-range = <0x00 0xff>;
3896+
3897+
nvidia,bpmp = <&bpmp 3>;
3898+
status = "disabled";
3899+
};
3900+
3901+
pci@8460000 {
3902+
compatible = "nvidia,tegra264-pcie";
3903+
reg = <0xc0 0xb0000000 0x0 0x10000000>,
3904+
<0x00 0x08460000 0x0 0x00004000>,
3905+
<0x00 0x08464000 0x0 0x00001000>,
3906+
<0x00 0x08465000 0x0 0x00001000>,
3907+
<0x00 0x08470000 0x0 0x00010000>;
3908+
reg-names = "ecam", "xal", "xtl", "xtl-pri", "xpl";
3909+
#address-cells = <3>;
3910+
#size-cells = <2>;
3911+
device_type = "pci";
3912+
linux,pci-domain = <0x04>;
3913+
#interrupt-cells = <1>;
3914+
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3915+
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 935 IRQ_TYPE_LEVEL_HIGH>, /* INTA */
3916+
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 936 IRQ_TYPE_LEVEL_HIGH>, /* INTB */
3917+
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 937 IRQ_TYPE_LEVEL_HIGH>, /* INTC */
3918+
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 938 IRQ_TYPE_LEVEL_HIGH>; /* INTD */
3919+
3920+
iommu-map = <0x0 &smmu1 0x40000 0x10000>;
3921+
msi-map = <0x0 &its 0x140000 0x10000>;
3922+
dma-coherent;
3923+
3924+
ranges = <0x81000000 0x00 0x84000000 0xc0 0x84000000 0x00 0x00200000>, /* I/O */
3925+
<0x82000000 0x00 0x40000000 0x00 0x40000000 0x00 0x08000000>, /* non-prefetchable memory */
3926+
<0xc3000000 0xc0 0xc0000000 0xc0 0xc0000000 0x07 0xc0000000>; /* prefetchable memory */
3927+
bus-range = <0x00 0xff>;
3928+
3929+
nvidia,bpmp = <&bpmp 4>;
3930+
status = "disabled";
3931+
};
3932+
3933+
pci@8480000 {
3934+
compatible = "nvidia,tegra264-pcie";
3935+
reg = <0xc8 0xb0000000 0x0 0x10000000>,
3936+
<0x00 0x08480000 0x0 0x00004000>,
3937+
<0x00 0x08484000 0x0 0x00001000>,
3938+
<0x00 0x08485000 0x0 0x00001000>,
3939+
<0x00 0x08490000 0x0 0x00010000>;
3940+
reg-names = "ecam", "xal", "xtl", "xtl-pri", "xpl";
3941+
#address-cells = <3>;
3942+
#size-cells = <2>;
3943+
device_type = "pci";
3944+
linux,pci-domain = <0x05>;
3945+
#interrupt-cells = <1>;
3946+
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3947+
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 944 IRQ_TYPE_LEVEL_HIGH>, /* INTA */
3948+
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 945 IRQ_TYPE_LEVEL_HIGH>, /* INTB */
3949+
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 946 IRQ_TYPE_LEVEL_HIGH>, /* INTC */
3950+
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 947 IRQ_TYPE_LEVEL_HIGH>; /* INTD */
3951+
3952+
iommu-map = <0x0 &smmu1 0x50000 0x10000>;
3953+
msi-map = <0x0 &its 0x150000 0x10000>;
3954+
dma-coherent;
3955+
3956+
ranges = <0x81000000 0x00 0x84000000 0xc8 0x84000000 0x00 0x00200000>, /* I/O */
3957+
<0x82000000 0x00 0x48000000 0x00 0x48000000 0x00 0x08000000>, /* non-prefetchable memory */
3958+
<0xc3000000 0xc8 0xc0000000 0xc8 0xc0000000 0x07 0xc0000000>; /* prefetchable memory */
3959+
bus-range = <0x00 0xff>;
3960+
3961+
nvidia,bpmp = <&bpmp 5>;
3962+
status = "disabled";
3963+
};
37703964
};
37713965

37723966
cpus {

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