From 7b01ce6485ceb755032ab6166deafa67d3eacb22 Mon Sep 17 00:00:00 2001 From: Claude Date: Mon, 5 Oct 2026 10:23:33 +0000 Subject: [PATCH] Mux the STM32F746G-DISCO SDRAM pins one GPIO port at a time sdram.ini configured each of the 40 SDRAM pins in its own dmgpio section, although they all share the same settings (AF12, maximum speed, push-pull). Every section is a separate driver node that dmdevfs configures on its own - ~4 ms each on dmod-boot. The pins are now grouped into one section per GPIO port (C, D, E, F, G, H, I) with a pins= bitmask, the same way the LCD pins are configured in dmlcdtft's lcd.ini; the signal of every pin is kept in a comment above its port. The set of pins is unchanged (40 pins, checked against the old file), and so is the [sdram] section. dmod-boot in Renode: the SDRAM is up at 332 ms instead of 631 ms, /dev mounted at 957 ms instead of 1292 ms, shell prompt at 1238 ms instead of 1558 ms; dmdevfs configures 52 nodes instead of 85. Co-Authored-By: Claude Opus 5.5 Claude-Session: https://claude.ai/code/session_01V9XGvT9zLJVAagoEVhYh9T --- configs/board/stm32f746g-disco/sdram.ini | 354 +++-------------------- 1 file changed, 37 insertions(+), 317 deletions(-) diff --git a/configs/board/stm32f746g-disco/sdram.ini b/configs/board/stm32f746g-disco/sdram.ini index 6c75901..0507012 100644 --- a/configs/board/stm32f746g-disco/sdram.ini +++ b/configs/board/stm32f746g-disco/sdram.ini @@ -11,368 +11,88 @@ ; are not actually wired to the SDRAM chip on this board, corrupting every ; access with garbage from the floating upper half. -[sdram_sdclk] -driver_name=dmgpio -driver_order=-9 -pin=PG8 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_sdcke0] -driver_name=dmgpio -driver_order=-9 -pin=PC3 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_sdne0] -driver_name=dmgpio -driver_order=-9 -pin=PH3 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_sdnras] -driver_name=dmgpio -driver_order=-9 -pin=PF11 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_sdncas] -driver_name=dmgpio -driver_order=-9 -pin=PG15 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_sdnwe] -driver_name=dmgpio -driver_order=-9 -pin=PH5 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_ba0] -driver_name=dmgpio -driver_order=-9 -pin=PG4 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_ba1] -driver_name=dmgpio -driver_order=-9 -pin=PG5 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -; Address lines A0-A11 -[sdram_a0] -driver_name=dmgpio -driver_order=-9 -pin=PF0 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a1] -driver_name=dmgpio -driver_order=-9 -pin=PF1 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a2] -driver_name=dmgpio -driver_order=-9 -pin=PF2 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a3] -driver_name=dmgpio -driver_order=-9 -pin=PF3 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a4] -driver_name=dmgpio -driver_order=-9 -pin=PF4 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a5] -driver_name=dmgpio -driver_order=-9 -pin=PF5 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a6] -driver_name=dmgpio -driver_order=-9 -pin=PF12 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a7] -driver_name=dmgpio -driver_order=-9 -pin=PF13 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a8] -driver_name=dmgpio -driver_order=-9 -pin=PF14 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a9] -driver_name=dmgpio -driver_order=-9 -pin=PF15 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a10] -driver_name=dmgpio -driver_order=-9 -pin=PG0 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_a11] -driver_name=dmgpio -driver_order=-9 -pin=PG1 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -; Data lines D0-D15 (16-bit bus - see the note at the top of this file) -[sdram_d0] -driver_name=dmgpio -driver_order=-9 -pin=PD14 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d1] -driver_name=dmgpio -driver_order=-9 -pin=PD15 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d2] -driver_name=dmgpio -driver_order=-9 -pin=PD0 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d3] -driver_name=dmgpio -driver_order=-9 -pin=PD1 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d4] -driver_name=dmgpio -driver_order=-9 -pin=PE7 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d5] -driver_name=dmgpio -driver_order=-9 -pin=PE8 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d6] -driver_name=dmgpio -driver_order=-9 -pin=PE9 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d7] -driver_name=dmgpio -driver_order=-9 -pin=PE10 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d8] -driver_name=dmgpio -driver_order=-9 -pin=PE11 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d9] -driver_name=dmgpio -driver_order=-9 -pin=PE12 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d10] -driver_name=dmgpio -driver_order=-9 -pin=PE13 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d11] -driver_name=dmgpio -driver_order=-9 -pin=PE14 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull - -[sdram_d12] -driver_name=dmgpio -driver_order=-9 -pin=PE15 -mode=alternate -alternate_function=12 -speed=maximum -output_circuit=push_pull +; Pins: one dmgpio section per GPIO port, every pin of the port that the +; SDRAM uses selected by the pins= bitmask (bit n = pin n) - all of them share +; the same settings (AF12, maximum speed, push-pull). +; +; D16-D31 deliberately not configured here - see the note at the top of this +; file. Those MCU pins (PH8-15, PI0-3, PI6-7, PI9-10) are used for other +; on-board peripherals and must not be muxed to FMC on this board. -[sdram_d13] +; Port C: SDCKE0=PC3 +[sdram_port_c] driver_name=dmgpio driver_order=-9 -pin=PD8 +port=C +pins=0x0008 mode=alternate alternate_function=12 speed=maximum output_circuit=push_pull -[sdram_d14] +; Port D: D2=PD0, D3=PD1, D13=PD8, D14=PD9, D15=PD10, D0=PD14, D1=PD15 +[sdram_port_d] driver_name=dmgpio driver_order=-9 -pin=PD9 +port=D +pins=0xC703 mode=alternate alternate_function=12 speed=maximum output_circuit=push_pull -[sdram_d15] +; Port E: NBL0=PE0, NBL1=PE1, D4=PE7, D5=PE8, D6=PE9, D7=PE10, D8=PE11, +; D9=PE12, D10=PE13, D11=PE14, D12=PE15 +[sdram_port_e] driver_name=dmgpio driver_order=-9 -pin=PD10 +port=E +pins=0xFF83 mode=alternate alternate_function=12 speed=maximum output_circuit=push_pull -; D16-D31 deliberately not configured here - see the note at the top of this -; file. Those MCU pins (PH8-15, PI0-3, PI6-7, PI9-10) are used for other -; on-board peripherals and must not be muxed to FMC on this board. - -; Byte lane enables NBL0-NBL3 -[sdram_nbl0] +; Port F: A0=PF0, A1=PF1, A2=PF2, A3=PF3, A4=PF4, A5=PF5, SDNRAS=PF11, +; A6=PF12, A7=PF13, A8=PF14, A9=PF15 +[sdram_port_f] driver_name=dmgpio driver_order=-9 -pin=PE0 +port=F +pins=0xF83F mode=alternate alternate_function=12 speed=maximum output_circuit=push_pull -[sdram_nbl1] +; Port G: A10=PG0, A11=PG1, BA0=PG4, BA1=PG5, SDCLK=PG8, SDNCAS=PG15 +[sdram_port_g] driver_name=dmgpio driver_order=-9 -pin=PE1 +port=G +pins=0x8133 mode=alternate alternate_function=12 speed=maximum output_circuit=push_pull -[sdram_nbl2] +; Port H: SDNE0=PH3, SDNWE=PH5 +[sdram_port_h] driver_name=dmgpio driver_order=-9 -pin=PI4 +port=H +pins=0x0028 mode=alternate alternate_function=12 speed=maximum output_circuit=push_pull -[sdram_nbl3] +; Port I: NBL2=PI4, NBL3=PI5 +[sdram_port_i] driver_name=dmgpio driver_order=-9 -pin=PI5 +port=I +pins=0x0030 mode=alternate alternate_function=12 speed=maximum