diff --git a/configs/README.md b/configs/README.md
index c75ff58..e193913 100644
--- a/configs/README.md
+++ b/configs/README.md
@@ -21,17 +21,19 @@ config would not be meaningful. Configs live only under `board/`.
 
 Each config file contains:
 - One `[sdram_*]` GPIO section per FMC signal pin (`driver_name=dmgpio`,
-  alternate function mode), with `driver_order=1` so they configure first.
-- One driver section with `driver_name=dmfmc` and `driver_order=2`, so
+  alternate function mode), with `driver_order=-9` so they configure first.
+- One driver section with `driver_name=dmfmc` and `driver_order=-8`, so
   `dmdevfs` configures every pin before bringing up the FMC controller
-  itself - the same convention `dmuart` uses for its TX/RX pins.
+  itself - the same convention `dmuart` uses for its TX/RX pins. Both orders
+  are negative so the SDRAM heap is up right after `dmclk` (`driver_order=-10`)
+  and before any driver with the default order 0 starts allocating from DTCM.
 
 ### Example (stm32f746g-disco/sdram.ini, abridged)
 
 ```ini
 [sdram_sdclk]
 driver_name=dmgpio
-driver_order=1
+driver_order=-9
 pin=PG8
 mode=alternate
 alternate_function=12
@@ -44,7 +46,7 @@ output_circuit=push_pull
 
 [sdram]
 driver_name=dmfmc
-driver_order=2
+driver_order=-8
 memory_type=sdram
 chip=MT48LC4M32B2
 bank=1
diff --git a/configs/board/stm32f746g-disco/sdram.ini b/configs/board/stm32f746g-disco/sdram.ini
index 3e12432..6c75901 100644
--- a/configs/board/stm32f746g-disco/sdram.ini
+++ b/configs/board/stm32f746g-disco/sdram.ini
@@ -13,7 +13,7 @@
 
 [sdram_sdclk]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PG8
 mode=alternate
 alternate_function=12
@@ -22,7 +22,7 @@ output_circuit=push_pull
 
 [sdram_sdcke0]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PC3
 mode=alternate
 alternate_function=12
@@ -31,7 +31,7 @@ output_circuit=push_pull
 
 [sdram_sdne0]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PH3
 mode=alternate
 alternate_function=12
@@ -40,7 +40,7 @@ output_circuit=push_pull
 
 [sdram_sdnras]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF11
 mode=alternate
 alternate_function=12
@@ -49,7 +49,7 @@ output_circuit=push_pull
 
 [sdram_sdncas]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PG15
 mode=alternate
 alternate_function=12
@@ -58,7 +58,7 @@ output_circuit=push_pull
 
 [sdram_sdnwe]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PH5
 mode=alternate
 alternate_function=12
@@ -67,7 +67,7 @@ output_circuit=push_pull
 
 [sdram_ba0]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PG4
 mode=alternate
 alternate_function=12
@@ -76,7 +76,7 @@ output_circuit=push_pull
 
 [sdram_ba1]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PG5
 mode=alternate
 alternate_function=12
@@ -86,7 +86,7 @@ output_circuit=push_pull
 ; Address lines A0-A11
 [sdram_a0]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF0
 mode=alternate
 alternate_function=12
@@ -95,7 +95,7 @@ output_circuit=push_pull
 
 [sdram_a1]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF1
 mode=alternate
 alternate_function=12
@@ -104,7 +104,7 @@ output_circuit=push_pull
 
 [sdram_a2]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF2
 mode=alternate
 alternate_function=12
@@ -113,7 +113,7 @@ output_circuit=push_pull
 
 [sdram_a3]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF3
 mode=alternate
 alternate_function=12
@@ -122,7 +122,7 @@ output_circuit=push_pull
 
 [sdram_a4]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF4
 mode=alternate
 alternate_function=12
@@ -131,7 +131,7 @@ output_circuit=push_pull
 
 [sdram_a5]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF5
 mode=alternate
 alternate_function=12
@@ -140,7 +140,7 @@ output_circuit=push_pull
 
 [sdram_a6]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF12
 mode=alternate
 alternate_function=12
@@ -149,7 +149,7 @@ output_circuit=push_pull
 
 [sdram_a7]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF13
 mode=alternate
 alternate_function=12
@@ -158,7 +158,7 @@ output_circuit=push_pull
 
 [sdram_a8]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF14
 mode=alternate
 alternate_function=12
@@ -167,7 +167,7 @@ output_circuit=push_pull
 
 [sdram_a9]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PF15
 mode=alternate
 alternate_function=12
@@ -176,7 +176,7 @@ output_circuit=push_pull
 
 [sdram_a10]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PG0
 mode=alternate
 alternate_function=12
@@ -185,7 +185,7 @@ output_circuit=push_pull
 
 [sdram_a11]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PG1
 mode=alternate
 alternate_function=12
@@ -195,7 +195,7 @@ output_circuit=push_pull
 ; Data lines D0-D15 (16-bit bus - see the note at the top of this file)
 [sdram_d0]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD14
 mode=alternate
 alternate_function=12
@@ -204,7 +204,7 @@ output_circuit=push_pull
 
 [sdram_d1]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD15
 mode=alternate
 alternate_function=12
@@ -213,7 +213,7 @@ output_circuit=push_pull
 
 [sdram_d2]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD0
 mode=alternate
 alternate_function=12
@@ -222,7 +222,7 @@ output_circuit=push_pull
 
 [sdram_d3]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD1
 mode=alternate
 alternate_function=12
@@ -231,7 +231,7 @@ output_circuit=push_pull
 
 [sdram_d4]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE7
 mode=alternate
 alternate_function=12
@@ -240,7 +240,7 @@ output_circuit=push_pull
 
 [sdram_d5]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE8
 mode=alternate
 alternate_function=12
@@ -249,7 +249,7 @@ output_circuit=push_pull
 
 [sdram_d6]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE9
 mode=alternate
 alternate_function=12
@@ -258,7 +258,7 @@ output_circuit=push_pull
 
 [sdram_d7]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE10
 mode=alternate
 alternate_function=12
@@ -267,7 +267,7 @@ output_circuit=push_pull
 
 [sdram_d8]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE11
 mode=alternate
 alternate_function=12
@@ -276,7 +276,7 @@ output_circuit=push_pull
 
 [sdram_d9]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE12
 mode=alternate
 alternate_function=12
@@ -285,7 +285,7 @@ output_circuit=push_pull
 
 [sdram_d10]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE13
 mode=alternate
 alternate_function=12
@@ -294,7 +294,7 @@ output_circuit=push_pull
 
 [sdram_d11]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE14
 mode=alternate
 alternate_function=12
@@ -303,7 +303,7 @@ output_circuit=push_pull
 
 [sdram_d12]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE15
 mode=alternate
 alternate_function=12
@@ -312,7 +312,7 @@ output_circuit=push_pull
 
 [sdram_d13]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD8
 mode=alternate
 alternate_function=12
@@ -321,7 +321,7 @@ output_circuit=push_pull
 
 [sdram_d14]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD9
 mode=alternate
 alternate_function=12
@@ -330,7 +330,7 @@ output_circuit=push_pull
 
 [sdram_d15]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PD10
 mode=alternate
 alternate_function=12
@@ -344,7 +344,7 @@ output_circuit=push_pull
 ; Byte lane enables NBL0-NBL3
 [sdram_nbl0]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE0
 mode=alternate
 alternate_function=12
@@ -353,7 +353,7 @@ output_circuit=push_pull
 
 [sdram_nbl1]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PE1
 mode=alternate
 alternate_function=12
@@ -362,7 +362,7 @@ output_circuit=push_pull
 
 [sdram_nbl2]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PI4
 mode=alternate
 alternate_function=12
@@ -371,7 +371,7 @@ output_circuit=push_pull
 
 [sdram_nbl3]
 driver_name=dmgpio
-driver_order=0
+driver_order=-9
 pin=PI5
 mode=alternate
 alternate_function=12
@@ -380,10 +380,13 @@ output_circuit=push_pull
 
 ; The FMC/SDRAM controller itself, brought up only after all pins above
 ; have been muxed (driver_order enforces GPIO-before-FMC ordering, the same
-; convention dmuart uses for its TX/RX pins).
+; convention dmuart uses for its TX/RX pins). The orders are negative so the
+; external SDRAM comes up right after dmclk (-10) and before every driver
+; with the default order 0 - otherwise the early drivers exhaust DTCM before
+; the SDRAM heap is available.
 [sdram]
 driver_name=dmfmc
-driver_order=1
+driver_order=-8
 memory_type=sdram
 chip=MT48LC4M32B2
 bank=1
diff --git a/docs/configuration.md b/docs/configuration.md
index 2351553..82f3636 100644
--- a/docs/configuration.md
+++ b/docs/configuration.md
@@ -6,7 +6,7 @@ and a complete board example. Summary:
 ```ini
 [sdram]
 driver_name=dmfmc
-driver_order=2          ; must come after every dmgpio pin section for this bus
+driver_order=-8         ; must come after every dmgpio pin section for this bus
 memory_type=sdram       ; sdram | psram | nor | nand (only sdram is implemented)
 chip=MT48LC4M32B2       ; looked up via dmfmc_chips_find()
 bank=1                  ; 1 or 2 (FMC SDRAM bank)