winch: Fix missing zero-extensions of addresses loaded from (#13014)

* winch: Add add_uextend to perform explicit extension when needed.

This commit fixes an out-of-bounds access caused by the lack zero
extension in the code responsible for calculating the heap address for
loads/stores.

This issue manifests in aarch64 (unlike x64) given that no automatic
extension is performed, resulting in an out-of-bounds access.

An alternative approach is to emit an extend for the index, however
this approach is preferred given that it gives the MacroAssembler
layer better control of how to lower addition, e.g., in aarch64 we can
inline the desired extension in a single instruction.

* winch: Correctly type the result of table.grow

This commit fixes an out-of-bounds access caused by the lack of type
narrowing from the `table.grow` builtin. Without explicit narrowing,
the type is treated as 64-bit value, which could cause issues when
paired with loads/stores.

* Review comments

* Properly handle table index types

Only narrow when dealing with the 64-bit pointer/32-bit tables

* winch: Refine zero extension heuristic

This commit refines the zero extension heuristic such that it
unconditionally emits a zero extension when dealing with 32-bit
heaps. This eliminates any ambiguity related to the value of the
memory indices across ISAs.

---------

Co-authored-by: Saúl Cabrera <saulecabrera@gmail.com>

Author: alexcrichton

tests/disas/winch/aarch64/load/dynamic_heap.wat

@@ -46,7 +46,7 @@
 ;;   5c: cmp     x2, x1, uxtx
 ;;       b.hi    #0x158
 ;;   64: ldur    x3, [x9, #0x38]
-;;       add     x3, x3, x0, uxtx
+;;       add     x3, x3, w0, uxtw
 ;;       mov     x4, #0
 ;;       cmp     x2, x1, uxtx
 ;;       csel    x3, x4, x3, hi
@@ -59,7 +59,7 @@
 ;;   90: cmp     x3, x2, uxtx
 ;;       b.hi    #0x160
 ;;   98: ldur    x4, [x9, #0x38]
-;;       add     x4, x4, x1, uxtx
+;;       add     x4, x4, w1, uxtw
 ;;       add     x4, x4, #4
 ;;       mov     x5, #0
 ;;       cmp     x3, x2, uxtx
@@ -75,7 +75,7 @@
 ;;   d0: cmp     x4, x3, uxtx
 ;;       b.hi    #0x168
 ;;   d8: ldur    x5, [x9, #0x38]
-;;       add     x5, x5, x2, uxtx
+;;       add     x5, x5, w2, uxtw
 ;;       orr     x16, xzr, #0xfffff
 ;;       add     x5, x5, x16, uxtx
 ;;       mov     x6, #0

tests/disas/winch/aarch64/load/f32.wat

@@ -25,7 +25,7 @@
 ;;       stur    x1, [x28]
 ;;       mov     x0, #0
 ;;       ldur    x1, [x9, #0x38]
-;;       add     x1, x1, x0, uxtx
+;;       add     x1, x1, w0, uxtw
 ;;       ldur    s0, [x1]
 ;;       add     x28, x28, #0x10
 ;;       mov     sp, x28

tests/disas/winch/aarch64/load/f64.wat

@@ -24,7 +24,7 @@
 ;;       stur    x1, [x28]
 ;;       mov     x0, #0
 ;;       ldur    x1, [x9, #0x38]
-;;       add     x1, x1, x0, uxtx
+;;       add     x1, x1, w0, uxtw
 ;;       ldur    d0, [x1]
 ;;       add     x28, x28, #0x10
 ;;       mov     sp, x28

tests/disas/winch/aarch64/load/i32.wat

@@ -25,7 +25,7 @@
 ;;       stur    x1, [x28]
 ;;       mov     x0, #0
 ;;       ldur    x1, [x9, #0x38]
-;;       add     x1, x1, x0, uxtx
+;;       add     x1, x1, w0, uxtw
 ;;       ldur    w0, [x1]
 ;;       add     x28, x28, #0x10
 ;;       mov     sp, x28

tests/disas/winch/aarch64/load/i64.wat

@@ -28,13 +28,13 @@
 ;;       ldur    x0, [x28]
 ;;       mov     x1, #8
 ;;       ldur    x2, [x9, #0x38]
-;;       add     x2, x2, x1, uxtx
+;;       add     x2, x2, w1, uxtw
 ;;       sub     sp, x28, #8
 ;;       sturb   w0, [x2]
 ;;       mov     sp, x28
 ;;       mov     x0, #8
 ;;       ldur    x1, [x9, #0x38]
-;;       add     x1, x1, x0, uxtx
+;;       add     x1, x1, w0, uxtw
 ;;       sub     sp, x28, #8
 ;;       ldursb  x0, [x1]
 ;;       mov     sp, x28

tests/disas/winch/aarch64/store/dynamic_heap.wat

@@ -49,7 +49,7 @@
 ;;   68: cmp     x3, x2, uxtx
 ;;       b.hi    #0x12c
 ;;   70: ldur    x4, [x9, #0x38]
-;;       add     x4, x4, x1, uxtx
+;;       add     x4, x4, w1, uxtw
 ;;       mov     x5, #0
 ;;       cmp     x3, x2, uxtx
 ;;       csel    x4, x5, x4, hi
@@ -63,7 +63,7 @@
 ;;   a0: cmp     x3, x2, uxtx
 ;;       b.hi    #0x134
 ;;   a8: ldur    x4, [x9, #0x38]
-;;       add     x4, x4, x1, uxtx
+;;       add     x4, x4, w1, uxtw
 ;;       add     x4, x4, #4
 ;;       mov     x5, #0
 ;;       cmp     x3, x2, uxtx
@@ -80,7 +80,7 @@
 ;;   e4: cmp     x3, x2, uxtx
 ;;       b.hi    #0x13c
 ;;   ec: ldur    x4, [x9, #0x38]
-;;       add     x4, x4, x1, uxtx
+;;       add     x4, x4, w1, uxtw
 ;;       orr     x16, xzr, #0xfffff
 ;;       add     x4, x4, x16, uxtx
 ;;       mov     x5, #0

tests/disas/winch/aarch64/store/f32.wat

@@ -25,7 +25,7 @@
 ;;       ldr     s0, #0x70
 ;;       mov     x0, #0
 ;;       ldur    x1, [x9, #0x38]
-;;       add     x1, x1, x0, uxtx
+;;       add     x1, x1, w0, uxtw
 ;;       stur    s0, [x1]
 ;;       add     x28, x28, #0x10
 ;;       mov     sp, x28

tests/disas/winch/aarch64/store/f64.wat

@@ -26,7 +26,7 @@
 ;;       ldr     d0, #0x70
 ;;       mov     x0, #0
 ;;       ldur    x1, [x9, #0x38]
-;;       add     x1, x1, x0, uxtx
+;;       add     x1, x1, w0, uxtw
 ;;       stur    d0, [x1]
 ;;       add     x28, x28, #0x10
 ;;       mov     sp, x28

tests/disas/winch/aarch64/store/i32.wat

@@ -27,7 +27,7 @@
 ;;       mov     x0, #1
 ;;       mov     x1, #0
 ;;       ldur    x2, [x9, #0x38]
-;;       add     x2, x2, x1, uxtx
+;;       add     x2, x2, w1, uxtw
 ;;       stur    w0, [x2]
 ;;       add     x28, x28, #0x10
 ;;       mov     sp, x28

tests/disas/winch/x64/atomic/fence/fence.wat

@@ -15,7 +15,7 @@
 ;;       movq    0x18(%r11), %r11
 ;;       addq    $0x10, %r11
 ;;       cmpq    %rsp, %r11
-;;       ja      0x62
+;;       ja      0x66
 ;;   1c: movq    %rdi, %r14
 ;;       subq    $0x10, %rsp
 ;;       movq    %rdi, 8(%rsp)
@@ -24,15 +24,17 @@
 ;;       movl    $0, %ecx
 ;;       movq    0x30(%r14), %r11
 ;;       movq    (%r11), %rdx
+;;       movl    %ecx, %ecx
 ;;       addq    %rcx, %rdx
 ;;       movl    %eax, (%rdx)
 ;;       mfence
 ;;       movl    $0, %eax
 ;;       movq    0x30(%r14), %r11
 ;;       movq    (%r11), %rcx
+;;       movl    %eax, %eax
 ;;       addq    %rax, %rcx
 ;;       movl    (%rcx), %eax
 ;;       addq    $0x10, %rsp
 ;;       popq    %rbp
 ;;       retq
-;;   62: ud2
+;;   66: ud2