From 90de0698e1bb63f7971dc1980b6b780d24afca7c Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Thu, 10 Sep 2026 17:28:09 +0800 Subject: [PATCH 01/13] feat(dts): generate firmware device trees from nemu_board profiles Generate the firmware device tree from nemu_board's DTS generator instead of keeping one .dts.in per board, memory size and hart count under dts/. scripts/generate-nemu-board-dts.py maps a DEFAULT_DTB basename to a nemu_board profile and writes the template into build/generated-dts. Hart count, memory size and the -novec suffix keep coming from the basename. Recognized basenames are always regenerated, so they cannot go stale; an unsupported basename is read from dts/.dts.in, which keeps custom templates in the tracked tree rather than in the build directory. Firmware assembly, OpenSBI and LibCheckpointAlpha all consume that same generated template, and the Make dependencies now track the generator, the profile data and the selected custom template. --- .gitmodules | 3 + Makefile | 15 +- README.md | 19 +- dts/README.md | 44 ++-- nemu_board | 1 + scripts/build-firmware-linux.sh | 7 +- scripts/build-gcpt.sh | 3 +- scripts/build-sbi.sh | 5 +- scripts/dts-config.sh | 13 + scripts/generate-nemu-board-dts.py | 365 +++++++++++++++++++++++++++ workloads/linux/gapbs/rules.mk | 5 +- workloads/linux/geekbench-common.mk | 4 +- workloads/linux/geekbench5/README.md | 5 +- workloads/linux/geekbench6/README.md | 5 +- workloads/linux/rocksdb/rules.mk | 5 +- workloads/linux/spec2006/README.md | 10 +- workloads/linux/spec2006/rules.mk | 5 +- workloads/linux/spec2017/README.md | 10 +- workloads/linux/spec2017/rules.mk | 5 +- workloads/linux/spec2026/README.md | 6 +- workloads/linux/spec2026/rules.mk | 5 +- workloads/linux/specjbb2015/rules.mk | 4 +- 22 files changed, 468 insertions(+), 76 deletions(-) create mode 160000 nemu_board create mode 100644 scripts/generate-nemu-board-dts.py diff --git a/.gitmodules b/.gitmodules index daccd27..b74a291 100644 --- a/.gitmodules +++ b/.gitmodules @@ -28,3 +28,6 @@ [submodule "bootloader/LibCheckpoint"] path = bootloader/LibCheckpoint url = https://github.com/OpenXiangShan/LibCheckpoint.git +[submodule "nemu_board"] + path = nemu_board + url = https://github.com/OpenXiangShan/nemu_board.git diff --git a/Makefile b/Makefile index 91ec694..c857846 100644 --- a/Makefile +++ b/Makefile @@ -4,6 +4,7 @@ MULTIHART ?= 0 PLATFORM ?= $(if $(filter 1,$(MULTIHART)),qemu,nemu) HARTS ?= 2 QEMU_DEFAULT_DTB ?= xiangshan-qemu-nemu-mem2g +DTS_DIR := build/generated-dts ifeq ($(filter $(PLATFORM),nemu qemu),) $(error PLATFORM must be either nemu or qemu) @@ -65,13 +66,13 @@ GCPT_SOURCE_DIR := $(if $(filter 1,$(MULTIHART)),bootloader/LibCheckpoint,bootlo GCPT_BUILD_DIR := $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint,build/LibCheckpointAlpha) GCPT_BIN := $(GCPT_BUILD_DIR)/build/gcpt.bin GCPT_DEFAULT_DTB ?= $(if $(DEFAULT_DTB),$(DEFAULT_DTB),$(if $(filter qemu,$(PLATFORM)),$(QEMU_DEFAULT_DTB),xiangshan)) -GCPT_DEFAULT_DTS := dts/$(GCPT_DEFAULT_DTB).dts.in GCPT_CONFIGURE_MODE := $(if $(filter 1,$(MULTIHART)),dual_core,normal) GCPT_SERIAL_PORT ?= $(if $(filter 1,$(MULTIHART)),0x310b0000,) GCPT_DTB_CONFIG_HASH := $(shell printf '%s\n' "$(GCPT_DEFAULT_DTB)" | sha256sum | cut -d ' ' -f 1) GCPT_CONFIG_STAMP := $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint-config/mode.$(GCPT_CONFIGURE_MODE).serial-port.$(GCPT_SERIAL_PORT),build/LibCheckpointAlpha-config/dtb.$(GCPT_DTB_CONFIG_HASH)) GCPT_SOURCES := $(if $(filter 1,$(MULTIHART)),$(shell find $(GCPT_SOURCE_DIR) -path '*/.git' -prune -o -path '*/tests' -prune -o -type f -print 2>/dev/null),$(shell find $(GCPT_SOURCE_DIR) -path '*/.git' -prune -o -type f -print 2>/dev/null)) -GCPT_DTS_SOURCES := $(if $(filter 1,$(MULTIHART)),,$(GCPT_DEFAULT_DTS)) +GCPT_DTS_SOURCES := scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json \ + $(wildcard dts/$(GCPT_DEFAULT_DTB).dts.in) $(GCPT_CONFIG_STAMP): mkdir -p "$(@D)" rm -f $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint-config/mode.*,build/LibCheckpointAlpha-config/dtb.*) @@ -83,7 +84,7 @@ $(GCPT_BIN): scripts/build-gcpt.sh scripts/dts-config.sh $(TOOLCHAIN_WRAPPER) $( GCPT_PAYLOAD_PATH="$(if $(filter 1,$(MULTIHART)),$(abspath $(SBI_BIN)),)" \ GCPT_SERIAL_PORT="$(GCPT_SERIAL_PORT)" \ DEFAULT_DTB="$(GCPT_DEFAULT_DTB)" \ - DTS_TEMPLATE_DIR="$(abspath dts)" \ + DTS_TEMPLATE_DIR="$(abspath $(DTS_DIR))" \ bash scripts/build-gcpt.sh $(GCPT_SOURCE_DIR) $(GCPT_BUILD_DIR) # Build OpenSBI @@ -92,11 +93,11 @@ $(SBI_CONFIG_STAMP): mkdir -p "$(@D)" rm -f "$(@D)"/dtb.* "$(@D)"/multihart-fixed touch "$@" -$(SBI_BIN): scripts/build-sbi.sh scripts/dts-config.sh bootloader/opensbi.config $(TOOLCHAIN_WRAPPER) $(if $(filter 1,$(MULTIHART)),,$(GCPT_DEFAULT_DTS)) $(SBI_CONFIG_STAMP) +$(SBI_BIN): scripts/build-sbi.sh scripts/dts-config.sh $(GCPT_DTS_SOURCES) bootloader/opensbi.config $(TOOLCHAIN_WRAPPER) $(SBI_CONFIG_STAMP) CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ MULTIHART="$(MULTIHART)" \ DEFAULT_DTB="$(GCPT_DEFAULT_DTB)" \ - DTS_TEMPLATE_DIR="$(abspath dts)" \ + DTS_TEMPLATE_DIR="$(abspath $(DTS_DIR))" \ bash scripts/build-sbi.sh bootloader/opensbi $(SBI_BUILD_DIR) define add_workload_linux @@ -125,14 +126,14 @@ build/linux-workloads/$(1)/firmware-vars.$(LINUX_FIRMWARE_BUILD_VARS_HASH).stamp rm -f "$$(@D)"/firmware-vars.*.stamp touch "$$@" -build/linux-workloads/$(1)/$(LINUX_FIRMWARE_FILENAME): $$(shell find $$(abspath dts)) $(GCPT_BIN) $(GCPT_DEFAULT_DTS) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) build/linux-workloads/$(1)/firmware-vars.$(LINUX_FIRMWARE_BUILD_VARS_HASH).stamp +build/linux-workloads/$(1)/$(LINUX_FIRMWARE_FILENAME): $(GCPT_DTS_SOURCES) $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) build/linux-workloads/$(1)/firmware-vars.$(LINUX_FIRMWARE_BUILD_VARS_HASH).stamp CROSS_COMPILE="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" \ DEFAULT_DTB="$(LINUX_DEFAULT_DTB)" \ FIRMWARE_OUTPUT="$$(abspath $$@)" \ MULTIHART="$$(MULTIHART)" \ HARTS="$$(HARTS)" \ - bash scripts/build-firmware-linux.sh $(GCPT_BIN) $(SBI_BUILD_DIR) dts $(LINUX_IMAGE) build/linux-workloads/$(1) + bash scripts/build-firmware-linux.sh $(GCPT_BIN) $(SBI_BUILD_DIR) $(DTS_DIR) $(LINUX_IMAGE) build/linux-workloads/$(1) linux/$(1): build/linux-workloads/$(1)/$(LINUX_FIRMWARE_FILENAME) diff --git a/README.md b/README.md index a91bcd1..e484484 100644 --- a/README.md +++ b/README.md @@ -70,8 +70,8 @@ make linux/spec2006 BENCH=astar INPUT=biglakes \ with `PLATFORM=nemu` is rejected. It creates per-hart workload directories, uses `/bin/nemu-trap` to send codes 256 and 257 before each benchmark copy and code 258 after it returns, and requires `DEFAULT_DTB` to be set to the complete -DTS basename. Its matching template must exist in `dts/`; the build fails -rather than guessing a memory profile or generating a missing multi-hart DTS. +DTS basename. Recognized basenames are generated into `build/generated-dts`; +the build still fails rather than guessing an omitted hart or memory profile. Other Linux workload targets remain NEMU-only. SPECjbb2015 can be built from locally supplied licensed media and an RV64 JDK: @@ -169,7 +169,8 @@ For OpenSBI, the multi-hart image uses `FW_TEXT_START=0x80100000`, The canonical single-core and multi-hart DTS memory maps, including DRAM profiles and DTS selection examples, are in [dts/README.md](dts/README.md#single-core-physical-memory-map). -For single-core images, the selected DTS is the source of truth for the DRAM +For single-core images, the selected DTS is generated by `nemu_board` at build +time and is the source of truth for the DRAM base used by GCPT, OpenSBI, the firmware packer, and the exported manifest, as well as the CLINT address used by GCPT. Its generated DTS and DTB are placed in the workload's `dt` directory and the DTB is embedded in the firmware image. @@ -286,8 +287,16 @@ Then run `make` to build your new workload. ## Adding a Device Tree -To add a device tree, create a template file `device_name.dts.in` in the `dts` -directory and select it with `DEFAULT_DTB=device_name`. +Device-tree templates are generated at build time through +`scripts/generate-nemu-board-dts.py` and `nemu_board/dts/DTSGen.py` into +`build/generated-dts`; `DEFAULT_DTB=device_name` selects the generator profile. +Recognized basenames always use the generated template; the checked-in +`dts/*.dts.in` files are no longer read for them and remain as references. + +For an unsupported custom basename, place the complete template at +`dts/.dts.in` and select it with `DEFAULT_DTB=`. It is copied into +`build/generated-dts` on each build, so it survives cleaning the build tree; a +missing unsupported basename is rejected. Currently, the memory location of the initramfs containing the workload is passed to the kernel by device tree. So for each workload, device tree files are generated from the template on the fly, because the size of the initramfs cannot be known in advance. You should use the parameters `INITRAMFS_BEGIN` and `INITRAMFS_END` in the device tree template. diff --git a/dts/README.md b/dts/README.md index 24ac981..1da5aaf 100644 --- a/dts/README.md +++ b/dts/README.md @@ -1,8 +1,11 @@ -# Device Tree Templates +# Device Tree Reference Templates -This directory contains device tree templates for each device configuration. -For each workload, the selected device tree is generated from its template on -the fly because some parameters cannot be known in advance. +This directory contains the historical device tree templates for each device +configuration. Firmware builds generate recognized basenames through +`scripts/generate-nemu-board-dts.py` into `build/generated-dts`, so these files +remain only as references for the platform contracts below. Unsupported custom +basenames are read from this directory as `dts/.dts.in` and copied into +`build/generated-dts`, which keeps them outside the build tree. ## Parameters @@ -30,8 +33,8 @@ These parameters are replaced with the corresponding values when building the wo Multi-hart XiangShan builds require the user to select a complete DTS basename with `DEFAULT_DTB`; the build no longer assumes a `mem8g` suffix. For example, `DEFAULT_DTB=xiangshan-fpga-noAIA-32hart-mem64g` selects -`xiangshan-fpga-noAIA-32hart-mem64g.dts.in`. The matching template must exist; -the build fails if it does not. +the generated `xiangshan-fpga-noAIA-32hart-mem64g.dts.in`. The complete name +provides the hart and memory profiles; the build does not guess either value. ## Single-Core Physical Memory Map @@ -120,32 +123,23 @@ python3 scripts/generate-xiangshan-multihart-dts.py \ Use `--memory-gib` to override the copied DRAM capacity. The checked-in 16 GiB two-hart profile can be regenerated with: -```shell -python3 scripts/generate-xiangshan-multihart-dts.py \ - --base dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in \ - --harts 2 \ - --memory-gib 16 \ - --output dts/xiangshan-fpga-noAIA-2hart-mem16g-novec.dts.in -``` +## Build-Time Multi-Hart DTS Generation -`--harts` must be in the range 2 through 128, and `--memory-gib` must be a -positive integer when specified. The generator copies the CPU node for each -hart, extends the CLINT, PLIC, and debug interrupt contexts, sets -`riscv,ndev = <66>`, and emits the no-IRQ 16550A console at `0x310b0000` used -by the supported QEMU `nemu` machine. Generated multi-hart templates reserve -the fixed 131 MiB checkpoint window `[0x80300000, 0x88600000)`. +The build invokes `scripts/generate-nemu-board-dts.py` for the selected +`DEFAULT_DTB`. Hart count and memory size are derived from the complete +basename, for example `xiangshan-qemu-nemu-2hart-mem16g-novec`. Supported +multi-hart counts are 2 through 128. Generated multi-hart FPGA and QEMU +templates reserve the fixed 131 MiB checkpoint window +`[0x80300000, 0x88600000)`. The full capability block describes XiangShan hardware and is not fully emulated by the current QEMU `nemu` path. In particular, the timer path cannot execute the DT-advertised `sstc` CSR sequence, so generated multi-hart CPU nodes omit `sstc`. -The build does not invoke this generator automatically. Run it and review the -result before building with the corresponding `HARTS` value. - -The generator can create other topologies. For multi-core firmware, set -`HARTS` in the range 2 through 128 to match both the generated template and the -QEMU checkpoint, and pass that template through `DEFAULT_DTB`. Every +For multi-core firmware, set `HARTS` in the range 2 through 128 to match both +the generated template and the QEMU checkpoint, and select that template +through `DEFAULT_DTB`. Every multi-hart image uses DTB address `0x80200000` and kernel address `0x88600000`; the fixed placement keeps the 131 MiB checkpoint window at `0x80300000` clear of the boot payload. diff --git a/nemu_board b/nemu_board new file mode 160000 index 0000000..5e71d1f --- /dev/null +++ b/nemu_board @@ -0,0 +1 @@ +Subproject commit 5e71d1f5c94574414132db59a0da3a8ec86467da diff --git a/scripts/build-firmware-linux.sh b/scripts/build-firmware-linux.sh index c791a60..1f3ad30 100644 --- a/scripts/build-firmware-linux.sh +++ b/scripts/build-firmware-linux.sh @@ -3,7 +3,7 @@ set -e STARTUP_FILE="$(realpath "$1")" SBI_BUILD_DIR="$(realpath "$2")" -DTS_TEMPLATE_DIR="$(realpath "$3")" +DTS_TEMPLATE_DIR="$(realpath -m "$3")" KERNEL_IMAGE="$(realpath "$4")" WORKLOAD_BUILD_DIR="$(realpath "$5")" CPIO_ARCHIVE="$WORKLOAD_BUILD_DIR/rootfs.cpio" @@ -60,10 +60,7 @@ resolve_default_dtb_base() { DEFAULT_DTB_BASE="$(resolve_default_dtb_base "$DEFAULT_DTB" "$DTB_MEMORY_PROFILE")" DEFAULT_DTB_TEMPLATE="$DTS_TEMPLATE_DIR/$DEFAULT_DTB_BASE.dts.in" -if ! [ -f "$DEFAULT_DTB_TEMPLATE" ]; then - echo "Default device tree template not found in dts directory: $DEFAULT_DTB_TEMPLATE" >&2 - exit 1 -fi +dts_generate_template "$DTS_TEMPLATE_DIR" "$DEFAULT_DTB_BASE" DTS_CONFIG="$(dts_extract_config "$DEFAULT_DTB_TEMPLATE")" read -r MEM_BEGIN MEM_SIZE CLINT_MMIO <<< "$DTS_CONFIG" if [ "${MULTIHART:-0}" = 1 ] && { diff --git a/scripts/build-gcpt.sh b/scripts/build-gcpt.sh index 7a6f531..02a7b63 100644 --- a/scripts/build-gcpt.sh +++ b/scripts/build-gcpt.sh @@ -20,9 +20,10 @@ rm -rf "$GCPT_BUILD_DIR/build" case "$GCPT_IMPLEMENTATION" in alpha) - DTS_TEMPLATE_DIR="$(realpath "${DTS_TEMPLATE_DIR:?DTS_TEMPLATE_DIR is required for LibCheckpointAlpha}")" + DTS_TEMPLATE_DIR="$(realpath -m "${DTS_TEMPLATE_DIR:?DTS_TEMPLATE_DIR is required for LibCheckpointAlpha}")" DEFAULT_DTB="${DEFAULT_DTB:-xiangshan}" DTS_TEMPLATE="$DTS_TEMPLATE_DIR/$DEFAULT_DTB.dts.in" + dts_generate_template "$DTS_TEMPLATE_DIR" "$DEFAULT_DTB" DTS_CONFIG="$(dts_extract_config "$DTS_TEMPLATE")" read -r MEM_BEGIN MEM_SIZE CLINT_MMIO <<< "$DTS_CONFIG" export CFLAGS="${CFLAGS:-} -DCONFIG_CLINT_MMIO=$CLINT_MMIO -DCONFIG_DRAM_BASE=$MEM_BEGIN" diff --git a/scripts/build-sbi.sh b/scripts/build-sbi.sh index 0078a51..96dbe3f 100644 --- a/scripts/build-sbi.sh +++ b/scripts/build-sbi.sh @@ -13,9 +13,10 @@ if [ "${MULTIHART:-0}" = 1 ]; then FW_JUMP_FDT_ADDR=0x80200000 else DEFAULT_DTB="${DEFAULT_DTB:-xiangshan}" - DTS_TEMPLATE_DIR="${DTS_TEMPLATE_DIR:-$(dirname "${BASH_SOURCE[0]}")/../dts}" - DTS_TEMPLATE_DIR="$(realpath "$DTS_TEMPLATE_DIR")" + DTS_TEMPLATE_DIR="${DTS_TEMPLATE_DIR:-$(dirname "${BASH_SOURCE[0]}")/../build/generated-dts}" + DTS_TEMPLATE_DIR="$(realpath -m "$DTS_TEMPLATE_DIR")" DTS_TEMPLATE="$DTS_TEMPLATE_DIR/$DEFAULT_DTB.dts.in" + dts_generate_template "$DTS_TEMPLATE_DIR" "$DEFAULT_DTB" DTS_CONFIG="$(dts_extract_config "$DTS_TEMPLATE")" read -r MEM_BEGIN MEM_SIZE CLINT_MMIO <<< "$DTS_CONFIG" FW_TEXT_START=$((MEM_BEGIN + MEGABYTE)) diff --git a/scripts/dts-config.sh b/scripts/dts-config.sh index 2714382..bd2d91b 100755 --- a/scripts/dts-config.sh +++ b/scripts/dts-config.sh @@ -1,5 +1,18 @@ #!/usr/bin/env bash +# Generate a recognized DTS basename or preserve an existing custom template. +dts_generate_template() { + local dts_dir="$1" + local default_dtb="$2" + local generator="$(dirname "${BASH_SOURCE[0]}")/generate-nemu-board-dts.py" + local custom_dir="$(dirname "${BASH_SOURCE[0]}")/../dts" + local output="$dts_dir/$default_dtb.dts.in" + + python3 "$generator" --name "$default_dtb" --output "$output" \ + --preserve-existing-unsupported \ + --custom-template-dir "$custom_dir" +} + # Print the selected DTS address configuration as three shell words: # memory base, memory size, and CLINT base. dts_extract_config() { diff --git a/scripts/generate-nemu-board-dts.py b/scripts/generate-nemu-board-dts.py new file mode 100644 index 0000000..b61bdb8 --- /dev/null +++ b/scripts/generate-nemu-board-dts.py @@ -0,0 +1,365 @@ +#!/usr/bin/env python3 +"""Generate workload-builder DTS templates through nemu_board's DTSGen.""" + +import argparse +import importlib.util +import json +import os +import re +import shutil +import tempfile +from pathlib import Path + + +ROOT = Path(__file__).resolve().parents[1] +NEMU_BOARD_DTSGEN = ROOT / "nemu_board" / "dts" / "DTSGen.py" +PROFILE_FILE = ROOT / "nemu_board" / "dts" / "workload-builder-profiles.json" +DRAM_BASE = 0x80000000 +VECTOR_EXTENSIONS = {"v", "zvbb", "zvfh", "zvfhmin", "zvkt", + "zvl128b", "zvl32b", "zvl64b"} +INITRD = """linux,initrd-start = ; +linux,initrd-end = ;""" + + +class UnsupportedDTSName(ValueError): + pass + + +def load_dtsgen(): + spec = importlib.util.spec_from_file_location("nemu_board_dtsgen", NEMU_BOARD_DTSGEN) + if spec is None or spec.loader is None: + raise SystemExit(f"cannot load nemu_board DTSGen.py: {NEMU_BOARD_DTSGEN}") + module = importlib.util.module_from_spec(spec) + spec.loader.exec_module(module) + return module.DTSGen + + +def memory_gib(name): + match = re.search(r"-mem([1-9][0-9]*)g(?:-|$)", name) + return int(match.group(1)) if match else (128 if name == "xiangshan" else 2) + + +def harts(name): + match = re.search(r"-(\d+)hart(?:-|$)", name) + return int(match.group(1)) if match else 1 + + +def chosen_properties(profile, initrd=True): + lines = [] + if initrd: + lines.append(INITRD) + if profile in {"fpga", "qemu"}: + lines.append('stdout-path = "serial0:115200n8";') + lines.append('opensbi-config {\n compatible = "opensbi,config";\n cold-boot-harts = <&cpu0>;\n};') + elif profile == "spike": + lines.append("stdout-path = &serial0;") + return "\n".join(lines) + + +def cache_properties(nemu=False, timebase=False): + size, sets, tlb = (16384, 64, 32) if nemu else (65536, 256, 48) + result = ['status = "okay";', "clock-frequency = <0>;"] + if timebase: + result.append("timebase-frequency = <1000000>;") + result += ["tlb-split;"] + for kind in ("i", "d"): + result += [f"{kind}-cache-block-size = <64>;", + f"{kind}-cache-sets = <{sets}>;", + f"{kind}-cache-size = <{size}>;", + f"{kind}-tlb-sets = <1>;", + f"{kind}-tlb-size = <{tlb}>;"] + return "\n".join(result) + + +def serial16550(): + return """uart0: serial@310b0000 { + compatible = "ns16550a"; + reg = <0x0 0x310b0000 0x0 0x10000>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <50000000>; + current-speed = <115200>; + status = "okay"; +};""" + + +def serial_spike(): + return """serial0: ns16550@10000000 { + compatible = "ns16550a"; + clock-frequency = <10000000>; + interrupt-parent = <&plic>; + interrupts = <1>; + reg = <0x0 0x10000000 0x0 0x100>; + reg-shift = <0>; + reg-io-width = <1>; +};""" + + +def serial_uartlite(): + return """serial0: serial@40600000 { + compatible = "xlnx,xps-uartlite-1.00.a"; + reg = <0x0 0x40600000 0x0 0x1000>; + current-speed = <115200>; +};""" + + +def debug_controller(nr_harts): + interrupts = ", ".join( + f"<&cpu{hart_id}_intc 65535>" for hart_id in range(nr_harts) + ) + return f"""debug-controller@38020000 {{ + compatible = "sifive,debug-013", "riscv,debug-013"; + debug-attach = "jtag"; + reg = <0x0 0x38020000 0x0 0x1000>; + reg-names = "control"; + interrupts-extended = {interrupts}; +}};""" + + +def aia_devices(): + return ["""imsics_m: imsics@3a800000 { + #address-cells = <0>; + riscv,num-ids = <255>; + reg = <0x0 0x3a800000 0x0 0x10000>; + msi-controller; + interrupt-controller; + #interrupt-cells = <0>; + compatible = "riscv,imsics"; + interrupts-extended = <&cpu0_intc 11>; +};""", """imsics_s: imsics@3b000000 { + #address-cells = <0>; + riscv,num-ids = <255>; + reg = <0x0 0x3b000000 0x0 0x80000>; + msi-controller; + interrupt-controller; + #interrupt-cells = <0>; + compatible = "riscv,imsics"; + riscv,guest-index-bits = <3>; + interrupts-extended = <&cpu0_intc 9>; +};""", """aplic_s: aplic@31120000 { + #address-cells = <0>; + riscv,num-sources = <64>; + reg = <0x0 0x31120000 0x0 0x8000>; + msi-parent = <&imsics_s>; + interrupt-controller; + #interrupt-cells = <2>; + compatible = "riscv,aplic"; +};""", """aplic_m: aplic@31100000 { + #address-cells = <0>; + riscv,delegate = <&aplic_s 1 64>; + riscv,children = <&aplic_s>; + riscv,num-sources = <64>; + reg = <0x0 0x31100000 0x0 0x8000>; + msi-parent = <&imsics_m>; + interrupt-controller; + #interrupt-cells = <2>; + compatible = "riscv,aplic"; +};"""] + + +def render(name, isa_config_name="kunminghu-v3"): + DTSGen = load_dtsgen() + profiles = json.loads(PROFILE_FILE.read_text()) + is_novec = name.endswith("-novec") + nr_harts = harts(name) + memory = memory_gib(name) << 30 if name != "xiangshan" else 128 << 20 + root_nodes = [] + + non_fpga_generated = (name.startswith(("xiangshan-qemu-nemu", "spike", "yanqihu")) + or name in {"xiangshan", "nutshell"}) + if isa_config_name != "kunminghu-v3" and non_fpga_generated: + raise ValueError("--isa-config is supported by the FPGA noAIA profile only") + + if name.startswith("xiangshan-fpga-noAIA"): + profile = profiles["fpga-noaia-novec"] + isa_config = (profile if isa_config_name == "kunminghu-v3" + else profile["isa_configs"][isa_config_name]) + isa = set(isa_config["isa_extensions"]) + if not is_novec: + isa.update(VECTOR_EXTENSIONS) + else: + isa.difference_update(VECTOR_EXTENSIONS) + if nr_harts > 1: + isa.discard("sstc") + cpu_props = cache_properties() + cpu_props += "\ntimebase-frequency = <1000000>;" + root_nodes.append("""aliases { serial0 = &uart0; };""") + root_nodes.append("""l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-block-size = <64>; + cache-size = <1048576>; +};""") + cpu_props += "\nnext-level-cache = <&l2_cache>;" + legacy_isa = isa_config["legacy_isa"] + if is_novec: + legacy_isa = legacy_isa.replace("rv64imafdcvh", "rv64imafdch") + else: + legacy_isa = legacy_isa.replace("rv64imafdch", "rv64imafdcvh") + if nr_harts > 1: + legacy_isa = legacy_isa.replace("_sstc", "") + gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", + model="xiangshan,Kunminghu-dev", + cpu_compatibles=["ICT,xiangshan", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions(sorted(isa)), + legacy_isa=legacy_isa, + mmu_type="riscv,sv48", timebase_freq=1000000, + nr_harts=nr_harts, memories=[(DRAM_BASE, memory)], + reserved_memories=[], cpu_properties=cpu_props, + chosen_properties=chosen_properties("fpga"), + root_nodes=root_nodes, cache_block_operations=["zicbom", "zicboz"], + interrupts_in_soc=True, + soc_compatible=["freechips,rocketchip-unknown-soc", "simple-bus"], + plic_node_name="interrupt-controller", interrupt_reg_names="control", + plic_ndev=66, + uartlite_addr=None, + bootargs="console=hvc0 earlycon=sbi loglevel=8") + gen.add_device(debug_controller(nr_harts)) + gen.add_device(serial16550()) + elif name.startswith("xiangshan-qemu-nemu"): + isa = set(profiles["qemu-nemu"]["isa_extensions"]) + if is_novec: + isa.difference_update(VECTOR_EXTENSIONS) + cpu_props = cache_properties() + cpu_props += "\nnext-level-cache = <&l2_cache>;" + root_nodes += ["aliases { serial0 = &uart0; };", """l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-block-size = <64>; + cache-size = <1048576>; +};"""] + gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", model="qemu,nemu", + cpu_compatibles=["ICT,xiangshan", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions(sorted(isa)), + legacy_isa=(profiles["qemu-nemu"]["legacy_isa"] + if not is_novec else profiles["qemu-nemu"]["legacy_isa"].replace("rv64imafdcvh", "rv64imafdch")), + mmu_type="riscv,sv48", timebase_freq=1000000, + nr_harts=nr_harts, memories=[(DRAM_BASE, memory)], + reserved_memories=[], cpu_properties=cpu_props, + chosen_properties=chosen_properties("qemu"), root_nodes=root_nodes, + plic_ndev=66, + uartlite_addr=None, + bootargs="console=hvc0 earlycon=sbi") + gen.add_device(serial16550()) + elif name == "xiangshan": + gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", + model="freechips,rocketchip-unknown", + cpu_compatibles=["UCAS,COOSCA1.0", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions("i m a f d c h v".split()), + legacy_isa="rv64imafdchv", mmu_type="riscv,sv39", + timebase_freq=1000000, memories=[(DRAM_BASE, memory)], + reserved_memories=[], plic_machine_first=False, + bootargs="console=hvc0 earlycon=sbi") + elif name.startswith("spike"): + nr_harts = 2 if name == "spike-2core" else 1 + gen = DTSGen(compatible="ucbbar,spike-bare-dev", model="ucbbar,spike-bare", + isa_extensions=DTSGen.sort_isa_extensions("i m a f d c zicntr zihpm".split()), + legacy_isa="rv64imafdc_zicntr_zihpm", mmu_type="riscv,sv57", + timebase_freq=10000000, nr_harts=nr_harts, clint_addr=0x02000000, + plic_addr=0x0c000000, plic_ndev=31, memories=[(DRAM_BASE, 2 << 30)], + reserved_memories=[], chosen_properties=chosen_properties("spike"), + uartlite_addr=None, bootargs="console=ttyS0 earlycon", + root_nodes=["htif { compatible = \"ucb,htif0\"; };"]) + gen.add_device(serial_spike()) + elif name == "nutshell": + gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", + model="xiangshan,xiangshan-kunminghu", + cpu_compatibles=["UCAS,COOSCA1.0", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions("i m a f d c zicntr zicsr zifencei zihpm".split()), + legacy_isa="rv64imafdc", mmu_type="riscv,sv39", timebase_freq=1000000, + clint_addr=0x38000000, plic_addr=None, memories=[(DRAM_BASE, 128 << 20)], + reserved_memories=[], uartlite_addr=None, + bootargs="console=hvc0 earlycon=sbi") + gen.add_device(serial_uartlite()) + elif name == "xiangshan-fpga-AIA-mem16g": + isa_config = profiles["fpga-noaia-novec"]["isa_configs"]["kunminghu-v2"] + isa = set(profiles["fpga-noaia-novec"]["isa_extensions"]) + isa.update(isa_config["isa_extensions"]) + isa.discard("zca") + isa.update({"smaia", "ssaia", "zabha", "zicbom", "zicboz"}) + cpu_props = cache_properties(timebase=True) + "\nnext-level-cache = <&l2_cache>;" + root_nodes = ["aliases { serial0 = &uart0; };", """l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-block-size = <64>; + cache-size = <1048576>; +};"""] + gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", + model="xiangshan,Kunminghu-dev", + cpu_compatibles=["ICT,xiangshan", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions(sorted(isa)), + legacy_isa="rv64imafdcvh_smaia_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade", + mmu_type="riscv,sv48", timebase_freq=1000000, + memories=[(DRAM_BASE, 16 << 30)], reserved_memories=[], + plic_addr=None, cpu_properties=cpu_props, + chosen_properties=chosen_properties("fpga"), root_nodes=root_nodes, + cache_block_operations=["zicbom", "zicboz"], interrupts_in_soc=True, + soc_compatible=["freechips,rocketchip-unknown-soc", "simple-bus"], + interrupt_reg_names="control", + bootargs="console=hvc0 earlycon=sbi loglevel=8") + gen.add_device(debug_controller(1)) + for device in aia_devices() + [serial16550()]: + gen.add_device(device) + elif name.startswith("yanqihu"): + nr_harts = 2 if name == "yanqihu-2core" else 1 + gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", + model="freechips,rocketchip-unknown", + cpu_compatibles=["UCAS,COOSCA1.0", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions("i m a f d c".split()), + legacy_isa="rv64imafdc", mmu_type="riscv,sv39", timebase_freq=1000000, + nr_harts=nr_harts, memories=[(DRAM_BASE, 128 << 20)], + reserved_memories=[], plic_machine_first=False, + chosen_properties=chosen_properties("nemu"), + bootargs="console=hvc0 earlycon=sbi") + else: + raise UnsupportedDTSName(f"unsupported DTS basename: {name}") + + gen.add_reserved_memory(DRAM_BASE, 0x100000, name="gcpt") + if nr_harts > 1 and name.startswith( + ("xiangshan-fpga-noAIA", "xiangshan-qemu-nemu")): + gen.add_reserved_memory(0x80300000, 0x08300000, name="checkpoint") + output = gen.gen_dts() + output = output.replace("0x80300000 0x0 0x8300000", "0x80300000 0x0 0x08300000") + return "/* Generated by nemu_board for workload-builder. */\n" + output + "\n" + + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument("--name", required=True, help="DTS basename without .dts.in") + parser.add_argument("--output", required=True, type=Path) + parser.add_argument("--isa-config", choices=["kunminghu-v3", "kunminghu-v2"], + default="kunminghu-v3", + help="named FPGA noAIA ISA declaration (default: kunminghu-v3)") + parser.add_argument("--preserve-existing-unsupported", action="store_true", + help="keep an existing output when its basename is not generated") + parser.add_argument("--custom-template-dir", type=Path, default=None, + help="directory holding user-supplied templates for " + "unsupported basenames") + args = parser.parse_args() + if not NEMU_BOARD_DTSGEN.is_file(): + parser.error(f"nemu_board DTSGen.py not found: {NEMU_BOARD_DTSGEN}") + if not args.output.name.endswith(".dts.in"): + parser.error("--output must end in .dts.in") + try: + output = render(args.name, args.isa_config) + args.output.parent.mkdir(parents=True, exist_ok=True) + with tempfile.NamedTemporaryFile("w", encoding="utf-8", + dir=args.output.parent, delete=False) as tmp: + tmp.write(output) + os.replace(tmp.name, args.output) + except UnsupportedDTSName as exc: + if args.preserve_existing_unsupported and args.output.is_file(): + return + custom = (args.custom_template_dir / args.output.name + if args.custom_template_dir else None) + if custom is not None and custom.is_file(): + args.output.parent.mkdir(parents=True, exist_ok=True) + shutil.copyfile(custom, args.output) + return + parser.error(str(exc)) + except (OSError, ValueError) as exc: + parser.error(str(exc)) + + +if __name__ == "__main__": + main() diff --git a/workloads/linux/gapbs/rules.mk b/workloads/linux/gapbs/rules.mk index 32b7d75..db61d72 100644 --- a/workloads/linux/gapbs/rules.mk +++ b/workloads/linux/gapbs/rules.mk @@ -4,7 +4,7 @@ GAPBS_SELF_MAKEFILE := $(GAPBS_WORKLOAD_DIR)/rules.mk GAPBS_ROOT_MAKEFILE := $(GAPBS_REPO_ROOT)/Makefile GAPBS_RECURSE_MAKEFILE := $(if $(filter $(GAPBS_ROOT_MAKEFILE),$(abspath $(firstword $(MAKEFILE_LIST)))),$(GAPBS_ROOT_MAKEFILE),$(GAPBS_SELF_MAKEFILE)) GAPBS_SCRIPTS_DIR := $(GAPBS_REPO_ROOT)/scripts -GAPBS_DTS_DIR := $(GAPBS_REPO_ROOT)/dts +GAPBS_DTS_DIR := $(GAPBS_REPO_ROOT)/build/generated-dts GAPBS_BUILD_DIR ?= $(GAPBS_REPO_ROOT)/build/linux-workloads/gapbs GAPBS_IMAGE_DIR ?= $(GAPBS_REPO_ROOT)/build/images/gapbs GAPBS_HELPER := $(GAPBS_WORKLOAD_DIR)/gapbs-package.py @@ -19,7 +19,8 @@ GAPBS_SBI_BUILD_DIR ?= $(if $(SBI_BUILD_DIR),$(SBI_BUILD_DIR),$(GAPBS_REPO_ROOT) GAPBS_SBI_BIN ?= $(if $(SBI_BIN),$(SBI_BIN),$(GAPBS_SBI_BUILD_DIR)/build/platform/generic/firmware/fw_jump.bin) GAPBS_BUILDROOT_CROSS_COMPILE ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/riscv64-linux- GAPBS_DTC ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/dtc -GAPBS_DTS_SOURCES := $(shell find $(GAPBS_DTS_DIR) -type f 2>/dev/null) +GAPBS_DTS_SOURCES := $(GAPBS_SCRIPTS_DIR)/generate-nemu-board-dts.py $(GAPBS_REPO_ROOT)/nemu_board/dts/DTSGen.py $(GAPBS_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ + $(wildcard $(GAPBS_REPO_ROOT)/dts/$(GAPBS_DEFAULT_DTB).dts.in) GAPBS_ALL_CASES := $(shell python3 $(GAPBS_HELPER) --list-cases) WORKLOAD_DIRS += $(GAPBS_BUILD_DIR) diff --git a/workloads/linux/geekbench-common.mk b/workloads/linux/geekbench-common.mk index 020cbaa..1b6ab92 100644 --- a/workloads/linux/geekbench-common.mk +++ b/workloads/linux/geekbench-common.mk @@ -23,11 +23,11 @@ build/linux-workloads/$(1)/rootfs.cpio: $$(shell find $$(abspath workloads/linux bash scripts/build-workload-linux.sh workloads/linux/$(1) build/linux-workloads/$(1) # Build all-in-one firmware -build/linux-workloads/$(1)/fw_payload.bin: $$(shell find $$(abspath dts)) $(GCPT_BIN) dts/xiangshan.dts.in scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin +build/linux-workloads/$(1)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(GEEKBENCH_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin CROSS_COMPILE="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" \ DEFAULT_DTB="$(GEEKBENCH_DEFAULT_DTB)" \ - bash scripts/build-firmware-linux.sh $(GCPT_BIN) build/opensbi dts $(LINUX_IMAGE) build/linux-workloads/$(1) + bash scripts/build-firmware-linux.sh $(GCPT_BIN) build/opensbi build/generated-dts $(LINUX_IMAGE) build/linux-workloads/$(1) linux/$(1): @$$(MAKE) --no-print-directory \ diff --git a/workloads/linux/geekbench5/README.md b/workloads/linux/geekbench5/README.md index 846cbb6..1881ba1 100644 --- a/workloads/linux/geekbench5/README.md +++ b/workloads/linux/geekbench5/README.md @@ -20,8 +20,9 @@ The resulting firmware is written to `build/linux-workloads/geekbench5/` as `fw_payload.bin`, with the unpacked initramfs in `rootfs.cpio` and generated device trees in `dt/`. -This workload uses `dts/xiangshan-fpga-noAIA.dts.in` as its built-in default -device tree so the large Geekbench initramfs stays inside Linux-visible memory. +This workload generates the `xiangshan-fpga-noAIA` profile as its built-in +default device tree so the large Geekbench initramfs stays inside Linux-visible +memory. The automated boot path runs `./geekbench_riscv64 --cpu --iterations 1` so the simulator validation can reach a good trap in reasonable time. The default DTB diff --git a/workloads/linux/geekbench6/README.md b/workloads/linux/geekbench6/README.md index bbf5110..6fd8f59 100644 --- a/workloads/linux/geekbench6/README.md +++ b/workloads/linux/geekbench6/README.md @@ -21,8 +21,9 @@ The resulting firmware is written to `build/linux-workloads/geekbench6/` as `fw_payload.bin`, with the unpacked initramfs in `rootfs.cpio` and generated device trees in `dt/`. -This workload uses `dts/xiangshan-fpga-noAIA.dts.in` as its built-in default -device tree so the large Geekbench initramfs stays inside Linux-visible memory. +This workload generates the `xiangshan-fpga-noAIA` profile as its built-in +default device tree so the large Geekbench initramfs stays inside Linux-visible +memory. The automated boot path runs `./geekbench_riscv64 --cpu --iterations 1` so the simulator validation can reach a good trap in reasonable time. The default DTB diff --git a/workloads/linux/rocksdb/rules.mk b/workloads/linux/rocksdb/rules.mk index 7334399..08077e6 100644 --- a/workloads/linux/rocksdb/rules.mk +++ b/workloads/linux/rocksdb/rules.mk @@ -1,7 +1,7 @@ ROCKSDB_WORKLOAD_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST)))) ROCKSDB_REPO_ROOT := $(abspath $(ROCKSDB_WORKLOAD_DIR)/../../..) ROCKSDB_SCRIPTS_DIR := $(ROCKSDB_REPO_ROOT)/scripts -ROCKSDB_DTS_DIR := $(ROCKSDB_REPO_ROOT)/dts +ROCKSDB_DTS_DIR := $(ROCKSDB_REPO_ROOT)/build/generated-dts ROCKSDB_BUILD_DIR ?= $(ROCKSDB_REPO_ROOT)/build/linux-workloads/rocksdb ROCKSDB_IMAGE_DIR ?= $(ROCKSDB_REPO_ROOT)/build/images/rocksdb ROCKSDB_CASES := readwhilewriting readrandomwriterandom updaterandom seekrandomwhilewriting randomtransaction timeseries mixgraph @@ -33,7 +33,8 @@ ROCKSDB_OPT_FLAGS ?= -O3 -ftree-vectorize -ftree-loop-vectorize -ftree-slp-vecto ROCKSDB_DTC ?= $(ROCKSDB_BUILDROOT_DIR)/output/host/bin/dtc ROCKSDB_COMMON_STAMP := $(ROCKSDB_BUILD_DIR)/common.stamp ROCKSDB_PACKAGE_HELPER := $(ROCKSDB_WORKLOAD_DIR)/package-case.sh -ROCKSDB_DTS_SOURCES := $(shell find $(ROCKSDB_DTS_DIR) -type f 2>/dev/null) +ROCKSDB_DTS_SOURCES := $(ROCKSDB_SCRIPTS_DIR)/generate-nemu-board-dts.py $(ROCKSDB_REPO_ROOT)/nemu_board/dts/DTSGen.py $(ROCKSDB_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ + $(wildcard $(ROCKSDB_REPO_ROOT)/dts/$(ROCKSDB_DEFAULT_DTB).dts.in) ROCKSDB_NON_COMMON_INPUTS := $(ROCKSDB_WORKLOAD_DIR)/README.md $(ROCKSDB_WORKLOAD_DIR)/links.txt $(ROCKSDB_WORKLOAD_DIR)/rules.mk $(ROCKSDB_PACKAGE_HELPER) ROCKSDB_COMMON_INPUTS := $(filter-out $(ROCKSDB_NON_COMMON_INPUTS),$(shell find $(ROCKSDB_WORKLOAD_DIR) -type f 2>/dev/null)) ROCKSDB_CASE_FIRMWARE := $(foreach case,$(ROCKSDB_CASES),$(ROCKSDB_BUILD_DIR)/$(case)/fw_payload.bin) diff --git a/workloads/linux/spec2006/README.md b/workloads/linux/spec2006/README.md index a014606..af951d4 100644 --- a/workloads/linux/spec2006/README.md +++ b/workloads/linux/spec2006/README.md @@ -84,9 +84,9 @@ Adding `PLATFORM=qemu` exports the complete QEMU artifact tree to the same `build/images/spec2006` directory. Its firmware is `bin/.fw_payload.bin`. -By default, NEMU firmware embeds `dts/xiangshan-fpga-noAIA-novec.dts.in`, while -QEMU firmware embeds `dts/xiangshan-qemu-nemu-mem2g.dts.in`. Override the -platform default with `DEFAULT_DTB` if you need another DTS template: +By default, NEMU firmware generates the `xiangshan-fpga-noAIA-novec` profile, +while QEMU firmware generates `xiangshan-qemu-nemu-mem2g`. Override the +platform default with `DEFAULT_DTB` if you need another DTS profile: ```sh make linux/spec2006 BENCH=astar INPUT=biglakes \ @@ -133,8 +133,8 @@ starting that hart's benchmark copy with `SPEC_ROOT=/specX`, then uses CPU binding. When `MULTIHART=1`, `DEFAULT_DTB` must be the complete DTS basename, including -the desired memory profile. The corresponding `dts/.dts.in` -template must exist; firmware assembly fails if it is missing. +the desired hart and memory profiles. Recognized basenames are generated into +`build/generated-dts`; the build does not infer missing profile components. Selected SPEC cases are built one by one to avoid concurrent `runspec` instances contending on shared temporary state inside the SPEC tool tree. diff --git a/workloads/linux/spec2006/rules.mk b/workloads/linux/spec2006/rules.mk index f084b6c..1ac176b 100644 --- a/workloads/linux/spec2006/rules.mk +++ b/workloads/linux/spec2006/rules.mk @@ -4,7 +4,7 @@ SPEC2006_SELF_MAKEFILE := $(SPEC2006_WORKLOAD_DIR)/rules.mk SPEC2006_ROOT_MAKEFILE := $(SPEC2006_REPO_ROOT)/Makefile SPEC2006_RECURSE_MAKEFILE := $(if $(filter $(SPEC2006_ROOT_MAKEFILE),$(abspath $(firstword $(MAKEFILE_LIST)))),$(SPEC2006_ROOT_MAKEFILE),$(SPEC2006_SELF_MAKEFILE)) SPEC2006_SCRIPTS_DIR := $(SPEC2006_REPO_ROOT)/scripts -SPEC2006_DTS_DIR := $(SPEC2006_REPO_ROOT)/dts +SPEC2006_DTS_DIR := $(SPEC2006_REPO_ROOT)/build/generated-dts SPEC2006_BUILD_DIR ?= $(SPEC2006_REPO_ROOT)/build/linux-workloads/spec2006 SPEC2006_CASE_CONFIG := $(SPEC2006_WORKLOAD_DIR)/spec06.json SPEC2006_CFG ?= $(SPEC2006_WORKLOAD_DIR)/configs/gcc16-linux-riscv64-rva23u64_novec.cfg @@ -57,7 +57,8 @@ SPEC2006_ALL_CASES := $(shell python3 $(SPEC2006_HELPER) --cases-config $(SPEC20 SPEC2006_SELECTED_CASES := $(shell python3 $(SPEC2006_HELPER) --cases-config $(SPEC2006_CASE_CONFIG) --list-cases --input-set $(SPEC2006_INPUT) 2>/dev/null) SPEC2006_IMAGE_CASES := $(if $(BENCH),$(SPEC2006_CASE),$(SPEC2006_SELECTED_CASES)) SPEC2006_ELF_TARGETS := $(foreach case,$(SPEC2006_SELECTED_CASES),$(SPEC2006_BUILD_DIR)/$(case)/elf/$(case).elf) -SPEC2006_DTS_SOURCES := $(shell find $(SPEC2006_DTS_DIR) -type f 2>/dev/null) +SPEC2006_DTS_SOURCES := $(SPEC2006_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2006_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2006_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ + $(wildcard $(SPEC2006_REPO_ROOT)/dts/$(SPEC2006_DEFAULT_DTB).dts.in) SPEC2006_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2006_CFG))" ]; then sha256sum "$(abspath $(SPEC2006_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) SPEC2006_DEFAULT_DTB_STAMP := $(SPEC2006_BUILD_DIR)/dtb.$(shell printf '%s\n' "$(SPEC2006_DEFAULT_DTB)" | sha256sum | cut -d ' ' -f 1) SPEC2006_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2006_INPUT)' '$(SPEC2006_TUNE)' '$(SPEC2006_JOBS)' '$(SPEC2006_CROSS_COMPILE)' 'multihart=$(SPEC2006_MULTIHART)' 'harts=$(SPEC2006_HARTS)' | sha256sum | cut -d ' ' -f 1) diff --git a/workloads/linux/spec2017/README.md b/workloads/linux/spec2017/README.md index 2e4066c..504a25e 100644 --- a/workloads/linux/spec2017/README.md +++ b/workloads/linux/spec2017/README.md @@ -213,13 +213,13 @@ The mode-specific minimum is 8 GiB for rate cases and 24 GiB for speed cases. Multi-hart builds additionally require at least 16 GiB, so both checks must pass. -The source templates live in: +The generated templates are written to: ```text -dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in -dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in -dts/xiangshan-qemu-nemu-mem8g.dts.in -dts/xiangshan-qemu-nemu-mem24g.dts.in +build/generated-dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in +build/generated-dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in +build/generated-dts/xiangshan-qemu-nemu-mem8g.dts.in +build/generated-dts/xiangshan-qemu-nemu-mem24g.dts.in ``` They are compiled into each case's `dt/` directory during firmware assembly. diff --git a/workloads/linux/spec2017/rules.mk b/workloads/linux/spec2017/rules.mk index 47979bc..518c758 100644 --- a/workloads/linux/spec2017/rules.mk +++ b/workloads/linux/spec2017/rules.mk @@ -4,7 +4,7 @@ SPEC2017_SELF_MAKEFILE := $(SPEC2017_WORKLOAD_DIR)/rules.mk SPEC2017_ROOT_MAKEFILE := $(SPEC2017_REPO_ROOT)/Makefile SPEC2017_RECURSE_MAKEFILE := $(if $(filter $(SPEC2017_ROOT_MAKEFILE),$(abspath $(firstword $(MAKEFILE_LIST)))),$(SPEC2017_ROOT_MAKEFILE),$(SPEC2017_SELF_MAKEFILE)) SPEC2017_SCRIPTS_DIR := $(SPEC2017_REPO_ROOT)/scripts -SPEC2017_DTS_DIR := $(SPEC2017_REPO_ROOT)/dts +SPEC2017_DTS_DIR := $(SPEC2017_REPO_ROOT)/build/generated-dts SPEC2017_BUILD_DIR ?= $(SPEC2017_REPO_ROOT)/build/linux-workloads/spec2017 SPEC2017_EXPLICIT_CFG := $(if $(filter undefined,$(origin SPEC2017_CFG)),,1) SPEC2017_RATE_CFG ?= $(SPEC2017_WORKLOAD_DIR)/configs/riscv-gcc16-rva23u64-novec.cfg @@ -80,7 +80,8 @@ SPEC2017_CASE := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --resolve-case -- SPEC2017_ALL_CASES := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set all --mode all 2>/dev/null) SPEC2017_SELECTED_CASES := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set $(SPEC2017_INPUT) --mode $(SPEC2017_MODE) 2>/dev/null) SPEC2017_IMAGE_CASES := $(if $(BENCH),$(SPEC2017_CASE),$(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set $(SPEC2017_IMAGE_INPUT) --mode $(SPEC2017_IMAGE_MODE) 2>/dev/null)) -SPEC2017_DTS_SOURCES := $(shell find $(SPEC2017_DTS_DIR) -type f 2>/dev/null) +SPEC2017_DTS_SOURCES := $(SPEC2017_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2017_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2017_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ + $(wildcard $(SPEC2017_REPO_ROOT)/dts/$(SPEC2017_DEFAULT_DTB).dts.in) WORKLOAD_DIRS += $(SPEC2017_BUILD_DIR) diff --git a/workloads/linux/spec2026/README.md b/workloads/linux/spec2026/README.md index 56c65a6..337fc77 100644 --- a/workloads/linux/spec2026/README.md +++ b/workloads/linux/spec2026/README.md @@ -132,11 +132,11 @@ make linux/spec2026 BENCH=800.pot3d_s MODE=speed \ The minimum checked size is 8 GiB for rate cases and 64 GiB for speed cases. -The source templates live in: +The generated templates are written to: ```text -dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in -dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in +build/generated-dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in +build/generated-dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in ``` Re-running `make spec2026-images` rebuilds the export tree so the directory diff --git a/workloads/linux/spec2026/rules.mk b/workloads/linux/spec2026/rules.mk index 9cf0e57..6846f18 100644 --- a/workloads/linux/spec2026/rules.mk +++ b/workloads/linux/spec2026/rules.mk @@ -4,7 +4,7 @@ SPEC2026_SELF_MAKEFILE := $(SPEC2026_WORKLOAD_DIR)/rules.mk SPEC2026_ROOT_MAKEFILE := $(SPEC2026_REPO_ROOT)/Makefile SPEC2026_RECURSE_MAKEFILE := $(if $(filter $(SPEC2026_ROOT_MAKEFILE),$(abspath $(firstword $(MAKEFILE_LIST)))),$(SPEC2026_ROOT_MAKEFILE),$(SPEC2026_SELF_MAKEFILE)) SPEC2026_SCRIPTS_DIR := $(SPEC2026_REPO_ROOT)/scripts -SPEC2026_DTS_DIR := $(SPEC2026_REPO_ROOT)/dts +SPEC2026_DTS_DIR := $(SPEC2026_REPO_ROOT)/build/generated-dts SPEC2026_BUILD_DIR ?= $(SPEC2026_REPO_ROOT)/build/linux-workloads/spec2026 SPEC2026_CFG ?= $(SPEC2026_WORKLOAD_DIR)/configs/riscv_gcc16_rva23u64_novec.cfg SPEC2026_HELPER := $(SPEC2026_WORKLOAD_DIR)/spec2026-package.py @@ -46,7 +46,8 @@ SPEC2026_SPEED_DTB_MIN_MEMORY_BYTES ?= 68719476736 SPEC2026_ALL_CASES := $(shell python3 $(SPEC2026_HELPER) --list-cases --mode all 2>/dev/null) SPEC2026_SELECTED_CASES := $(shell python3 $(SPEC2026_HELPER) --list-cases --input-set $(SPEC2026_INPUT) --mode $(SPEC2026_MODE) 2>/dev/null) SPEC2026_IMAGE_CASES := $(if $(BENCH),$(BENCH),$(shell python3 $(SPEC2026_HELPER) --list-cases --input-set $(SPEC2026_IMAGE_INPUT) --mode $(SPEC2026_IMAGE_MODE) 2>/dev/null)) -SPEC2026_DTS_SOURCES := $(shell find $(SPEC2026_DTS_DIR) -type f 2>/dev/null) +SPEC2026_DTS_SOURCES := $(SPEC2026_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2026_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2026_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ + $(wildcard $(SPEC2026_REPO_ROOT)/dts/$(SPEC2026_DEFAULT_DTB).dts.in) SPEC2026_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2026_CFG))" ]; then sha256sum "$(abspath $(SPEC2026_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) SPEC2026_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2026_INPUT)' '$(SPEC2026_TUNE)' '$(SPEC2026_JOBS)' '$(SPEC2026_CROSS_COMPILE)' '$(SPEC2026_COMPILER_ROOT)' 'jemalloc_root=$(SPEC2026_JEMALLOC_ROOT)' 'jemalloc_repo=$(SPEC2026_JEMALLOC_REPO)' 'jemalloc_commit=$(SPEC2026_JEMALLOC_COMMIT)' 'jemalloc_host=$(SPEC2026_JEMALLOC_CONFIGURE_HOST)' | sha256sum | cut -d ' ' -f 1) diff --git a/workloads/linux/specjbb2015/rules.mk b/workloads/linux/specjbb2015/rules.mk index 9ebd98a..65c0031 100644 --- a/workloads/linux/specjbb2015/rules.mk +++ b/workloads/linux/specjbb2015/rules.mk @@ -34,11 +34,11 @@ $(SPECJBB2015_BUILD_DIR)/rootfs.cpio: $(shell find $(SPECJBB2015_DIR)) $(TOOLCHA HARTS="$(SPECJBB2015_HARTS)" MULTIHART=0 \ bash scripts/build-workload-linux.sh workloads/linux/specjbb2015 $(SPECJBB2015_BUILD_DIR) -$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: $(shell find $(abspath dts)) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) +$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) @CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" DEFAULT_DTB="$(SPECJBB2015_DEFAULT_DTB)" \ MULTIHART="$(SPECJBB2015_MULTIHART)" HARTS="$(SPECJBB2015_HARTS)" \ - bash scripts/build-firmware-linux.sh $(GCPT_BIN) $(SBI_BUILD_DIR) dts $(LINUX_IMAGE) $(SPECJBB2015_BUILD_DIR) + bash scripts/build-firmware-linux.sh $(GCPT_BIN) $(SBI_BUILD_DIR) build/generated-dts $(LINUX_IMAGE) $(SPECJBB2015_BUILD_DIR) linux/specjbb2015: $(SPECJBB2015_BUILD_DIR)/fw_payload.bin WORKLOAD_PHONY_TARGETS += linux/specjbb2015 From f0b4ca43f782ba4a96b477edbee54cecac105b31 Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Thu, 10 Sep 2026 17:28:09 +0800 Subject: [PATCH 02/13] fix(linux): place single-hart DTB at 2 MiB and kernel at 4 MiB Single-hart images kept the device tree at 1.75 MiB while multi-hart images placed it at 2 MiB, so the two layouts had to be described separately and OpenSBI's FDT address differed per image type. Move the single-hart device tree to 2 MiB so both layouts agree, and move the single-hart kernel to the next 2 MiB-aligned address at 4 MiB so the two cannot overlap. The OpenSBI jump and FDT addresses, the packer offsets and the exported manifest follow the same addresses. --- README.md | 18 ++++++++---------- dts/README.md | 8 ++++---- scripts/build-firmware-linux.sh | 7 ++----- scripts/build-sbi.sh | 4 ++-- scripts/export-linux-debug-artifacts.sh | 5 ++--- 5 files changed, 18 insertions(+), 24 deletions(-) diff --git a/README.md b/README.md index e484484..090c729 100644 --- a/README.md +++ b/README.md @@ -144,15 +144,14 @@ A single-core image contains: |---------|-------------------------------| | 0.0 MiB | LibCheckpointAlpha | | 1.0 MiB | OpenSBI | -| 1.75 MiB | device tree | -| 2.0 MiB | Linux kernel | +| 2.0 MiB | device tree | +| 4.0 MiB | Linux kernel | | -- | initramfs containing workload | -Single-core images place the DTB at 1.75 MiB (`0x801c0000`), providing 768 KiB -for OpenSBI while leaving 256 KiB for the DTB before Linux at 2 MiB. This is an -image-packing choice, not a fixed machine address. The assembler checks both -component sizes. Multi-hart images keep their separate DTB address at -`0x80200000`. +Single-core and multi-hart images place the DTB at 2 MiB (`0x80200000`). The +single-core kernel starts at 4 MiB (`0x80400000`) to keep it separate from the +DTB. This is an image-packing choice, not a fixed machine address. The +assembler checks both component sizes. A multi-hart image uses the fixed QEMU checkpoint layout: @@ -178,13 +177,12 @@ the workload's `dt` directory and the DTB is embedded in the firmware image. For DTS files used with gcpt, the beginning of RAM must be reserved with a `reserved-memory` node so Linux does not allocate or map the gcpt checkpoint buffer. The XiangShan FPGA DTS templates reserve the first 1 MiB of their declared DRAM for this purpose. ```shell -dd conv=notrunc bs=1024 seek=1792 if=dt/some_device.dtb of=fw_payload.bin +dd conv=notrunc bs=1024 seek=2048 if=dt/some_device.dtb of=fw_payload.bin ``` Use `fw_payload.qemu.bin` as the output file for a QEMU image. The supported QEMU `nemu` machine exposes a no-IRQ 16550A UART at `0x310b0000`. Multi-hart -images use their separate fixed DTB offset of 2048 KiB and must retain a -matching multi-hart device tree. +images must retain a matching multi-hart device tree. OpenSBI is patched (see `bootloader/opensbi.patch`) to load the device tree from a fixed offset relative to the DRAM base. The initramfs is placed after the Linux kernel and aligned to 1 MiB. diff --git a/dts/README.md b/dts/README.md index 1da5aaf..6ed2c7b 100644 --- a/dts/README.md +++ b/dts/README.md @@ -47,11 +47,11 @@ and the `0x88600000` kernel address do not apply. This table shows the default |-------------------------|----------------|------------| | `0x80000000–0x800fffff` | 1 MiB | LibCheckpointAlpha checkpoint-recovery program; reserved as `no-map` in the DTS | | `0x80100000` | +1 MiB | OpenSBI firmware starts here | -| `0x801c0000` | +1.75 MiB | Device tree placed here by firmware assembly | -| `0x80200000` and above | +2 MiB | Linux kernel image, then the MiB-aligned initramfs | +| `0x80200000` | +2 MiB | Device tree placed here by firmware assembly | +| `0x80400000` and above | +4 MiB | Linux kernel image, then the MiB-aligned initramfs | -The single-core firmware packer uses `DTB_OFFSET_KB=1792`, -`SBI_OFFSET_KB=1024`, and `KERNEL_OFFSET_MB=2`. The initramfs address is +The single-core firmware packer uses `DTB_OFFSET_KB=2048`, +`SBI_OFFSET_KB=1024`, and `KERNEL_OFFSET_MB=4`. The initramfs address is computed from the actual kernel size and starts at the next MiB boundary. The selected single-core DTS supplies the DRAM base and capacity; no fixed 8 GiB or 64 GiB profile is imposed by this layout. diff --git a/scripts/build-firmware-linux.sh b/scripts/build-firmware-linux.sh index 1f3ad30..0e66150 100644 --- a/scripts/build-firmware-linux.sh +++ b/scripts/build-firmware-linux.sh @@ -16,13 +16,11 @@ DTB_REQUIRED_MIN_MEMORY_BYTES="${DTB_REQUIRED_MIN_MEMORY_BYTES:-}" HARTS="${HARTS:-2}" readonly MULTIHART_MAX_HARTS=128 readonly MULTIHART_KERNEL_OFFSET_MB=134 -readonly SINGLEHART_DTB_OFFSET_KB=1792 -readonly MULTIHART_DTB_OFFSET_KB=2048 -DTB_OFFSET_KB="$SINGLEHART_DTB_OFFSET_KB" +DTB_OFFSET_KB=2048 DTB_MAX_SIZE_KB=256 SBI_OFFSET_KB=1024 -KERNEL_MIN_OFFSET_MB=2 +KERNEL_MIN_OFFSET_MB=4 if [ "${MULTIHART:-0}" = 1 ]; then if [ -z "$DEFAULT_DTB" ]; then @@ -36,7 +34,6 @@ if [ "${MULTIHART:-0}" = 1 ]; then echo "HARTS must be an integer in the range 2..$MULTIHART_MAX_HARTS" >&2 exit 1 fi - DTB_OFFSET_KB="$MULTIHART_DTB_OFFSET_KB" DTB_MAX_SIZE_KB=1024 KERNEL_MIN_OFFSET_MB="$MULTIHART_KERNEL_OFFSET_MB" elif [ -z "$DEFAULT_DTB" ]; then diff --git a/scripts/build-sbi.sh b/scripts/build-sbi.sh index 96dbe3f..a31b218 100644 --- a/scripts/build-sbi.sh +++ b/scripts/build-sbi.sh @@ -20,8 +20,8 @@ else DTS_CONFIG="$(dts_extract_config "$DTS_TEMPLATE")" read -r MEM_BEGIN MEM_SIZE CLINT_MMIO <<< "$DTS_CONFIG" FW_TEXT_START=$((MEM_BEGIN + MEGABYTE)) - FW_JUMP_ADDR="$(dts_linux_kernel_address "$MEM_BEGIN" "$((2 * MEGABYTE))")" - FW_JUMP_FDT_ADDR=$((MEM_BEGIN + 1792 * 1024)) + FW_JUMP_ADDR="$(dts_linux_kernel_address "$MEM_BEGIN" "$((4 * MEGABYTE))")" + FW_JUMP_FDT_ADDR=$((MEM_BEGIN + 2 * MEGABYTE)) fi # prepare OpenSBI source diff --git a/scripts/export-linux-debug-artifacts.sh b/scripts/export-linux-debug-artifacts.sh index efd94d3..ba6bd20 100755 --- a/scripts/export-linux-debug-artifacts.sh +++ b/scripts/export-linux-debug-artifacts.sh @@ -74,12 +74,11 @@ cp "$DTS_FILE" "$DT_DIR/$ARTIFACT_NAME.dts" cp "$SBI_ELF" "$SBI_DIR/fw_jump.elf" cp "$SBI_CONFIG" "$SBI_DIR/defconfig" -kernel_min_offset_mb=2 -dtb_offset=$((1792 * 1024)) +kernel_min_offset_mb=4 +dtb_offset=$((2 * 1024 * 1024)) multihart=false if [ "${MULTIHART:-0}" = 1 ]; then kernel_min_offset_mb=134 - dtb_offset=$((2 * 1024 * 1024)) multihart=true fi From f34745b8934c29e5b51a799306d4655ac5c917da Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Thu, 10 Sep 2026 17:28:10 +0800 Subject: [PATCH 03/13] feat(dts): select Kunminghu V2 with DTS_ISA_CONFIG The generated xiangshan-fpga-noAIA profiles can describe either Kunminghu V2 or V3 hardware, but the build had no way to choose between them. Add DTS_ISA_CONFIG, accepting kunminghu-v2 and kunminghu-v3 with kunminghu-v3 as the default, and pass it to the generator. Only the FPGA noAIA profiles consume it; QEMU/NEMU profiles and supplied custom templates are unchanged, and a non-default value for a profile that does not support it is rejected. Include the selector in every firmware and DTS configuration stamp so switching versions cannot silently reuse the previous firmware. The superseded scripts/generate-xiangshan-multihart-dts.py and its documentation section are removed here, since that section is replaced by the DTS_ISA_CONFIG notes. --- Makefile | 8 +- README.md | 4 + dts/README.md | 21 +- scripts/dts-config.sh | 2 + scripts/generate-xiangshan-multihart-dts.py | 248 -------------------- workloads/linux/gapbs/rules.mk | 9 +- workloads/linux/geekbench-common.mk | 8 +- workloads/linux/rocksdb/rules.mk | 2 +- workloads/linux/spec2006/rules.mk | 2 +- workloads/linux/spec2017/rules.mk | 3 +- workloads/linux/spec2026/rules.mk | 1 + workloads/linux/specjbb2015/rules.mk | 9 +- 12 files changed, 50 insertions(+), 267 deletions(-) delete mode 100755 scripts/generate-xiangshan-multihart-dts.py diff --git a/Makefile b/Makefile index c857846..3cc01fb 100644 --- a/Makefile +++ b/Makefile @@ -4,11 +4,16 @@ MULTIHART ?= 0 PLATFORM ?= $(if $(filter 1,$(MULTIHART)),qemu,nemu) HARTS ?= 2 QEMU_DEFAULT_DTB ?= xiangshan-qemu-nemu-mem2g +DTS_ISA_CONFIG ?= kunminghu-v3 DTS_DIR := build/generated-dts +export DTS_ISA_CONFIG ifeq ($(filter $(PLATFORM),nemu qemu),) $(error PLATFORM must be either nemu or qemu) endif +ifeq ($(filter $(DTS_ISA_CONFIG),kunminghu-v2 kunminghu-v3),) +$(error DTS_ISA_CONFIG must be either kunminghu-v2 or kunminghu-v3) +endif ifeq ($(filter 1,$(MULTIHART)),1) ifneq ($(PLATFORM),qemu) $(error MULTIHART=1 requires PLATFORM=qemu) @@ -23,7 +28,8 @@ LINUX_ROOTFS_BUILD_VARS_HASH := $(shell printf '%s\n' \ LINUX_FIRMWARE_BUILD_VARS_HASH := $(shell printf '%s\n' \ 'multihart=$(if $(filter 1,$(MULTIHART)),1,0)' \ 'harts=$(if $(filter 1,$(MULTIHART)),$(HARTS),1)' \ - 'default_dtb=$(if $(LINUX_DEFAULT_DTB),$(LINUX_DEFAULT_DTB),xiangshan)' | sha256sum | cut -d ' ' -f 1) + 'default_dtb=$(if $(LINUX_DEFAULT_DTB),$(LINUX_DEFAULT_DTB),xiangshan)' \ + 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) MULTIHART_SUPPORTED_HARTS = $(shell seq 2 128) ifeq ($(filter 1,$(MULTIHART)),1) diff --git a/README.md b/README.md index 090c729..231e47c 100644 --- a/README.md +++ b/README.md @@ -291,6 +291,10 @@ Device-tree templates are generated at build time through Recognized basenames always use the generated template; the checked-in `dts/*.dts.in` files are no longer read for them and remain as references. +For generated `xiangshan-fpga-noAIA*` templates, the default ISA declaration is +Kunminghu V3. Select V2 with `DTS_ISA_CONFIG=kunminghu-v2`; the DTB basename +continues to select hart count, memory size, and vector mode. + For an unsupported custom basename, place the complete template at `dts/.dts.in` and select it with `DEFAULT_DTB=`. It is copied into `build/generated-dts` on each build, so it survives cleaning the build tree; a diff --git a/dts/README.md b/dts/README.md index 6ed2c7b..581a1df 100644 --- a/dts/README.md +++ b/dts/README.md @@ -107,21 +107,18 @@ make linux/coremark MULTIHART=1 HARTS=2 \ DEFAULT_DTB=xiangshan-fpga-noAIA-2hart-mem8g-novec ``` -## Generate Multi-Hart XiangShan DTS +Generated `xiangshan-fpga-noAIA*` templates use the Kunminghu V3 ISA +declaration by default. Select V2 independently of the DTB basename: -Run the generator from the repository root to create a template for a new -hart count. For example, generate the two-hart template from the 8 GiB -XiangShan FPGA baseline with: - -```shell -python3 scripts/generate-xiangshan-multihart-dts.py \ - --base dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in \ - --harts 2 \ - --output dts/xiangshan-fpga-noAIA-2hart-mem8g-novec.dts.in +```sh +make linux/coremark \ + DEFAULT_DTB=xiangshan-fpga-noAIA-mem16g-novec \ + DTS_ISA_CONFIG=kunminghu-v2 ``` -Use `--memory-gib` to override the copied DRAM capacity. The checked-in 16 GiB -two-hart profile can be regenerated with: +`DTS_ISA_CONFIG` accepts `kunminghu-v2` and `kunminghu-v3`. The `-novec` +suffix still controls vector advertisement for either version. This selector +does not apply to QEMU/NEMU profiles or supplied custom templates. ## Build-Time Multi-Hart DTS Generation diff --git a/scripts/dts-config.sh b/scripts/dts-config.sh index bd2d91b..b286962 100755 --- a/scripts/dts-config.sh +++ b/scripts/dts-config.sh @@ -7,8 +7,10 @@ dts_generate_template() { local generator="$(dirname "${BASH_SOURCE[0]}")/generate-nemu-board-dts.py" local custom_dir="$(dirname "${BASH_SOURCE[0]}")/../dts" local output="$dts_dir/$default_dtb.dts.in" + local isa_config="${DTS_ISA_CONFIG:-kunminghu-v3}" python3 "$generator" --name "$default_dtb" --output "$output" \ + --isa-config "$isa_config" \ --preserve-existing-unsupported \ --custom-template-dir "$custom_dir" } diff --git a/scripts/generate-xiangshan-multihart-dts.py b/scripts/generate-xiangshan-multihart-dts.py deleted file mode 100755 index 4ecc171..0000000 --- a/scripts/generate-xiangshan-multihart-dts.py +++ /dev/null @@ -1,248 +0,0 @@ -#!/usr/bin/env python3 -import argparse -import re -from pathlib import Path - - -MAX_HARTS = 128 -CHECKPOINT_RESERVED_NODE = """ - - /* Keep the 131 MiB QEMU checkpoint window out of Linux memory. */ - checkpoint: checkpoint@80300000 { - no-map; - reg = <0x0 0x80300000 0x0 0x08300000>; - };""" -CPU_ISA_PROPERTIES = re.compile( - r'\t\t\triscv,isa = "[^"]+";\n' - r'\t\t\triscv,isa-base = "[^"]+";\n' - r"\t\t\triscv,isa-extensions =\n" - r"(?:\t\t\t\t[^\n]*\n)*?" - r"\t\t\t\t[^\n]*;\n" -) - - -def positive_harts(value): - try: - harts = int(value, 0) - except ValueError as exc: - raise argparse.ArgumentTypeError("harts must be an integer") from exc - if not 2 <= harts <= MAX_HARTS: - raise argparse.ArgumentTypeError(f"harts must be in the range 2..{MAX_HARTS}") - return harts - - -def positive_memory_gib(value): - try: - memory_gib = int(value, 0) - except ValueError as exc: - raise argparse.ArgumentTypeError("memory-gib must be an integer") from exc - if memory_gib <= 0: - raise argparse.ArgumentTypeError("memory-gib must be greater than zero") - return memory_gib - - -def extract_node(text, node_header): - start = text.index(node_header) - level = 0 - for idx in range(start, len(text)): - char = text[idx] - if char == "{": - level += 1 - elif char == "}": - level -= 1 - if level == 0: - semi = text.index(";", idx) - return start, semi + 1 - raise RuntimeError(f"node not found: {node_header}") - - -def cpu_node(cpu0_node, hart): - node = cpu0_node - node = node.replace("cpu0: cpu@0", f"cpu{hart}: cpu@{hart}") - node = node.replace("reg = <0x0>;", f"reg = <0x{hart:x}>;") - node = node.replace("intc_cpu0", f"intc_cpu{hart}") - return node - - -def prepare_multihart_cpu_isa(cpu_node_text): - match = CPU_ISA_PROPERTIES.search(cpu_node_text) - if not match: - raise RuntimeError("CPU node does not contain the expected ISA properties") - - isa_properties = match.group(0) - isa_properties = isa_properties.replace("_sstc", "") - isa_properties = isa_properties.replace(', "sstc"', "") - return cpu_node_text[: match.start()] + isa_properties + cpu_node_text[match.end() :] - - -def interrupt_list(harts, machine_irq, supervisor_irq): - return " ".join( - f"&intc_cpu{hart} {machine_irq} &intc_cpu{hart} {supervisor_irq}" - for hart in range(harts) - ) - - -def debug_interrupt_list(harts): - return " ".join(f"&intc_cpu{hart} 65535" for hart in range(harts)) - - -def align_qemu_plic(text): - return re.sub(r"riscv,ndev = <(?:0x42|64|66)>;", "riscv,ndev = <66>;", text) - - -def replace_uart_with_qemu_16550(text): - match = re.search(r"^\t\tuart0: serial@[0-9a-fA-F]+ \{", text, re.MULTILINE) - if match is None: - raise RuntimeError("DTS does not contain the expected uart0 node") - - start, end = extract_node(text, match.group(0)) - prefix = text[:start] - comment_match = re.search( - r"(?P\r?\n[ \t]*/\*(?:[^*]|\*(?!/))*\*/)[ \t]*\r?\n[ \t]*$", - prefix, - ) - if comment_match and re.search( - r"(?i)(?:\bUART(?:LITE|16550)?\b|0x40600000|serial@[0-9a-fA-F]+)", - comment_match.group("comment"), - ): - start = comment_match.start("comment") + 1 - uart = "\n".join( - [ - "\t\t/*", - "\t\t * QEMU's nemu machine exposes the XiangShan 16550A UART at 0x310b0000.", - "\t\t * It is not connected to the PLIC.", - "\t\t */", - "\t\tuart0: serial@310b0000 {", - '\t\t\tcompatible = "ns16550a";', - "\t\t\tcurrent-speed = <115200>;", - "\t\t\treg = <0x0 0x310b0000 0x0 0x10000>;", - "\t\t\treg-shift = <0x2>;", - "\t\t\treg-io-width = <0x4>;", - "\t\t\tclock-frequency = <50000000>;", - '\t\t\tstatus = "okay";', - "\t\t};", - ] - ) - return text[:start] + uart + text[end:] - - -def sanitize_qemu_comments(text): - text = text.replace( - " * XiangShan FPGA DTS used by the fpga board flow.", - " * XiangShan multi-hart DTS used by QEMU's nemu machine.", - ) - text = text.replace( - " * 2. UART16550 is exposed as the serial console.", - " * 2. QEMU's nemu machine exposes a 16550A serial console.", - ) - text = text.replace( - " * 2. QEMU/NEMU UARTLITE is exposed as the serial console.", - " * 2. QEMU's nemu machine exposes a 16550A serial console.", - ) - text = text.replace( - "This FPGA image boots without AIA.", - "This QEMU configuration boots without AIA.", - ) - chosen_comment = re.compile( - r"\n\t\t/\*\n" - r"\t\t \* On this FPGA DTS the UART16550 interrupt is not wired into Linux\n" - r"(?:.*?\n)*?" - r"\t\t \*/\n" - r"\t\tbootargs = ", - re.MULTILINE, - ) - return chosen_comment.sub( - "\n\t\t/*\n" - "\t\t * Keep the SBI console as the primary console under QEMU/NEMU.\n" - "\t\t */\n" - "\t\tbootargs = ", - text, - ) - - -def add_checkpoint_reserved_memory(text): - start, end = extract_node(text, "\treserved-memory {") - if re.search(r"@80300000\s*\{", text[start:end]): - return text - - close = text.rfind("\n\t};", start, end) - if close == -1: - raise RuntimeError("reserved-memory node does not have the expected closing brace") - return text[:close] + CHECKPOINT_RESERVED_NODE + text[close:] - - -def override_memory_profile(text, memory_gib): - start, end = extract_node(text, "\tmemory: memory@80000000 {") - memory_node = text[start:end] - memory_bytes = memory_gib << 30 - size_high = memory_bytes >> 32 - size_low = memory_bytes & 0xFFFFFFFF - if size_high > 0xFFFFFFFF: - raise RuntimeError("memory-gib does not fit in a 64-bit DTS size") - - memory_node, comment_replacements = re.subn( - r"\t\t/\*\n(?:\t\t \*.*\n)+\t\t \*/(?=\n\t\treg)", - "\t\t/*\n" - f"\t\t * Static {memory_gib} GiB memory profile for multi-hart workloads.\n" - "\t\t */", - memory_node, - count=1, - ) - memory_node, reg_replacements = re.subn( - r"reg = <0x0 0x80000000 0x[0-9a-fA-F]+ 0x[0-9a-fA-F]+>;", - f"reg = <0x0 0x80000000 0x{size_high:x} 0x{size_low:08x}>;", - memory_node, - count=1, - ) - if comment_replacements != 1 or reg_replacements != 1: - raise RuntimeError("memory node does not contain the expected static profile") - return text[:start] + memory_node + text[end:] - - -def render(base_text, harts, memory_gib=None): - start, end = extract_node(base_text, "\t\tcpu0: cpu@0 {") - cpu0_node = prepare_multihart_cpu_isa(base_text[start:end]) - extra_cpus = "".join("\n\n" + cpu_node(cpu0_node, hart) for hart in range(1, harts)) - text = base_text[:start] + cpu0_node + extra_cpus + base_text[end:] - - text = text.replace( - "interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>;", - f"interrupts-extended = <{interrupt_list(harts, 3, 7)}>;", - ) - text = text.replace( - "interrupts-extended = <&intc_cpu0 65535>;", - f"interrupts-extended = <{debug_interrupt_list(harts)}>;", - ) - text = text.replace( - "interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>;", - f"interrupts-extended = <{interrupt_list(harts, 11, 9)}>;", - ) - text = align_qemu_plic(text) - text = replace_uart_with_qemu_16550(text) - text = sanitize_qemu_comments(text) - text = add_checkpoint_reserved_memory(text) - if memory_gib is not None: - text = override_memory_profile(text, memory_gib) - return text - - -def main(): - parser = argparse.ArgumentParser() - parser.add_argument("--base", required=True, type=Path) - parser.add_argument("--harts", required=True, type=positive_harts) - parser.add_argument("--memory-gib", type=positive_memory_gib) - parser.add_argument("--output", required=True, type=Path) - args = parser.parse_args() - - base_text = args.base.read_text(encoding="utf-8") - args.output.parent.mkdir(parents=True, exist_ok=True) - args.output.write_text( - render(base_text, args.harts, memory_gib=args.memory_gib), encoding="utf-8" - ) - - -if __name__ == "__main__": - try: - main() - except Exception as exc: - raise SystemExit(str(exc)) diff --git a/workloads/linux/gapbs/rules.mk b/workloads/linux/gapbs/rules.mk index db61d72..d4714c9 100644 --- a/workloads/linux/gapbs/rules.mk +++ b/workloads/linux/gapbs/rules.mk @@ -21,10 +21,17 @@ GAPBS_BUILDROOT_CROSS_COMPILE ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/riscv64- GAPBS_DTC ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/dtc GAPBS_DTS_SOURCES := $(GAPBS_SCRIPTS_DIR)/generate-nemu-board-dts.py $(GAPBS_REPO_ROOT)/nemu_board/dts/DTSGen.py $(GAPBS_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ $(wildcard $(GAPBS_REPO_ROOT)/dts/$(GAPBS_DEFAULT_DTB).dts.in) +GAPBS_FIRMWARE_VARS_HASH := $(shell printf '%s\n' 'default_dtb=$(GAPBS_DEFAULT_DTB)' 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) +GAPBS_FIRMWARE_VARS_STAMP := $(GAPBS_BUILD_DIR)/firmware-vars.$(GAPBS_FIRMWARE_VARS_HASH).stamp GAPBS_ALL_CASES := $(shell python3 $(GAPBS_HELPER) --list-cases) WORKLOAD_DIRS += $(GAPBS_BUILD_DIR) +$(GAPBS_FIRMWARE_VARS_STAMP): + @mkdir -p "$(@D)" + @rm -f "$(@D)"/firmware-vars.*.stamp + @touch "$@" + define add_gapbs_case $(GAPBS_BUILD_DIR)/$(1)/download/sentinel: @mkdir -p "$$(@D)" @@ -36,7 +43,7 @@ $(GAPBS_BUILD_DIR)/$(1)/rootfs.cpio: $$(GAPBS_HELPER) $$(GAPBS_WORKLOAD_DIR)/bui GAPBS_GRAPH_DIR="$$(GAPBS_GRAPH_DIR)" \ bash "$$(GAPBS_SCRIPTS_DIR)/build-workload-linux.sh" "$$(GAPBS_WORKLOAD_DIR)" "$(GAPBS_BUILD_DIR)/$(1)" -$(GAPBS_BUILD_DIR)/$(1)/fw_payload.bin: $$(GAPBS_DTS_SOURCES) $$(GAPBS_GCPT_BIN) $$(GAPBS_SCRIPTS_DIR)/build-firmware-linux.sh $$(GAPBS_SCRIPTS_DIR)/dts-config.sh $(GAPBS_BUILD_DIR)/$(1)/rootfs.cpio $$(GAPBS_LINUX_IMAGE) $$(GAPBS_SBI_BIN) +$(GAPBS_BUILD_DIR)/$(1)/fw_payload.bin: $$(GAPBS_DTS_SOURCES) $$(GAPBS_FIRMWARE_VARS_STAMP) $$(GAPBS_GCPT_BIN) $$(GAPBS_SCRIPTS_DIR)/build-firmware-linux.sh $$(GAPBS_SCRIPTS_DIR)/dts-config.sh $(GAPBS_BUILD_DIR)/$(1)/rootfs.cpio $$(GAPBS_LINUX_IMAGE) $$(GAPBS_SBI_BIN) @printf '[gapbs] Assembling firmware for $(1)\n' @CROSS_COMPILE="$$(GAPBS_BUILDROOT_CROSS_COMPILE)" \ DTC="$$(GAPBS_DTC)" \ diff --git a/workloads/linux/geekbench-common.mk b/workloads/linux/geekbench-common.mk index 1b6ab92..84eb9ed 100644 --- a/workloads/linux/geekbench-common.mk +++ b/workloads/linux/geekbench-common.mk @@ -1,4 +1,5 @@ GEEKBENCH_DEFAULT_DTB = $(if $(DEFAULT_DTB),$(DEFAULT_DTB),xiangshan-fpga-noAIA) +GEEKBENCH_FIRMWARE_VARS_HASH := $(shell printf '%s\n' 'default_dtb=$(GEEKBENCH_DEFAULT_DTB)' 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) define add_workload_linux_geekbench # Download files @@ -23,7 +24,12 @@ build/linux-workloads/$(1)/rootfs.cpio: $$(shell find $$(abspath workloads/linux bash scripts/build-workload-linux.sh workloads/linux/$(1) build/linux-workloads/$(1) # Build all-in-one firmware -build/linux-workloads/$(1)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(GEEKBENCH_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin +build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp: + mkdir -p "$$(@D)" + rm -f "$$(@D)"/firmware-vars.*.stamp + touch "$$@" + +build/linux-workloads/$(1)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(GEEKBENCH_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp CROSS_COMPILE="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" \ DEFAULT_DTB="$(GEEKBENCH_DEFAULT_DTB)" \ diff --git a/workloads/linux/rocksdb/rules.mk b/workloads/linux/rocksdb/rules.mk index 08077e6..9207025 100644 --- a/workloads/linux/rocksdb/rules.mk +++ b/workloads/linux/rocksdb/rules.mk @@ -41,7 +41,7 @@ ROCKSDB_CASE_FIRMWARE := $(foreach case,$(ROCKSDB_CASES),$(ROCKSDB_BUILD_DIR)/$( ROCKSDB_COMPILER_ID := $(shell "$(ROCKSDB_CROSS_COMPILE)g++" --version 2>/dev/null | head -n 1) ROCKSDB_BUILD_VARS_HASH := $(shell printf '%s\n' 'cross_compile=$(ROCKSDB_CROSS_COMPILE)' 'compiler=$(ROCKSDB_COMPILER_ID)' 'sysroot=$(ROCKSDB_SYSROOT_DIR)' 'march=$(ROCKSDB_MARCH)' 'mabi=$(ROCKSDB_MABI)' 'opt_flags=$(ROCKSDB_OPT_FLAGS)' | sha256sum | cut -d ' ' -f 1) ROCKSDB_BUILD_VARS_STAMP := $(ROCKSDB_BUILD_DIR)/rocksdb-build-vars.$(ROCKSDB_BUILD_VARS_HASH).stamp -ROCKSDB_FIRMWARE_VARS_HASH := $(shell printf '%s\n' 'default_dtb=$(ROCKSDB_DEFAULT_DTB)' | sha256sum | cut -d ' ' -f 1) +ROCKSDB_FIRMWARE_VARS_HASH := $(shell printf '%s\n' 'default_dtb=$(ROCKSDB_DEFAULT_DTB)' 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) ROCKSDB_FIRMWARE_VARS_STAMP := $(ROCKSDB_BUILD_DIR)/rocksdb-firmware-vars.$(ROCKSDB_FIRMWARE_VARS_HASH).stamp rocksdb_case_ops = $(if $(strip $(ROCKSDB_OPS)),$(ROCKSDB_OPS),$(ROCKSDB_DEFAULT_OPS_$(1))) rocksdb_case_threads = $(if $(filter timeseries,$(1)),2,$(ROCKSDB_THREADS)) diff --git a/workloads/linux/spec2006/rules.mk b/workloads/linux/spec2006/rules.mk index 1ac176b..b84a1ba 100644 --- a/workloads/linux/spec2006/rules.mk +++ b/workloads/linux/spec2006/rules.mk @@ -60,7 +60,7 @@ SPEC2006_ELF_TARGETS := $(foreach case,$(SPEC2006_SELECTED_CASES),$(SPEC2006_BUI SPEC2006_DTS_SOURCES := $(SPEC2006_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2006_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2006_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ $(wildcard $(SPEC2006_REPO_ROOT)/dts/$(SPEC2006_DEFAULT_DTB).dts.in) SPEC2006_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2006_CFG))" ]; then sha256sum "$(abspath $(SPEC2006_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) -SPEC2006_DEFAULT_DTB_STAMP := $(SPEC2006_BUILD_DIR)/dtb.$(shell printf '%s\n' "$(SPEC2006_DEFAULT_DTB)" | sha256sum | cut -d ' ' -f 1) +SPEC2006_DEFAULT_DTB_STAMP := $(SPEC2006_BUILD_DIR)/dtb.$(shell printf '%s\n' "$(SPEC2006_DEFAULT_DTB)" "$(DTS_ISA_CONFIG)" | sha256sum | cut -d ' ' -f 1) SPEC2006_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2006_INPUT)' '$(SPEC2006_TUNE)' '$(SPEC2006_JOBS)' '$(SPEC2006_CROSS_COMPILE)' 'multihart=$(SPEC2006_MULTIHART)' 'harts=$(SPEC2006_HARTS)' | sha256sum | cut -d ' ' -f 1) spec2006_case_image_stamp = $(SPEC2006_IMAGE_DIR)/stamps/$(1).images.stamp diff --git a/workloads/linux/spec2017/rules.mk b/workloads/linux/spec2017/rules.mk index 518c758..306a927 100644 --- a/workloads/linux/spec2017/rules.mk +++ b/workloads/linux/spec2017/rules.mk @@ -196,6 +196,7 @@ $(SPEC2017_BUILD_DIR)/$(1)/firmware/dtb-$(call spec2017_case_dtb_tag,$(1)).stamp @printf '%s\n' \ "case=$(1)" \ "default_dtb=$$(SPEC2017_DEFAULT_DTB)" \ + "dts_isa_config=$$(DTS_ISA_CONFIG)" \ "profile=$(call spec2017_case_dtb_profile,$(1))" \ "min_memory_bytes=$(call spec2017_case_dtb_min_memory_bytes,$(1))" \ "required_min_memory_bytes=$(call spec2017_case_dtb_required_min_memory_bytes,$(1))" > "$$@.tmp" @@ -220,7 +221,7 @@ linux/$(1): $(SPEC2017_BUILD_DIR)/$(1)/$(SPEC2017_FIRMWARE_FILENAME) WORKLOAD_PHONY_TARGETS += linux/$(1) -$(SPEC2017_IMAGE_DIR)/stamps/$(1).images.stamp: $(SPEC2017_PREPARE_STAMP) $(SPEC2017_BUILD_DIR)/$(1)/cfg.$(call spec2017_case_cfg_hash,$(1)).stamp $$(SPEC2017_HELPER) $$(SPEC2017_WORKLOAD_DIR)/build.sh $(SPEC2017_BUILD_DIR)/$(1)/download/sentinel $(SPEC2017_BUILD_DIR)/$(1)/build-vars.$(SPEC2017_BUILD_VARS_HASH).stamp $$(SPEC2017_DTS_SOURCES) $$(SPEC2017_GCPT_BIN) $$(SPEC2017_GCPT_ELF) $$(SPEC2017_SCRIPTS_DIR)/build-firmware-linux.sh $$(SPEC2017_SCRIPTS_DIR)/export-linux-debug-artifacts.sh $$(SPEC2017_SCRIPTS_DIR)/dts-config.sh $$(SPEC2017_SCRIPTS_DIR)/package-multihart-rootfs.py $$(SPEC2017_LINUX_IMAGE) $$(SPEC2017_SBI_BIN) | spec2017-check-spec-config +$(SPEC2017_IMAGE_DIR)/stamps/$(1).images.stamp: $(SPEC2017_PREPARE_STAMP) $(SPEC2017_BUILD_DIR)/$(1)/cfg.$(call spec2017_case_cfg_hash,$(1)).stamp $$(SPEC2017_HELPER) $$(SPEC2017_WORKLOAD_DIR)/build.sh $(SPEC2017_BUILD_DIR)/$(1)/download/sentinel $(SPEC2017_BUILD_DIR)/$(1)/build-vars.$(SPEC2017_BUILD_VARS_HASH).stamp $$(SPEC2017_DTS_SOURCES) $$(SPEC2017_GCPT_BIN) $$(SPEC2017_GCPT_ELF) $$(SPEC2017_SCRIPTS_DIR)/build-firmware-linux.sh $$(SPEC2017_SCRIPTS_DIR)/export-linux-debug-artifacts.sh $$(SPEC2017_SCRIPTS_DIR)/dts-config.sh $$(SPEC2017_SCRIPTS_DIR)/package-multihart-rootfs.py $$(SPEC2017_LINUX_IMAGE) $$(SPEC2017_SBI_BIN) $(SPEC2017_BUILD_DIR)/$(1)/firmware/dtb-$(call spec2017_case_dtb_tag,$(1)).stamp | spec2017-check-spec-config @printf '$(SPEC2017_PROGRESS_PREFIX) Packaging split run images for $(1)\n' @WORKLOAD_DIR="$$(abspath $$(SPEC2017_WORKLOAD_DIR))" \ WORKLOAD_BUILD_DIR="$$(abspath $(SPEC2017_BUILD_DIR)/$(1))" \ diff --git a/workloads/linux/spec2026/rules.mk b/workloads/linux/spec2026/rules.mk index 6846f18..8f9540c 100644 --- a/workloads/linux/spec2026/rules.mk +++ b/workloads/linux/spec2026/rules.mk @@ -119,6 +119,7 @@ $(SPEC2026_BUILD_DIR)/$(1)/firmware/dtb-$(call spec2026_case_dtb_tag,$(1)).stamp @printf '%s\n' \ "case=$(1)" \ "default_dtb=$$(SPEC2026_DEFAULT_DTB)" \ + "dts_isa_config=$$(DTS_ISA_CONFIG)" \ "profile=$(call spec2026_case_dtb_profile,$(1))" \ "min_memory_bytes=$(call spec2026_case_dtb_min_memory_bytes,$(1))" > "$$@.tmp" @if [ -f "$$@" ] && cmp -s "$$@.tmp" "$$@"; then rm "$$@.tmp"; else mv "$$@.tmp" "$$@"; fi diff --git a/workloads/linux/specjbb2015/rules.mk b/workloads/linux/specjbb2015/rules.mk index 65c0031..c4eb2ce 100644 --- a/workloads/linux/specjbb2015/rules.mk +++ b/workloads/linux/specjbb2015/rules.mk @@ -12,6 +12,8 @@ endif SPECJBB2015_ROOTFS_HASH := $(shell printf '%s\n' 'harts=$(SPECJBB2015_HARTS)' 'xms=$(SPECJBB_JVM_XMS)' 'xmx=$(SPECJBB_JVM_XMX)' 'mode=$(SPECJBB_MODE)' | sha256sum | cut -d ' ' -f 1) SPECJBB2015_ROOTFS_STAMP := $(SPECJBB2015_BUILD_DIR)/rootfs-vars.$(SPECJBB2015_ROOTFS_HASH).stamp +SPECJBB2015_FIRMWARE_HASH := $(shell printf '%s\n' 'default_dtb=$(SPECJBB2015_DEFAULT_DTB)' 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) +SPECJBB2015_FIRMWARE_STAMP := $(SPECJBB2015_BUILD_DIR)/firmware-vars.$(SPECJBB2015_FIRMWARE_HASH).stamp .PHONY: specjbb2015-check-inputs specjbb2015-check-inputs: @@ -27,6 +29,11 @@ $(SPECJBB2015_ROOTFS_STAMP): @rm -f "$(@D)"/rootfs-vars.*.stamp @touch "$@" +$(SPECJBB2015_FIRMWARE_STAMP): + @mkdir -p "$(@D)" + @rm -f "$(@D)"/firmware-vars.*.stamp + @touch "$@" + $(SPECJBB2015_BUILD_DIR)/rootfs.cpio: $(shell find $(SPECJBB2015_DIR)) $(TOOLCHAIN_WRAPPER) scripts/build-workload-linux.sh $(SPECJBB2015_BUILD_DIR)/download/sentinel $(SPECJBB2015_ROOTFS_STAMP) | specjbb2015-check-inputs @CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ SPECJBB_INPUT="$(SPECJBB_INPUT)" SPECJBB_RV_JDK_INPUT="$(SPECJBB_RV_JDK_INPUT)" \ @@ -34,7 +41,7 @@ $(SPECJBB2015_BUILD_DIR)/rootfs.cpio: $(shell find $(SPECJBB2015_DIR)) $(TOOLCHA HARTS="$(SPECJBB2015_HARTS)" MULTIHART=0 \ bash scripts/build-workload-linux.sh workloads/linux/specjbb2015 $(SPECJBB2015_BUILD_DIR) -$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) +$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) @CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" DEFAULT_DTB="$(SPECJBB2015_DEFAULT_DTB)" \ MULTIHART="$(SPECJBB2015_MULTIHART)" HARTS="$(SPECJBB2015_HARTS)" \ From 3f9a8f077f2388b3d1a57c0142a5637b8508519b Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Thu, 10 Sep 2026 17:40:30 +0800 Subject: [PATCH 04/13] chore(nemu_board): bump for the annotated rng-seed Pick up the nemu_board commit that documents the generated rng-seed bytes with their ASCII reading, matching the checked-in dts/*.dts.in templates. --- nemu_board | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nemu_board b/nemu_board index 5e71d1f..15db1e6 160000 --- a/nemu_board +++ b/nemu_board @@ -1 +1 @@ -Subproject commit 5e71d1f5c94574414132db59a0da3a8ec86467da +Subproject commit 15db1e6cdf4dcbf4cc016cb8938a5f8f35b59faf From c3ebea9a63e46e8753df818e61f7b51ac8cb38da Mon Sep 17 00:00:00 2001 From: Jiabin Wu <66947239+rezado@users.noreply.github.com> Date: Thu, 10 Sep 2026 18:52:02 +0800 Subject: [PATCH 05/13] fix(dts): preserve template semantics and validate generated profiles --- README.md | 18 +++--- dts/README.md | 16 ++++-- scripts/build-firmware-linux.sh | 7 ++- scripts/build-sbi.sh | 4 +- scripts/dts-config.sh | 3 +- scripts/export-linux-debug-artifacts.sh | 5 +- scripts/generate-nemu-board-dts.py | 75 +++++++++++++++---------- 7 files changed, 78 insertions(+), 50 deletions(-) diff --git a/README.md b/README.md index 231e47c..7276bd2 100644 --- a/README.md +++ b/README.md @@ -144,14 +144,15 @@ A single-core image contains: |---------|-------------------------------| | 0.0 MiB | LibCheckpointAlpha | | 1.0 MiB | OpenSBI | -| 2.0 MiB | device tree | -| 4.0 MiB | Linux kernel | +| 1.75 MiB | device tree | +| 2.0 MiB | Linux kernel | | -- | initramfs containing workload | -Single-core and multi-hart images place the DTB at 2 MiB (`0x80200000`). The -single-core kernel starts at 4 MiB (`0x80400000`) to keep it separate from the -DTB. This is an image-packing choice, not a fixed machine address. The -assembler checks both component sizes. +Single-core images place the DTB at 1.75 MiB (`0x801c0000`), providing 768 KiB +for OpenSBI while leaving 256 KiB for the DTB before Linux at 2 MiB. This is an +image-packing choice, not a fixed machine address. The assembler checks both +component sizes. Multi-hart images keep their separate DTB address at +`0x80200000`. A multi-hart image uses the fixed QEMU checkpoint layout: @@ -177,12 +178,13 @@ the workload's `dt` directory and the DTB is embedded in the firmware image. For DTS files used with gcpt, the beginning of RAM must be reserved with a `reserved-memory` node so Linux does not allocate or map the gcpt checkpoint buffer. The XiangShan FPGA DTS templates reserve the first 1 MiB of their declared DRAM for this purpose. ```shell -dd conv=notrunc bs=1024 seek=2048 if=dt/some_device.dtb of=fw_payload.bin +dd conv=notrunc bs=1024 seek=1792 if=dt/some_device.dtb of=fw_payload.bin ``` Use `fw_payload.qemu.bin` as the output file for a QEMU image. The supported QEMU `nemu` machine exposes a no-IRQ 16550A UART at `0x310b0000`. Multi-hart -images must retain a matching multi-hart device tree. +images use their separate fixed DTB offset of 2048 KiB and must retain a +matching multi-hart device tree. OpenSBI is patched (see `bootloader/opensbi.patch`) to load the device tree from a fixed offset relative to the DRAM base. The initramfs is placed after the Linux kernel and aligned to 1 MiB. diff --git a/dts/README.md b/dts/README.md index 581a1df..a03fa0d 100644 --- a/dts/README.md +++ b/dts/README.md @@ -47,11 +47,11 @@ and the `0x88600000` kernel address do not apply. This table shows the default |-------------------------|----------------|------------| | `0x80000000–0x800fffff` | 1 MiB | LibCheckpointAlpha checkpoint-recovery program; reserved as `no-map` in the DTS | | `0x80100000` | +1 MiB | OpenSBI firmware starts here | -| `0x80200000` | +2 MiB | Device tree placed here by firmware assembly | -| `0x80400000` and above | +4 MiB | Linux kernel image, then the MiB-aligned initramfs | +| `0x801c0000` | +1.75 MiB | Device tree placed here by firmware assembly | +| `0x80200000` and above | +2 MiB | Linux kernel image, then the MiB-aligned initramfs | -The single-core firmware packer uses `DTB_OFFSET_KB=2048`, -`SBI_OFFSET_KB=1024`, and `KERNEL_OFFSET_MB=4`. The initramfs address is +The single-core firmware packer uses `DTB_OFFSET_KB=1792`, +`SBI_OFFSET_KB=1024`, and `KERNEL_OFFSET_MB=2`. The initramfs address is computed from the actual kernel size and starts at the next MiB boundary. The selected single-core DTS supplies the DRAM base and capacity; no fixed 8 GiB or 64 GiB profile is imposed by this layout. @@ -129,6 +129,14 @@ multi-hart counts are 2 through 128. Generated multi-hart FPGA and QEMU templates reserve the fixed 131 MiB checkpoint window `[0x80300000, 0x88600000)`. +Built-in FPGA noAIA and QEMU names must match +`[-hart][-memg][-novec]` in that order. Multi-hart names +must explicitly specify memory size; zero memory and hart counts outside +1 through 128 are rejected. Other basenames require a matching template in +`dts/`, even if they start with a known board name. Custom templates are +refreshed from their source on every invocation; a previously generated copy +does not replace a missing source. + The full capability block describes XiangShan hardware and is not fully emulated by the current QEMU `nemu` path. In particular, the timer path cannot execute the DT-advertised `sstc` CSR sequence, so generated multi-hart CPU nodes diff --git a/scripts/build-firmware-linux.sh b/scripts/build-firmware-linux.sh index 0e66150..1f3ad30 100644 --- a/scripts/build-firmware-linux.sh +++ b/scripts/build-firmware-linux.sh @@ -16,11 +16,13 @@ DTB_REQUIRED_MIN_MEMORY_BYTES="${DTB_REQUIRED_MIN_MEMORY_BYTES:-}" HARTS="${HARTS:-2}" readonly MULTIHART_MAX_HARTS=128 readonly MULTIHART_KERNEL_OFFSET_MB=134 +readonly SINGLEHART_DTB_OFFSET_KB=1792 +readonly MULTIHART_DTB_OFFSET_KB=2048 -DTB_OFFSET_KB=2048 +DTB_OFFSET_KB="$SINGLEHART_DTB_OFFSET_KB" DTB_MAX_SIZE_KB=256 SBI_OFFSET_KB=1024 -KERNEL_MIN_OFFSET_MB=4 +KERNEL_MIN_OFFSET_MB=2 if [ "${MULTIHART:-0}" = 1 ]; then if [ -z "$DEFAULT_DTB" ]; then @@ -34,6 +36,7 @@ if [ "${MULTIHART:-0}" = 1 ]; then echo "HARTS must be an integer in the range 2..$MULTIHART_MAX_HARTS" >&2 exit 1 fi + DTB_OFFSET_KB="$MULTIHART_DTB_OFFSET_KB" DTB_MAX_SIZE_KB=1024 KERNEL_MIN_OFFSET_MB="$MULTIHART_KERNEL_OFFSET_MB" elif [ -z "$DEFAULT_DTB" ]; then diff --git a/scripts/build-sbi.sh b/scripts/build-sbi.sh index a31b218..96dbe3f 100644 --- a/scripts/build-sbi.sh +++ b/scripts/build-sbi.sh @@ -20,8 +20,8 @@ else DTS_CONFIG="$(dts_extract_config "$DTS_TEMPLATE")" read -r MEM_BEGIN MEM_SIZE CLINT_MMIO <<< "$DTS_CONFIG" FW_TEXT_START=$((MEM_BEGIN + MEGABYTE)) - FW_JUMP_ADDR="$(dts_linux_kernel_address "$MEM_BEGIN" "$((4 * MEGABYTE))")" - FW_JUMP_FDT_ADDR=$((MEM_BEGIN + 2 * MEGABYTE)) + FW_JUMP_ADDR="$(dts_linux_kernel_address "$MEM_BEGIN" "$((2 * MEGABYTE))")" + FW_JUMP_FDT_ADDR=$((MEM_BEGIN + 1792 * 1024)) fi # prepare OpenSBI source diff --git a/scripts/dts-config.sh b/scripts/dts-config.sh index b286962..12cf836 100755 --- a/scripts/dts-config.sh +++ b/scripts/dts-config.sh @@ -1,6 +1,6 @@ #!/usr/bin/env bash -# Generate a recognized DTS basename or preserve an existing custom template. +# Generate a recognized DTS basename or refresh a custom template from its source. dts_generate_template() { local dts_dir="$1" local default_dtb="$2" @@ -11,7 +11,6 @@ dts_generate_template() { python3 "$generator" --name "$default_dtb" --output "$output" \ --isa-config "$isa_config" \ - --preserve-existing-unsupported \ --custom-template-dir "$custom_dir" } diff --git a/scripts/export-linux-debug-artifacts.sh b/scripts/export-linux-debug-artifacts.sh index ba6bd20..efd94d3 100755 --- a/scripts/export-linux-debug-artifacts.sh +++ b/scripts/export-linux-debug-artifacts.sh @@ -74,11 +74,12 @@ cp "$DTS_FILE" "$DT_DIR/$ARTIFACT_NAME.dts" cp "$SBI_ELF" "$SBI_DIR/fw_jump.elf" cp "$SBI_CONFIG" "$SBI_DIR/defconfig" -kernel_min_offset_mb=4 -dtb_offset=$((2 * 1024 * 1024)) +kernel_min_offset_mb=2 +dtb_offset=$((1792 * 1024)) multihart=false if [ "${MULTIHART:-0}" = 1 ]; then kernel_min_offset_mb=134 + dtb_offset=$((2 * 1024 * 1024)) multihart=true fi diff --git a/scripts/generate-nemu-board-dts.py b/scripts/generate-nemu-board-dts.py index b61bdb8..0a8cbd5 100644 --- a/scripts/generate-nemu-board-dts.py +++ b/scripts/generate-nemu-board-dts.py @@ -6,7 +6,6 @@ import json import os import re -import shutil import tempfile from pathlib import Path @@ -34,14 +33,37 @@ def load_dtsgen(): return module.DTSGen -def memory_gib(name): - match = re.search(r"-mem([1-9][0-9]*)g(?:-|$)", name) - return int(match.group(1)) if match else (128 if name == "xiangshan" else 2) - - -def harts(name): - match = re.search(r"-(\d+)hart(?:-|$)", name) - return int(match.group(1)) if match else 1 +def parse_name(name): + """Recognize complete built-in names; leave other names to custom templates.""" + if not re.fullmatch(r"[A-Za-z0-9][A-Za-z0-9_.-]*", name): + raise ValueError("--name must be a basename without directory components") + fixed = { + "xiangshan": (1, 128 << 20), + "nutshell": (1, 128 << 20), + "spike": (1, 2 << 30), + "spike-2core": (2, 2 << 30), + "yanqihu": (1, 128 << 20), + "yanqihu-2core": (2, 128 << 20), + "xiangshan-fpga-AIA-mem16g": (1, 16 << 30), + } + if name in fixed: + return fixed[name] + match = re.fullmatch( + r"(?:xiangshan-fpga-noAIA|xiangshan-qemu-nemu)" + r"(?:-(?P[0-9]+)hart)?(?:-mem(?P[0-9]+)g)?(?:-novec)?", + name, + ) + if match is None: + raise UnsupportedDTSName(f"unsupported DTS basename: {name}") + nr_harts = int(match["harts"] or 1) + if not 1 <= nr_harts <= 128: + raise ValueError("DTS hart count must be in 1..128") + if nr_harts > 1 and match["memory"] is None: + raise ValueError("multi-hart DTS names must include an explicit -memg profile") + memory = int(match["memory"] or 2) << 30 + if memory <= 0 or memory > (1 << 64) - DRAM_BASE: + raise ValueError("DTS memory must be positive and fit in the 64-bit address space") + return nr_harts, memory def chosen_properties(profile, initrd=True): @@ -158,16 +180,13 @@ def aia_devices(): def render(name, isa_config_name="kunminghu-v3"): + nr_harts, memory = parse_name(name) DTSGen = load_dtsgen() profiles = json.loads(PROFILE_FILE.read_text()) is_novec = name.endswith("-novec") - nr_harts = harts(name) - memory = memory_gib(name) << 30 if name != "xiangshan" else 128 << 20 root_nodes = [] - non_fpga_generated = (name.startswith(("xiangshan-qemu-nemu", "spike", "yanqihu")) - or name in {"xiangshan", "nutshell"}) - if isa_config_name != "kunminghu-v3" and non_fpga_generated: + if isa_config_name != "kunminghu-v3" and not name.startswith("xiangshan-fpga-noAIA"): raise ValueError("--isa-config is supported by the FPGA noAIA profile only") if name.startswith("xiangshan-fpga-noAIA"): @@ -249,6 +268,7 @@ def render(name, isa_config_name="kunminghu-v3"): legacy_isa="rv64imafdchv", mmu_type="riscv,sv39", timebase_freq=1000000, memories=[(DRAM_BASE, memory)], reserved_memories=[], plic_machine_first=False, + chosen_properties=chosen_properties("nemu"), bootargs="console=hvc0 earlycon=sbi") elif name.startswith("spike"): nr_harts = 2 if name == "spike-2core" else 1 @@ -265,10 +285,11 @@ def render(name, isa_config_name="kunminghu-v3"): gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", model="xiangshan,xiangshan-kunminghu", cpu_compatibles=["UCAS,COOSCA1.0", "riscv"], - isa_extensions=DTSGen.sort_isa_extensions("i m a f d c zicntr zicsr zifencei zihpm".split()), + isa_extensions=DTSGen.sort_isa_extensions("i m a c zicntr zicsr zifencei zihpm".split()), legacy_isa="rv64imafdc", mmu_type="riscv,sv39", timebase_freq=1000000, clint_addr=0x38000000, plic_addr=None, memories=[(DRAM_BASE, 128 << 20)], reserved_memories=[], uartlite_addr=None, + chosen_properties=chosen_properties("nemu"), bootargs="console=hvc0 earlycon=sbi") gen.add_device(serial_uartlite()) elif name == "xiangshan-fpga-AIA-mem16g": @@ -277,6 +298,7 @@ def render(name, isa_config_name="kunminghu-v3"): isa.update(isa_config["isa_extensions"]) isa.discard("zca") isa.update({"smaia", "ssaia", "zabha", "zicbom", "zicboz"}) + isa.update(VECTOR_EXTENSIONS) cpu_props = cache_properties(timebase=True) + "\nnext-level-cache = <&l2_cache>;" root_nodes = ["aliases { serial0 = &uart0; };", """l2_cache: l2-cache { compatible = "cache"; @@ -330,33 +352,26 @@ def main(): parser.add_argument("--isa-config", choices=["kunminghu-v3", "kunminghu-v2"], default="kunminghu-v3", help="named FPGA noAIA ISA declaration (default: kunminghu-v3)") - parser.add_argument("--preserve-existing-unsupported", action="store_true", - help="keep an existing output when its basename is not generated") parser.add_argument("--custom-template-dir", type=Path, default=None, help="directory holding user-supplied templates for " "unsupported basenames") args = parser.parse_args() - if not NEMU_BOARD_DTSGEN.is_file(): - parser.error(f"nemu_board DTSGen.py not found: {NEMU_BOARD_DTSGEN}") if not args.output.name.endswith(".dts.in"): parser.error("--output must end in .dts.in") try: - output = render(args.name, args.isa_config) + try: + output = render(args.name, args.isa_config) + except UnsupportedDTSName: + custom = (args.custom_template_dir / f"{args.name}.dts.in" + if args.custom_template_dir else None) + if custom is None or not custom.is_file(): + raise + output = custom.read_text(encoding="utf-8") args.output.parent.mkdir(parents=True, exist_ok=True) with tempfile.NamedTemporaryFile("w", encoding="utf-8", dir=args.output.parent, delete=False) as tmp: tmp.write(output) os.replace(tmp.name, args.output) - except UnsupportedDTSName as exc: - if args.preserve_existing_unsupported and args.output.is_file(): - return - custom = (args.custom_template_dir / args.output.name - if args.custom_template_dir else None) - if custom is not None and custom.is_file(): - args.output.parent.mkdir(parents=True, exist_ok=True) - shutil.copyfile(custom, args.output) - return - parser.error(str(exc)) except (OSError, ValueError) as exc: parser.error(str(exc)) From 1d334672a27bbb74bcf6af8941814e86271f1485 Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Fri, 11 Sep 2026 13:21:30 +0800 Subject: [PATCH 06/13] chore: vendor nemu_board as regular directory Record the upstream source and GitHub authors in the README. --- .gitmodules | 3 - README.md | 10 + nemu_board | 1 - nemu_board/.gitignore | 4 + nemu_board/configs/xiangshan_defconfig | 52 ++ .../configs/xiangshan_overlay_defconfig | 55 +++ nemu_board/configs/xiangshanhost_defconfig | 295 ++++++++++++ nemu_board/dts/DTSGen.py | 444 ++++++++++++++++++ nemu_board/dts/README.md | 152 ++++++ nemu_board/dts/build_dual_core_for_qemu.sh | 12 + nemu_board/dts/build_eight_core_for_qemu.sh | 12 + nemu_board/dts/build_four_core_for_qemu.sh | 12 + nemu_board/dts/build_single_core_for_nemu.sh | 11 + nemu_board/dts/build_sixteen_core_for_qemu.sh | 12 + .../dts/generate-workload-builder-dts.py | 203 ++++++++ .../generated-qemu-2hart-mem16g-novec.dts.in | 155 ++++++ nemu_board/dts/test_workload_builder.py | 360 ++++++++++++++ nemu_board/dts/workload-builder-profiles.json | 226 +++++++++ 18 files changed, 2015 insertions(+), 4 deletions(-) delete mode 160000 nemu_board create mode 100644 nemu_board/.gitignore create mode 100644 nemu_board/configs/xiangshan_defconfig create mode 100644 nemu_board/configs/xiangshan_overlay_defconfig create mode 100644 nemu_board/configs/xiangshanhost_defconfig create mode 100755 nemu_board/dts/DTSGen.py create mode 100644 nemu_board/dts/README.md create mode 100755 nemu_board/dts/build_dual_core_for_qemu.sh create mode 100755 nemu_board/dts/build_eight_core_for_qemu.sh create mode 100755 nemu_board/dts/build_four_core_for_qemu.sh create mode 100755 nemu_board/dts/build_single_core_for_nemu.sh create mode 100755 nemu_board/dts/build_sixteen_core_for_qemu.sh create mode 100644 nemu_board/dts/generate-workload-builder-dts.py create mode 100644 nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in create mode 100644 nemu_board/dts/test_workload_builder.py create mode 100644 nemu_board/dts/workload-builder-profiles.json diff --git a/.gitmodules b/.gitmodules index b74a291..daccd27 100644 --- a/.gitmodules +++ b/.gitmodules @@ -28,6 +28,3 @@ [submodule "bootloader/LibCheckpoint"] path = bootloader/LibCheckpoint url = https://github.com/OpenXiangShan/LibCheckpoint.git -[submodule "nemu_board"] - path = nemu_board - url = https://github.com/OpenXiangShan/nemu_board.git diff --git a/README.md b/README.md index 7276bd2..7be0f34 100644 --- a/README.md +++ b/README.md @@ -302,6 +302,16 @@ For an unsupported custom basename, place the complete template at `build/generated-dts` on each build, so it survives cleaning the build tree; a missing unsupported basename is rejected. +### `nemu_board` source and co-authors + +The `nemu_board/` directory is vendored as ordinary tracked files from +[OpenXiangShan/nemu_board](https://github.com/OpenXiangShan/nemu_board) at +[commit `15db1e6`](https://github.com/OpenXiangShan/nemu_board/commit/15db1e6cdf4dcbf4cc016cb8938a5f8f35b59faf), +not included as a Git submodule. + +GitHub authors and co-authors represented in the vendored history through that +revision are `chenguokai`, `xyyy1420`, `dzwduan`, `cyyself` and `Gs-ygc`. + Currently, the memory location of the initramfs containing the workload is passed to the kernel by device tree. So for each workload, device tree files are generated from the template on the fly, because the size of the initramfs cannot be known in advance. You should use the parameters `INITRAMFS_BEGIN` and `INITRAMFS_END` in the device tree template. ```dts diff --git a/nemu_board b/nemu_board deleted file mode 160000 index 15db1e6..0000000 --- a/nemu_board +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 15db1e6cdf4dcbf4cc016cb8938a5f8f35b59faf diff --git a/nemu_board/.gitignore b/nemu_board/.gitignore new file mode 100644 index 0000000..cca2b2c --- /dev/null +++ b/nemu_board/.gitignore @@ -0,0 +1,4 @@ +*.dtb +dts/build/ +/generated-*.dts.in +/nemu-board-workload-builder.patch diff --git a/nemu_board/configs/xiangshan_defconfig b/nemu_board/configs/xiangshan_defconfig new file mode 100644 index 0000000..86270c8 --- /dev/null +++ b/nemu_board/configs/xiangshan_defconfig @@ -0,0 +1,52 @@ +CONFIG_DEFAULT_HOSTNAME="(lvna)" +# CONFIG_CROSS_MEMORY_ATTACH is not set +CONFIG_LOG_BUF_SHIFT=15 +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="${RISCV_ROOTFS_HOME}/rootfsimg/initramfs-emu.txt" +CONFIG_EXPERT=y +# CONFIG_SYSFS_SYSCALL is not set +# CONFIG_FHANDLE is not set +CONFIG_NONPORTABLE=y +CONFIG_SMP=y +CONFIG_RISCV_SBI_V01=y +# CONFIG_BLOCK is not set +# CONFIG_BINFMT_SCRIPT is not set +# CONFIG_SLAB_MERGE_DEFAULT is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_COMPACTION is not set +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_STANDALONE is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set +# CONFIG_ALLOW_DEV_COREDUMP is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_VT_CONSOLE is not set +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y +CONFIG_SERIAL_UARTLITE=y +CONFIG_SERIAL_UARTLITE_CONSOLE=y +CONFIG_HVC_RISCV_SBI=y +CONFIG_HW_RANDOM_TIMERIOMEM=y +# CONFIG_DEVMEM is not set +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_VIRTIO_MENU is not set +# CONFIG_FILE_LOCKING is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY_USER is not set +CONFIG_PROC_CHILDREN=y +# CONFIG_SYSFS is not set +# CONFIG_MISC_FILESYSTEMS is not set +CONFIG_PRINTK_TIME=y +CONFIG_STACKTRACE=y +CONFIG_RCU_CPU_STALL_TIMEOUT=300 +# CONFIG_RCU_TRACE is not set +# CONFIG_FTRACE is not set +# CONFIG_RUNTIME_TESTING_MENU is not set diff --git a/nemu_board/configs/xiangshan_overlay_defconfig b/nemu_board/configs/xiangshan_overlay_defconfig new file mode 100644 index 0000000..1e16e4f --- /dev/null +++ b/nemu_board/configs/xiangshan_overlay_defconfig @@ -0,0 +1,55 @@ +CONFIG_DEFAULT_HOSTNAME="(lvna)" +# CONFIG_CROSS_MEMORY_ATTACH is not set +CONFIG_LOG_BUF_SHIFT=15 +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="/nfs/home/jiaxiaoyu/workspace/checkpoint_script_update/scripts/buffer/scripts/gcc_s04_initramfs-spec.txt" +CONFIG_EXPERT=y +# CONFIG_SYSFS_SYSCALL is not set +# CONFIG_FHANDLE is not set +CONFIG_NONPORTABLE=y +CONFIG_SMP=y +CONFIG_RISCV_SBI_V01=y +# CONFIG_BLOCK is not set +# CONFIG_BINFMT_SCRIPT is not set +# CONFIG_SLAB_MERGE_DEFAULT is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_COMPACTION is not set +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_STANDALONE is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set +# CONFIG_ALLOW_DEV_COREDUMP is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_VT_CONSOLE is not set +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y +CONFIG_SERIAL_UARTLITE=y +CONFIG_SERIAL_UARTLITE_CONSOLE=y +CONFIG_HVC_RISCV_SBI=y +CONFIG_HW_RANDOM_TIMERIOMEM=y +# CONFIG_DEVMEM is not set +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_VIRTIO_MENU is not set +# CONFIG_FILE_LOCKING is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY_USER is not set +CONFIG_OVERLAY_FS=y +CONFIG_OVERLAY_FS_XINO_AUTO=y +CONFIG_OVERLAY_FS_METACOPY=y +CONFIG_PROC_CHILDREN=y +# CONFIG_SYSFS is not set +# CONFIG_MISC_FILESYSTEMS is not set +CONFIG_PRINTK_TIME=y +CONFIG_STACKTRACE=y +CONFIG_RCU_CPU_STALL_TIMEOUT=300 +# CONFIG_RCU_TRACE is not set +# CONFIG_FTRACE is not set +# CONFIG_RUNTIME_TESTING_MENU is not set diff --git a/nemu_board/configs/xiangshanhost_defconfig b/nemu_board/configs/xiangshanhost_defconfig new file mode 100644 index 0000000..fa9c560 --- /dev/null +++ b/nemu_board/configs/xiangshanhost_defconfig @@ -0,0 +1,295 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_CGROUPS=y +CONFIG_MEMCG=y +CONFIG_CGROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_NAMESPACES=y +CONFIG_USER_NS=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_EXPERT=y +# CONFIG_SYSFS_SYSCALL is not set +CONFIG_PROFILING=y +CONFIG_ARCH_MICROCHIP=y +CONFIG_ARCH_RENESAS=y +CONFIG_ARCH_SIFIVE=y +CONFIG_ARCH_SOPHGO=y +CONFIG_SOC_STARFIVE=y +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_THEAD=y +CONFIG_ARCH_VIRT=y +CONFIG_ARCH_CANAAN=y +CONFIG_NONPORTABLE=y +CONFIG_SMP=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPUFREQ_DT=y +CONFIG_ACPI_CPPC_CPUFREQ=m +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y +CONFIG_ACPI=y +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_XFRM_USER=m +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_INET_ESP=m +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_IP_VS=m +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_NFCT=y +CONFIG_NF_LOG_ARP=m +CONFIG_NF_LOG_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=m +CONFIG_NET_SCHED=y +CONFIG_NET_CLS_CGROUP=m +CONFIG_NETLINK_DIAG=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CAN=m +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCIE_XILINX=y +CONFIG_PCIE_FU740=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_SPI_NOR=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_VIRTIO_BLK=y +CONFIG_BLK_DEV_NVME=m +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_SCSI_VIRTIO=y +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=m +CONFIG_DM_THIN_PROVISIONING=m +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +CONFIG_MACVLAN=m +CONFIG_IPVLAN=m +CONFIG_VXLAN=m +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +CONFIG_MACB=y +CONFIG_E1000E=y +CONFIG_R8169=y +CONFIG_RAVB=y +CONFIG_STMMAC_ETH=m +CONFIG_MICREL_PHY=y +CONFIG_MICROSEMI_PHY=y +CONFIG_CAN_RCAR_CANFD=m +CONFIG_INPUT_MOUSEDEV=y +CONFIG_KEYBOARD_SUN4I_LRADC=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y +CONFIG_SERIAL_UARTLITE=m +CONFIG_SERIAL_SH_SCI=y +CONFIG_HVC_RISCV_SBI=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=y +CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_MV64XXX=m +CONFIG_I2C_RIIC=m +CONFIG_SPI=y +CONFIG_SPI_RSPI=m +CONFIG_SPI_SIFIVE=y +CONFIG_SPI_SUN6I=y +# CONFIG_PTP_1588_CLOCK is not set +CONFIG_GPIO_SIFIVE=y +CONFIG_CPU_THERMAL=y +CONFIG_RZG2L_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_SUNXI_WATCHDOG=y +CONFIG_RENESAS_RZG2LWDT=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_DRM=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_NOUVEAU=m +CONFIG_DRM_SUN4I=m +CONFIG_DRM_VIRTIO_GPU=m +CONFIG_FB=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_WM8978=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_RENESAS_USBHS=m +CONFIG_USB_STORAGE=y +CONFIG_USB_UAS=y +CONFIG_USB_MUSB_HDRC=m +CONFIG_USB_MUSB_SUNXI=m +CONFIG_NOP_USB_XCEIV=m +CONFIG_USB_GADGET=y +CONFIG_USB_RENESAS_USBHS_UDC=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SPI=y +CONFIG_MMC_SDHI=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_STARFIVE=y +CONFIG_MMC_SUNXI=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_SUN6I=y +CONFIG_DMADEVICES=y +CONFIG_DMA_SUN6I=m +CONFIG_DW_AXI_DMAC=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_INPUT=y +CONFIG_VIRTIO_MMIO=y +CONFIG_CLK_SOPHGO_CV1800=y +CONFIG_SUN8I_DE2_CCU=m +CONFIG_RENESAS_OSTM=y +CONFIG_SUN50I_IOMMU=y +CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_CTRL=y +CONFIG_RPMSG_VIRTIO=y +CONFIG_IIO=y +CONFIG_PHY_SUN4I_USB=m +CONFIG_PHY_RCAR_GEN3_USB2=y +CONFIG_LIBNVDIMM=y +CONFIG_NVMEM_SUNXI_SID=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_AUTOFS_FS=y +CONFIG_OVERLAY_FS=m +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_9P_FS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=m +CONFIG_SECURITY=y +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_DEV_VIRTIO=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_PAGEALLOC=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_DEBUG_VM=y +CONFIG_DEBUG_VM_PGFLAGS=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DEBUG_PER_CPU_MAPS=y +CONFIG_SOFTLOCKUP_DETECTOR=y +CONFIG_WQ_WATCHDOG=y +CONFIG_DEBUG_TIMEKEEPING=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_RWSEMS=y +CONFIG_DEBUG_ATOMIC_SLEEP=y +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_PLIST=y +CONFIG_DEBUG_SG=y +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_EQS_DEBUG=y +# CONFIG_FTRACE is not set +# CONFIG_RUNTIME_TESTING_MENU is not set +CONFIG_MEMTEST=y diff --git a/nemu_board/dts/DTSGen.py b/nemu_board/dts/DTSGen.py new file mode 100755 index 0000000..3cdd5f8 --- /dev/null +++ b/nemu_board/dts/DTSGen.py @@ -0,0 +1,444 @@ +#!/usr/bin/env python3 + +from functools import cmp_to_key +import re +import json + +class DTSGen: + def __init__(self, + compatible: str | list = "xiangshan,nemu-board", + model: str = "XiangShan", + cpu_compatibles: list | None = None, + isa_extensions: list = ["i", "m", "a", "f", "d", "c"], + mmu_type="riscv,sv39", + timebase_freq: int = 10000000, # 10 MHz + nr_harts: int = 1, + clint_addr: int = 0x38000000, + plic_addr: int = 0x3c000000, + memories: list = [(0x80000000, 8*1024*1024*1024)], # [(start, size)], default 8 GB at 2 GB + reserved_memories: list = [], # [(start, size)] + bootargs: str = "console=hvc0 earlycon=sbi rdinit=/sbin/init", + rng_seed: bytes = b"XIANGSHAN_NEMU_BOARD_RANDOM_SEED", + uartlite_addr: int = 0x40600000, + nemu_sdhci_addr: int = None, + plic_ndev: int = 64, + plic_machine_first: bool = True, + cpu_properties: str = "", + chosen_properties: str = "", + root_nodes: list | None = None, + legacy_isa: str | None = None, + cache_block_operations: list | None = None, + interrupts_in_soc: bool = False, + soc_compatible: str | list = "simple-bus", + plic_node_name: str = "plic", + interrupt_reg_names: str | None = None): + self.isa_extensions = isa_extensions + self.mmu_type = mmu_type + self.timebase_freq = timebase_freq + self.nr_harts = nr_harts + self.clint_addr = clint_addr + self.plic_addr = plic_addr + self.memories = memories + self.reserved_memories = list(reserved_memories) + self.plic_ndev = plic_ndev + self.plic_machine_first = plic_machine_first + self.cpu_properties = cpu_properties + self.chosen_properties = chosen_properties + self.root_nodes = list(root_nodes or []) + self.legacy_isa = legacy_isa + self.cache_block_operations = cache_block_operations + self.interrupts_in_soc = interrupts_in_soc + self.soc_compatible = ([soc_compatible] if isinstance(soc_compatible, str) + else soc_compatible) + self.plic_node_name = plic_node_name + self.interrupt_reg_names = interrupt_reg_names + if isinstance(compatible, str): + self.compatible = [compatible] + else: + self.compatible = compatible + self.model = model + if cpu_compatibles is None: + self.cpu_compatibles = ["riscv"] + elif isinstance(cpu_compatibles, str): + self.cpu_compatibles = [cpu_compatibles] + else: + self.cpu_compatibles = cpu_compatibles + self.bootargs = bootargs + # Note: console=hvc0 is a hack for NEMU Uartlite to use SBI + # console to get around the lack of TX FIFO empty interrupt + # implementation. The proper param should be "console=ttyUL0" + # for Uartlite IP on Xilinx FPGA. + # Ensure we have set the following kernel configs: + # CONFIG_NONPORTABLE=y + # CONFIG_HVC_RISCV_SBI=y + self.rng_seed = rng_seed + self.soc_devices = [] # [dev_str0, ...] + if uartlite_addr is not None and plic_addr is not None: + self.soc_devices.append(self.__gen_uartlite(uartlite_addr, 3)) + if nemu_sdhci_addr is not None: + self.soc_devices.append(self.__gen_nemu_sdhci(nemu_sdhci_addr)) + + def add_reserved_memory(self, start: int, size: int, name: str | None = None, no_map: bool = True): + self.reserved_memories.append({ + "start": start, + "size": size, + "name": name, + "no_map": no_map, + }) + return self + + def indent(text, level: int = 4): + indent_str = ' ' * level + return "\n".join(indent_str + line if line.strip() != "" else line for line in text.split("\n")) + + def gen_addrsize(addrsize, cell_number): + res = "" + for i in range(cell_number): + res += f"0x{(addrsize >> (32 * (cell_number - i - 1))) & 0xFFFFFFFF:x} " + return res.strip() + + def __gen_memory(self, memory_start, memory_size): + return f""" +memory@{memory_start:x} {{ + device_type = "memory"; + reg = <{DTSGen.gen_addrsize(memory_start, 2)} {DTSGen.gen_addrsize(memory_size, 2)}>; +}}; +""".strip() + + def __gen_isa_string(self, isa, cacheline_size=64): + # Cache parameters are used for Zicbom / Zicbop / Zicboz + # support in Linux + cache_block_operations = (set(self.cache_block_operations) + if self.cache_block_operations is not None + else {"zicbom", "zicbop", "zicboz"}) + return f""" +{ f"riscv,cbom-block-size = <{cacheline_size}>;" if "zicbom" in isa and "zicbom" in cache_block_operations else "" } +{ f"riscv,cbop-block-size = <{cacheline_size}>;" if "zicbop" in isa and "zicbop" in cache_block_operations else "" } +{ f"riscv,cboz-block-size = <{cacheline_size}>;" if "zicboz" in isa and "zicboz" in cache_block_operations else "" } +riscv,isa = "{self.legacy_isa or ('rv64i' + ''.join(ext for ext in 'mafdcvh' if ext in isa))}"; +riscv,isa-base = "rv64i"; +riscv,isa-extensions = {", ".join(f'"{ext}"' for ext in isa)}; +""".strip() + + def __gen_cpu_node(self, hart_id, isa): + # Reference: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/riscv/cpus.yaml + compatible_list = ", ".join(f'"{compatible}"' for compatible in self.cpu_compatibles) + return f""" +cpu{hart_id}: cpu@{hart_id:x} {{ + compatible = {compatible_list}; + device_type = "cpu"; + mmu-type = "{self.mmu_type}"; + reg = <{hart_id}>; +{DTSGen.indent(self.__gen_isa_string(isa))} +{DTSGen.indent(self.cpu_properties)} + + cpu{hart_id}_intc: interrupt-controller {{ + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }}; +}}; +""".strip() + + def __gen_cpus(self): + return f""" +cpus {{ + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <{self.timebase_freq}>; + +{DTSGen.indent('\n'.join(self.__gen_cpu_node(hart_id, self.isa_extensions) + "\n" for hart_id in range(self.nr_harts)))} +}}; +""".strip() + + def __gen_clint(self): + # Reference: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/timer/sifive%2Cclint.yaml + if self.clint_addr == None: + return "" + # 3 is MSI, 7 is MTI + cpu_intc_list = [f"<&cpu{hart_id}_intc 3>, <&cpu{hart_id}_intc 7>" for hart_id in range(self.nr_harts)] + cpu_intc_head = " interrupts-extended = "; + cpu_intc_str = cpu_intc_head + for each_intc in zip(cpu_intc_list, list(range(self.nr_harts))): + cpu_intc_str += each_intc[0] + if each_intc[1] != self.nr_harts - 1: + cpu_intc_str += ",\n" + " " * (len(cpu_intc_head)) + return f""" +clint: clint@{self.clint_addr:x} {{ + compatible = "riscv,clint0"; + reg = <{DTSGen.gen_addrsize(self.clint_addr, 2)} {DTSGen.gen_addrsize(0x10000, 2)}>; +{f' reg-names = "{self.interrupt_reg_names}";' if self.interrupt_reg_names else ''} +{cpu_intc_str}; +}}; +""".strip() + + def __gen_plic(self, max_priority: int = 7, ndev: int = 64): + # Reference: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/interrupt-controller/sifive%2Cplic-1.0.0.yaml + if self.plic_addr is None: + return "" + # 11 is MEI, 9 is SEI + irqs = (11, 9) if self.plic_machine_first else (9, 11) + cpu_intc_list = [f"<&cpu{hart_id}_intc {irqs[0]}>, <&cpu{hart_id}_intc {irqs[1]}>" for hart_id in range(self.nr_harts)] + cpu_intc_head = " interrupts-extended = "; + cpu_intc_str = cpu_intc_head + for each_intc in zip(cpu_intc_list, list(range(self.nr_harts))): + cpu_intc_str += each_intc[0] + if each_intc[1] != self.nr_harts - 1: + cpu_intc_str += ",\n" + " " * (len(cpu_intc_head)) + return f""" +plic: {self.plic_node_name}@{self.plic_addr:x} {{ + compatible = "riscv,plic0"; + reg = <{DTSGen.gen_addrsize(self.plic_addr, 2)} {DTSGen.gen_addrsize(0x4000000, 2)}>; +{f' reg-names = "{self.interrupt_reg_names}";' if self.interrupt_reg_names else ''} + #interrupt-cells = <1>; + interrupt-controller; +{cpu_intc_str}; + riscv,max-priority = <{max_priority}>; + riscv,ndev = <{ndev}>; +}}; +""".strip() + + def __gen_reserved_memory(self): + if len(self.reserved_memories) == 0: + return "" + res = f""" +reserved-memory {{ + #address-cells = <2>; + #size-cells = <2>; + ranges; +""" + for entry, idx in zip(self.reserved_memories, list(range(len(self.reserved_memories)))): + if isinstance(entry, dict): + start = entry["start"] + size = entry["size"] + name = entry.get("name") or f"resv{idx}" + no_map = entry.get("no_map", True) + else: + start, size = entry + name = f"resv{idx}" + no_map = True + + entry_lines = [ + f"{name}@{start:x} {{", + f" reg = <{DTSGen.gen_addrsize(start, 2)} {DTSGen.gen_addrsize(size, 2)}>;", + ] + if no_map: + entry_lines.append(" no-map;") + entry_lines.append("};") + res += DTSGen.indent("\n".join(entry_lines) + "\n") + res += "};" + return res + + def __gen_uartlite(self, uartlite_addr, plic_addr): + # https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/serial/xlnx%2Copb-uartlite.yaml + # Uartlite hardware does not handle clock division, so we do + # not specify clocks here + return f""" +serial@{uartlite_addr:x} {{ + compatible = "xlnx,xps-uartlite-1.00.a"; + reg = <{DTSGen.gen_addrsize(uartlite_addr, 2)} {DTSGen.gen_addrsize(0x1000, 2)}>; + interrupts-extended = <&plic {plic_addr}>; + current-speed = <115200>; + xlnx,data-bits = <8>; + xlnx,use-parity = <0>; +}}; +""".strip() + + def __gen_nemu_sdhci(self, sd_addr): + return f""" +mmc@{sd_addr:x} {{ + compatible = "nemu,sdhost"; + reg = <{DTSGen.gen_addrsize(sd_addr, 2)} {DTSGen.gen_addrsize(0x1000, 2)}>; +}}; +""".strip() + + def __gen_soc(self): + compatible_list = ", ".join(f'"{compatible}"' for compatible in self.soc_compatible) + res = f""" +soc {{ + #address-cells = <2>; + #size-cells = <2>; + compatible = {compatible_list}; + ranges; +""" + "\n" + if self.interrupts_in_soc: + for dev_str in (self.__gen_clint(), self.__gen_plic(ndev=self.plic_ndev)): + if dev_str: + res += DTSGen.indent(dev_str, 4) + "\n\n" + for dev_str in self.soc_devices: + res += DTSGen.indent(dev_str, 4) + "\n\n" + res += "};" + return res.strip() + + def sort_isa_extensions(ext_list: list): + SINGLE_ORDER = list("IMAFDQLCBKJTPVH") + # Helper to categorize an extension name + def ext_category(ext: str): + """Return (category, key1, key2) so sorting works: + category: + 0 = single-letter standard + 1 = standard Z* (multi-letter beginning with 'Z') + 2 = supervisor-level S*, hypervisor H*, machine-level Zxm*, etc. + 3 = non-standard X* + key1/key2: for ordering within category + """ + # normalize + e = ext.strip() + # Remove version suffixes (e.g., p0, p1p2, digits) for ordering only + e_base = re.sub(r'[0-9pP].*$', '', e) + # Single-letter standard? + if len(e_base) == 1 and e_base.upper() in SINGLE_ORDER: + return (0, SINGLE_ORDER.index(e_base.upper()), "") + # Supervisor-level (S*), Hypervisor-level (H*), Machine-level (Zxm*), etc. + if re.match(r'^(S|Sh|Sm|Zxm)', e_base, re.IGNORECASE): + return (2, e_base.lower(), "") + # Z* standard unprivileged + if e_base.startswith("Z"): + # use the letter after Z to map to SINGLE_ORDER index if possible + cat0 = e_base[1].upper() + idx = SINGLE_ORDER.index(cat0) if cat0 in SINGLE_ORDER else ord(cat0) + return (1, idx, e_base.lower()) + # Non-standard X* + if e_base.startswith("X"): + return (3, e_base.lower(), "") + # Unknown / fallback + return (4, e_base.lower(), "") + def compare_ext(a: str, b: str): + ca = ext_category(a) + cb = ext_category(b) + if ca < cb: + return -1 + if ca > cb: + return 1 + # same category — compare category-specific keys + if ca[1] != cb[1]: + return -1 if ca[1] < cb[1] else 1 + # tie-breaker: lex order on base + return -1 if ca[2] < cb[2] else (1 if ca[2] > cb[2] else 0) + return sorted(ext_list, key=cmp_to_key(compare_ext)) + + + def get_isa_extensions_by_rva_profile(rva_profile: str): + RVA20U64 = { + "i", "m", "a", "f", "d", "c", + "zicsr", "zicntr" + # "ziccif", "ziccrse", "ziccamoa", "za128rs", "zicclsm" + } + RVA20S64 = RVA20U64.union({ + "zifencei" + # "ss1p11", "svbare", "sv39", "svade", "ssccptr", + # "sstvecd", "sstvala" + }) + # Don't use 'b' for backward compatibility as it ratified in 2024 + RVA22U64 = RVA20U64.union({ + "zba", "zbb", "zbs", "zihpm", "zihintpause", "zicbom", + "zicbop", "zicboz", "zfhmin", "zkt" + # "za64rs", "zic64b" + }) + RVA22S64 = RVA22U64.union({ + "zifencei", "svpbmt", "svinval" + # "ss1p12", "svbare", "sv39", "svade", "ssccptr", + # "sstvecd", "sstvala", "sscounterenw" + }) + RVA23U64 = RVA22U64.union({ + "v", "zvfhmin", "zvbb", "zvkt", "zihintntl", "zicond", + "zimop", "zcmop", "zcb", "zfa", "zawrs", "supm" + }) + RVA23S64 = RVA23U64.union({ + "zifencei", "svpbmt", "svinval", "sstc", "sscofpmf", + "sha", "h" + # "ss1p13", "ssnpm", "ssu64xl", "ssstateen", "shtvala", + # "shvstvecd", "shvsatpa", "shgatpa" + }) + if rva_profile == "rva20u64": + return DTSGen.sort_isa_extensions(list(RVA20U64)) + elif rva_profile == "rva20s64": + return DTSGen.sort_isa_extensions(list(RVA20S64)) + elif rva_profile == "rva22u64": + return DTSGen.sort_isa_extensions(list(RVA22U64)) + elif rva_profile == "rva22s64": + return DTSGen.sort_isa_extensions(list(RVA22S64)) + elif rva_profile == "rva23u64": + return DTSGen.sort_isa_extensions(list(RVA23U64)) + elif rva_profile == "rva23s64": + return DTSGen.sort_isa_extensions(list(RVA23S64)) + assert False, f"Unknown rva profile string: {rva_profile}" + + def add_device(self, dev_str: str): + self.soc_devices.append(dev_str) + return self + + def gen_dts(self): + compatible_list = ", ".join(f'"{compatible}"' for compatible in self.compatible) + return f""" +/dts-v1/; + +/ {{ + #address-cells = <2>; + #size-cells = <2>; + compatible = {compatible_list}; + model = "{self.model}"; + + chosen {{ +{DTSGen.indent(f'bootargs = {json.dumps(self.bootargs)};', 8) if self.bootargs else ''} +{DTSGen.indent(f'/* ASCII: "{self.rng_seed.decode("ascii", "backslashreplace")}" */\nrng-seed = /bits/ 8 <{" ".join(f"0x{b:02x}" for b in self.rng_seed)}>;', 8) if self.rng_seed else ''} +{DTSGen.indent(self.chosen_properties, 8)} + }}; + +{DTSGen.indent('\n'.join(self.__gen_memory(start, size) for (start, size) in self.memories))} + +{DTSGen.indent(self.__gen_cpus())} + +{DTSGen.indent(self.__gen_clint()) if not self.interrupts_in_soc else ''} + +{DTSGen.indent(self.__gen_plic(ndev=self.plic_ndev)) if not self.interrupts_in_soc else ''} + +{DTSGen.indent(self.__gen_reserved_memory())} + +{DTSGen.indent(self.__gen_soc())} + +{DTSGen.indent(chr(10).join(self.root_nodes))} + +}}; +""".strip() + + +if __name__ == "__main__": + import argparse + parser = argparse.ArgumentParser("DTSGen: Generate Device Tree Source for NEMU Board") + parser.add_argument("--compatible", type=str, nargs='+', default=["xiangshan,nemu-board"], help="Root compatible strings in priority order") + parser.add_argument("--model", type=str, default="XiangShan", help="Root model string") + parser.add_argument("--cpu-compatible", type=str, nargs='+', default=["riscv"], help="CPU compatible strings in priority order") + parser.add_argument("--nr-harts", "-n", type=int, default=1, help="Number of harts") + parser.add_argument("--nemu-sdhci-addr", "-s", type=lambda x: int(x,0), default=None, help="NEMU SDHCI address") + parser.add_argument("--uartlite-addr", type=lambda x: int(x,0), default=0x40600000, help="UARTLite MMIO base address") + parser.add_argument("--reserve-mem", "-r", type=lambda x: int(x,0), nargs=2, action='append', default=[], help="Reserved memory regions, specify as start size pairs (hex 0x... or decimal)") + parser.add_argument("--direct-map-mem", type=lambda x: int(x,0), nargs=2, action='append', default=[], help="Reserved direct-map regions, specify as start size pairs (hex 0x... or decimal)") + parser.add_argument("--isa-extensions", "-i", type=str, nargs='+', default=["i", "m", "a", "f", "d", "c"], help="ISA extensions, e.g., i m a f d c") + parser.add_argument("--rva-profile", "-p", type=str, default="rva20u64", help="rva profile string, e.g., rva20u64, rva22s64, rva23s64") + parser.add_argument("--bootargs", "-b", type=str, default="console=hvc0 earlycon=sbi rdinit=/sbin/init", help="Kernel boot arguments") + parser.add_argument("--memory-size", "-m", type=lambda x: int(x,0), default=8*1024*1024*1024, help="Total memory size in bytes (hex 0x... or decimal)") + parser.add_argument("--mmu-type", type=str, default="riscv,sv39", help="MMU type") + parser.add_argument("--timebase-freq", "-t", type=int, default=10000000, help="Timebase frequency in Hz (default 10 MHz)") + args = parser.parse_args() + isa_exts = set(args.isa_extensions) + if args.rva_profile: + isa_exts.update(set(DTSGen.get_isa_extensions_by_rva_profile(args.rva_profile))) + dtsgen = DTSGen( + compatible=args.compatible, + model=args.model, + cpu_compatibles=args.cpu_compatible, + nr_harts=args.nr_harts, + uartlite_addr=args.uartlite_addr, + nemu_sdhci_addr=args.nemu_sdhci_addr, + isa_extensions=DTSGen.sort_isa_extensions(list(isa_exts)), + bootargs=args.bootargs, + mmu_type=args.mmu_type, + timebase_freq=args.timebase_freq, + memories=[(0x80000000, args.memory_size)] + ) + for start, size in args.reserve_mem: + dtsgen.add_reserved_memory(start, size) + for start, size in args.direct_map_mem: + dtsgen.add_reserved_memory(start, size, name="direct_map", no_map=False) + print(dtsgen.gen_dts()) diff --git a/nemu_board/dts/README.md b/nemu_board/dts/README.md new file mode 100644 index 0000000..0a5e528 --- /dev/null +++ b/nemu_board/dts/README.md @@ -0,0 +1,152 @@ +# 生成 workload-builder 设备树模板 + +`generate-workload-builder-dts.py` 复用本目录的 `DTSGen`，可以独立输出 +workload-builder 使用的 `.dts.in` 模板。当前 workload-builder 构建会通过 +`scripts/generate-nemu-board-dts.py` 自动调用同一个 `DTSGen`，并将模板写入 +`build/generated-dts`。 + +需要 **Python 3.12 或更高版本**（现有 DTSGen 使用 Python 3.12 的 f-string 语法）。 +生成阶段不需要 dtc；workload-builder 构建时仍使用自己的 dtc。 + +## 单核 FPGA：当前 noAIA-novec 配置 + +假设 nemu_board 和 workload-builder 在同一父目录，在 nemu_board 根目录执行： + +```sh +python3 dts/generate-workload-builder-dts.py \ + --profile fpga-noaia-novec \ + --memory-gib 2 \ + --output ../workload-builder/build/generated-dts/generated-fpga-noaia-novec.dts.in + +make -C ../workload-builder linux/coremark \ + DEFAULT_DTB=generated-fpga-noaia-novec +``` + +输出使用新名称，避免覆盖已有模板。将 `--memory-gib` 改为 8、16、24、 +64 等可以生成其他内存容量。声明容量必须与实际目标一致。 + +## QEMU nemu：单核或多核 + +```sh +python3 dts/generate-workload-builder-dts.py \ + --profile qemu-nemu --harts 4 --memory-gib 16 --no-vector \ + --output ../workload-builder/build/generated-dts/generated-qemu-4hart-mem16g-novec.dts.in + +make -C ../workload-builder linux/coremark \ + PLATFORM=qemu MULTIHART=1 HARTS=4 \ + DEFAULT_DTB=generated-qemu-4hart-mem16g-novec +``` + +单核使用 `--harts 1`，构建时使用 `PLATFORM=qemu MULTIHART=0`。 +多核范围为 2..128，生成器与 make 的核数必须一致。 +当前 builder 的多核镜像用于 QEMU checkpoint 流程，因此多核只接受 +`qemu-nemu` profile；不把它标称为已验证的多核 FPGA 启动方案。 + +## NEMU：UARTLite 配置 + +```sh +python3 dts/generate-workload-builder-dts.py \ + --profile nemu --memory-gib 8 \ + --output ../workload-builder/build/generated-dts/generated-nemu-mem8g.dts.in + +make -C ../workload-builder linux/coremark \ + DEFAULT_DTB=generated-nemu-mem8g +``` + +不指定容量时，`nemu` profile 使用现有 `xiangshan.dts.in` 的 128 MiB。 +较大的 workload 需要显式增加内存。 + +## Profile 定义和边界 + +| Profile | 默认内存 | UART | PLIC 中断源 | MMU | 默认 ISA 来源 | +|---|---|---|---|---|---| +| fpga-noaia-novec | 2 GiB | 16550A @ 0x310b0000，无 IRQ | 66 | Sv48 | xiangshan-fpga-noAIA-novec.dts.in | +| qemu-nemu | 2 GiB | 16550A @ 0x310b0000，无 IRQ | 66 | Sv48 | xiangshan-qemu-nemu-mem2g.dts.in | +| nemu | 128 MiB | UARTLite @ 0x40600000，PLIC IRQ 3 | 64 | Sv39 | xiangshan.dts.in | + +所有 profile 使用 DRAM 基地址 0x80000000、CLINT 0x38000000、 +PLIC 0x3c000000 和 1 MHz 时间基准，默认使用 SBI 控制台。 +NEMU profile 保留其源模板的 PLIC S/M context 顺序；另外两个使用 M/S 顺序。 + +ISA 来源固定于 workload-builder 提交 +`aaf4d8bd7d2da5351fc2640c8d61c9d849d69342`，完整来源链接在 +`workload-builder-profiles.json` 中。生成时不联网。 +这些列表是现有模板的声明，不是硬件能力验证结果。FPGA 默认保留 +`smcntrpmf`、`smcdeleg` 等原有声明，不擅自认定目标支持或不支持。 +NEMU 源模板没有结构化列表，其默认列表由原有单字母 ISA 字符串推导。 + +这是接口兼容生成器，不是源模板的逐字复制。FPGA profile 将 CLINT/PLIC、 +PLIC 节点名、SoC compatible、`reg-names` 和 CPU/ISA 属性对齐到现有 FPGA +模板；节点标签、空白和其他描述性属性仍可能不同。NEMU 原模板将 +`next-level-cache` 指向 memory 节点，生成器不复制这一引用。 +FPGA/QEMU 仍描述 64 KiB L1、1 MiB L2 和 48-entry I/D TLB。 +不支持 AIA 节点生成，也不复制 kmh-v2.dtsi 的 PCIe、PMEM 或 EINJ/ERST 节点。 + +## 调整 ISA 和启动配置 + +- FPGA profile 默认使用现有 Kunminghu V3 ISA 声明；传入 + `--isa-config kunminghu-v2` 可切换为 Kunminghu V2。该选项只改变 + CPU ISA 声明，不改变板级拓扑；CBO block-size 属性会按所选扩展列表 + 一并生成或省略。 +- `--isa-extensions i m a f d c zicsr zifencei`：完全替换扩展列表，不与 + RVA profile 合并。此时 legacy ISA 字符串也按该列表生成。 +- `--exclude-isa smcntrpmf smcdeleg`：从默认或自定义列表移除指定扩展， + 同时从 legacy ISA 字符串删除对应声明。 +- `--no-vector`：同时移除 `v` 和所有 `zv*`，保留 `rv64` 前缀。 +- QEMU profile 始终去掉 `sstc`，匹配当前 builder 的 timer 限制。 +- `fpga-noaia-novec` 拒绝向量声明；所有 profile 拒绝 `smaia/ssaia`， + 避免生成与其中断拓扑明显不一致的模板。 +- `--timebase-freq 1000000`：计时基准，单位 Hz，不是 CPU 主频。 +- `--mmu-type riscv,sv48`：覆盖 MMU 类型。 +- `--bootargs "console=hvc0 earlycon=sbi loglevel=8"`：覆盖内核参数。 +- `--memory-size 0x200000000`：按字节指定容量，与 `--memory-gib` 互斥。 +- 省略 `--output` 输出到 stdout；指定路径必须以 `.dts.in` 结尾。 + +除了上述基本一致性检查，生成器不验证所有 ISA 扩展之间的依赖关系。 +内存、计时频率、缓存信息和 ISA 声明仍需与实际 RTL/模拟器配置核对。 + +## 与 builder 的地址契约 + +生成的 chosen 节点包含： + +```dts +linux,initrd-start = ; +linux,initrd-end = ; +``` + +这些是模板占位符，必须由 builder 根据实际内核及 rootfs 大小替换， +不能直接将 .dts.in 交给 dtc 编译。 + +| 项目 | 单核 | 多核 | +|---|---|---| +| GCPT no-map 保留区 | [0x80000000, 0x80100000) | 相同 | +| checkpoint 状态 no-map 保留区 | 无 | [0x80300000, 0x88600000)，131 MiB | +| OpenSBI 地址（builder 放置） | 0x80100000 | 0x80100000 | +| DTB 地址（builder 放置） | 0x80200000 | 0x80200000 | +| 内核地址（builder 放置） | 0x80400000 | 0x88600000 | + +多核保留区大小特意写成 `0x08300000`，兼容现有 builder 的文本检查， +所以无需修改 builder 的 awk 代码。生成器不负责打包或重新计算启动地址。 +使用 workload-builder 已识别的 basename 时，make 会自动生成模板。上面的 +显式命令用于自定义 profile 或 basename；只要模板已存在，builder 会保留 +无法由内置规则识别的自定义 basename。 + +## 验证 + +```sh +python3 -m unittest discover -s dts -p 'test_*.py' -v + +# 安装 dtc/fdtget 后，使用真实 builder 打包脚本执行集成验证： +WORKLOAD_BUILDER=../workload-builder \ + python3 -m unittest discover -s dts -p 'test_*.py' -v +``` + +可通过 `DTC` 和 `FDTGET` 指定工具路径。 +集成测试覆盖 FPGA 单核、NEMU 单核、QEMU 单核、双核和 128 核， +检查 DTB 内存/中断/hart 信息、占位符替换、保留区检查，以及 +GCPT、OpenSBI、DTB、内核、initramfs 的镜像位置和内容。 +测试使用小型标记 payload，不构建真实 Linux，也不验证硬件启动。 + +原有 `DTSGen.py` CLI 保留。公共生成器同时修复了 +`--timebase-freq` 未传入构造函数、保留内存在实例之间共享，以及 +hart ID >= 10 时节点 unit-address 未用十六进制表示的问题。 diff --git a/nemu_board/dts/build_dual_core_for_qemu.sh b/nemu_board/dts/build_dual_core_for_qemu.sh new file mode 100755 index 0000000..a8965f0 --- /dev/null +++ b/nemu_board/dts/build_dual_core_for_qemu.sh @@ -0,0 +1,12 @@ +if [ -z "$(ls -A build)" ]; then + echo "The build directory is empty. Creating the directory..." + mkdir build +fi +python3 DTSGen.py \ + --nr-harts 2 \ + --rva-profile rva23s64 \ + --bootargs "console=hvc0 earlycon=sbi" \ + -r 0x80000000 0x100000 \ + -r 0x80300000 0x1400000 \ + --mmu-type riscv,sv48 | \ +dtc -O dtb -o build/xiangshan_dualcore.dtb - diff --git a/nemu_board/dts/build_eight_core_for_qemu.sh b/nemu_board/dts/build_eight_core_for_qemu.sh new file mode 100755 index 0000000..4406733 --- /dev/null +++ b/nemu_board/dts/build_eight_core_for_qemu.sh @@ -0,0 +1,12 @@ +if [ -z "$(ls -A build)" ]; then + echo "The build directory is empty. Creating the directory..." + mkdir build +fi +python3 DTSGen.py \ + --nr-harts 8 \ + --rva-profile rva23s64 \ + --bootargs "console=hvc0 earlycon=sbi" \ + -r 0x80000000 0x100000 \ + -r 0x80300000 0x1400000 \ + --mmu-type riscv,sv48 | \ +dtc -O dtb -o build/xiangshan_eightcore.dtb - diff --git a/nemu_board/dts/build_four_core_for_qemu.sh b/nemu_board/dts/build_four_core_for_qemu.sh new file mode 100755 index 0000000..c51d73b --- /dev/null +++ b/nemu_board/dts/build_four_core_for_qemu.sh @@ -0,0 +1,12 @@ +if [ -z "$(ls -A build)" ]; then + echo "The build directory is empty. Creating the directory..." + mkdir build +fi +python3 DTSGen.py \ + --nr-harts 4 \ + --rva-profile rva23s64 \ + --bootargs "console=hvc0 earlycon=sbi" \ + -r 0x80000000 0x100000 \ + -r 0x80300000 0x1400000 \ + --mmu-type riscv,sv48 | \ +dtc -O dtb -o build/xiangshan_fourcore.dtb - diff --git a/nemu_board/dts/build_single_core_for_nemu.sh b/nemu_board/dts/build_single_core_for_nemu.sh new file mode 100755 index 0000000..4784fe6 --- /dev/null +++ b/nemu_board/dts/build_single_core_for_nemu.sh @@ -0,0 +1,11 @@ +if [ -z "$(ls -A build)" ]; then + echo "The build directory is empty. Creating the directory..." + mkdir build +fi +python3 DTSGen.py \ + --nr-harts 1 \ + --nemu-sdhci-addr 0x40002000 \ + --rva-profile rva23s64 \ + --bootargs "console=hvc0 earlycon=sbi" \ + --mmu-type riscv,sv48 | \ +dtc -O dtb -o build/xiangshan.dtb - diff --git a/nemu_board/dts/build_sixteen_core_for_qemu.sh b/nemu_board/dts/build_sixteen_core_for_qemu.sh new file mode 100755 index 0000000..f97863e --- /dev/null +++ b/nemu_board/dts/build_sixteen_core_for_qemu.sh @@ -0,0 +1,12 @@ +if [ -z "$(ls -A build)" ]; then + echo "The build directory is empty. Creating the directory..." + mkdir build +fi +python3 DTSGen.py \ + --nr-harts 16 \ + --rva-profile rva23s64 \ + --bootargs "console=hvc0 earlycon=sbi" \ + -r 0x80000000 0x100000 \ + -r 0x80300000 0x1400000 \ + --mmu-type riscv,sv48 | \ +dtc -O dtb -o build/xiangshan_sixteencore.dtb - diff --git a/nemu_board/dts/generate-workload-builder-dts.py b/nemu_board/dts/generate-workload-builder-dts.py new file mode 100644 index 0000000..4386059 --- /dev/null +++ b/nemu_board/dts/generate-workload-builder-dts.py @@ -0,0 +1,203 @@ +#!/usr/bin/env python3 +"""Generate a workload-builder .dts.in template (not a compiled DTB).""" + +import argparse +import json +import re +from pathlib import Path + +from DTSGen import DTSGen + + +PROFILES = Path(__file__).with_name("workload-builder-profiles.json") +DRAM_BASE = 0x80000000 +CHECKPOINT_START = 0x80300000 +CHECKPOINT_SIZE = 0x08300000 + + +def positive_int(value): + number = int(value, 0) + if number <= 0: + raise argparse.ArgumentTypeError("must be greater than zero") + return number + + +def render(args): + profile = json.loads(PROFILES.read_text())[args.profile] + isa_config = profile + if args.isa_config: + if args.profile != "fpga-noaia-novec": + raise ValueError("--isa-config is supported by the FPGA profile only") + if args.isa_config != "kunminghu-v3": + isa_config = profile["isa_configs"][args.isa_config] + if not 1 <= args.harts <= 128: + raise ValueError("--harts must be in 1..128") + if args.harts > 1 and args.profile != "qemu-nemu": + raise ValueError("workload-builder multi-hart firmware requires --profile qemu-nemu") + size = args.memory_size or profile["memory_size"] + minimum = 0x08600000 if args.harts > 1 else 0x00400000 + if size <= minimum or size > (1 << 64) - DRAM_BASE: + raise ValueError("memory must contain the boot layout and fit in the 64-bit address space") + + isa = list(dict.fromkeys(args.isa_extensions or isa_config["isa_extensions"])) + if any(not re.fullmatch(r"[a-z][a-z0-9]*", ext) for ext in isa): + raise ValueError("ISA extensions must be lowercase extension names") + removed = set(args.exclude_isa) + if args.no_vector: + removed.add("v") + removed.update(ext for ext in isa if ext == "v" or ext.startswith("zv")) + # Match workload-builder's QEMU nemu timer restrictions. + if args.profile == "qemu-nemu": + removed.add("sstc") + isa = [ext for ext in isa if ext not in removed] + if "i" not in isa: + raise ValueError("the RV64 generator requires the i base extension") + if {"smaia", "ssaia"} & set(isa): + raise ValueError("these profiles describe CLINT + PLIC, not AIA") + if "v" not in isa and any(ext.startswith("zv") for ext in isa): + raise ValueError("use --no-vector to remove both v and its vector extensions") + if args.profile == "fpga-noaia-novec" and ( + "v" in isa or any(ext.startswith("zv") for ext in isa)): + raise ValueError("fpga-noaia-novec cannot advertise vector extensions") + + # Preserve the source template's legacy ISA string unless overridden. + if args.isa_extensions is None: + parts = isa_config["legacy_isa"].split("_") + base = parts[0][4:] # Do not remove the v in the rv64 prefix. + for ext in removed: + if len(ext) == 1: + base = base.replace(ext, "") + legacy_isa = "_".join(["rv64" + base] + [ext for ext in parts[1:] if ext not in removed]) + else: + legacy_isa = "rv64" + "".join(ext for ext in "imafdcbvh" if ext in isa) + legacy_isa += "".join("_" + ext for ext in isa if len(ext) > 1) + + nemu = args.profile == "nemu" + fpga = args.profile == "fpga-noaia-novec" + chosen = """linux,initrd-start = ; +linux,initrd-end = ;""" + if not nemu: + chosen += """ +stdout-path = "serial0:115200n8"; +opensbi-config { + compatible = "opensbi,config"; + cold-boot-harts = <&cpu0>; +};""" + cache_size, cache_sets, tlb_size = (16384, 64, 32) if nemu else (65536, 256, 48) + cpu_properties = 'status = "okay";\nclock-frequency = <0>;' + if fpga: + cpu_properties += f'\ntimebase-frequency = <{args.timebase_freq}>;' + cpu_properties += '\ntlb-split;' + for kind in ("i", "d"): + cpu_properties += f""" +{kind}-cache-block-size = <64>; +{kind}-cache-sets = <{cache_sets}>; +{kind}-cache-size = <{cache_size}>; +{kind}-tlb-sets = <1>; +{kind}-tlb-size = <{tlb_size}>;""" + root_nodes = [] + if not nemu: + cpu_properties += "\nnext-level-cache = <&l2_cache>;" + root_nodes += ['aliases { serial0 = &uart0; };', """l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-block-size = <64>; + cache-size = <1048576>; +};"""] + else: + cpu_properties += "\nriscv,pmpregions = <16>;\nriscv,pmpgranularity = <4096>;" + + gen = DTSGen( + compatible="freechips,rocketchip-unknown-dev", + model={"fpga-noaia-novec": "xiangshan,Kunminghu-dev", + "qemu-nemu": "qemu,nemu", "nemu": "freechips,rocketchip-unknown"}[args.profile], + cpu_compatibles=["UCAS,COOSCA1.0" if nemu else "ICT,xiangshan", "riscv"], + isa_extensions=isa, + legacy_isa=legacy_isa, + nr_harts=args.harts, + mmu_type=args.mmu_type or ("riscv,sv39" if nemu else "riscv,sv48"), + timebase_freq=args.timebase_freq, + memories=[(DRAM_BASE, size)], + reserved_memories=[], + uartlite_addr=0x40600000 if nemu else None, + plic_ndev=64 if nemu else 66, + plic_machine_first=not nemu, + cpu_properties=cpu_properties, + chosen_properties=chosen, + root_nodes=root_nodes, + cache_block_operations=["zicbom", "zicboz"] if fpga else None, + interrupts_in_soc=fpga, + soc_compatible=( + ["freechips,rocketchip-unknown-soc", "simple-bus"] + if fpga else "simple-bus"), + plic_node_name="interrupt-controller" if fpga else "plic", + interrupt_reg_names="control" if fpga else None, + bootargs=args.bootargs if args.bootargs is not None else ( + "console=hvc0 earlycon=sbi loglevel=8" if args.profile == "fpga-noaia-novec" + else "console=hvc0 earlycon=sbi"), + ) + gen.add_reserved_memory(DRAM_BASE, 0x100000, name="gcpt") + if args.harts > 1: + gen.add_reserved_memory(CHECKPOINT_START, CHECKPOINT_SIZE, name="checkpoint") + if not nemu: + gen.add_device("""uart0: serial@310b0000 { + compatible = "ns16550a"; + reg = <0x0 0x310b0000 0x0 0x10000>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <50000000>; + current-speed = <115200>; + status = "okay"; +};""") + if args.profile != "qemu-nemu": + debug_addr = 0 if nemu else 0x38020000 + gen.add_device(f"""debug-controller@{debug_addr:x} {{ + compatible = "sifive,debug-013", "riscv,debug-013"; + reg = <0x0 0x{debug_addr:x} 0x0 0x1000>; + reg-names = "control"; + interrupts-extended = <&cpu0_intc 65535>; + {'debug-attach = "jtag";' if not nemu else ''} +}};""") + # workload-builder aaf4d8b validates this field textually with awk. + # Keep its exact spelling, even though the unpadded value is equivalent. + dts = gen.gen_dts().replace( + "reg = <0x0 0x80300000 0x0 0x8300000>;", + "reg = <0x0 0x80300000 0x0 0x08300000>;") + return "/* Generated by nemu_board for workload-builder. */\n" + dts + "\n" + + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument("--profile", choices=["fpga-noaia-novec", "qemu-nemu", "nemu"], + default="fpga-noaia-novec") + parser.add_argument("--harts", type=positive_int, default=1) + memory = parser.add_mutually_exclusive_group() + memory.add_argument("--memory-gib", type=positive_int) + memory.add_argument("--memory-size", type=positive_int, help="Bytes, decimal or 0x-prefixed") + parser.add_argument("--timebase-freq", type=positive_int, default=1000000) + parser.add_argument("--mmu-type", choices=["riscv,sv39", "riscv,sv48", "riscv,sv57"]) + parser.add_argument("--bootargs") + parser.add_argument("--isa-config", choices=["kunminghu-v3", "kunminghu-v2"], + help="Named FPGA ISA declaration (default: kunminghu-v3)") + parser.add_argument("--isa-extensions", nargs="+", help="Replace the profile's ISA list") + parser.add_argument("--exclude-isa", nargs="+", default=[], help="Remove exact extension names") + parser.add_argument("--no-vector", action="store_true", help="Remove v and all zv* declarations") + parser.add_argument("--output", "-o", type=Path, help=".dts.in path; otherwise write to stdout") + args = parser.parse_args() + if args.memory_gib is not None: + args.memory_size = args.memory_gib << 30 + if args.output and not args.output.name.endswith(".dts.in"): + parser.error("--output must end in .dts.in (output contains initramfs placeholders)") + try: + output = render(args) + if args.output: + args.output.parent.mkdir(parents=True, exist_ok=True) + args.output.write_text(output) + else: + print(output, end="") + except (ValueError, OSError) as exc: + parser.error(str(exc)) + + +if __name__ == "__main__": + main() diff --git a/nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in b/nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in new file mode 100644 index 0000000..e0a0ebd --- /dev/null +++ b/nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in @@ -0,0 +1,155 @@ +/* Generated by nemu_board for workload-builder. */ +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "freechips,rocketchip-unknown-dev"; + model = "qemu,nemu"; + + chosen { + bootargs = "console=hvc0 earlycon=sbi"; + rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; + linux,initrd-start = ; + linux,initrd-end = ; + stdout-path = "serial0:115200n8"; + opensbi-config { + compatible = "opensbi,config"; + cold-boot-harts = <&cpu0>; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x4 0x0>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <1000000>; + + cpu0: cpu@0 { + compatible = "ICT,xiangshan", "riscv"; + device_type = "cpu"; + mmu-type = "riscv,sv48"; + reg = <0>; + riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"; + status = "okay"; + clock-frequency = <0>; + tlb-split; + i-cache-block-size = <64>; + i-cache-sets = <256>; + i-cache-size = <65536>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + d-cache-block-size = <64>; + d-cache-sets = <256>; + d-cache-size = <65536>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + next-level-cache = <&l2_cache>; + + cpu0_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + + cpu1: cpu@1 { + compatible = "ICT,xiangshan", "riscv"; + device_type = "cpu"; + mmu-type = "riscv,sv48"; + reg = <1>; + riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"; + status = "okay"; + clock-frequency = <0>; + tlb-split; + i-cache-block-size = <64>; + i-cache-sets = <256>; + i-cache-size = <65536>; + i-tlb-sets = <1>; + i-tlb-size = <48>; + d-cache-block-size = <64>; + d-cache-sets = <256>; + d-cache-size = <65536>; + d-tlb-sets = <1>; + d-tlb-size = <48>; + next-level-cache = <&l2_cache>; + + cpu1_intc: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + + }; + + clint: clint@38000000 { + compatible = "riscv,clint0"; + reg = <0x0 0x38000000 0x0 0x10000>; + + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, + <&cpu1_intc 3>, <&cpu1_intc 7>; + }; + + plic: plic@3c000000 { + compatible = "riscv,plic0"; + reg = <0x0 0x3c000000 0x0 0x4000000>; + + #interrupt-cells = <1>; + interrupt-controller; + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>, + <&cpu1_intc 11>, <&cpu1_intc 9>; + riscv,max-priority = <7>; + riscv,ndev = <66>; + }; + + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + gcpt@80000000 { + reg = <0x0 0x80000000 0x0 0x100000>; + no-map; + }; + checkpoint@80300000 { + reg = <0x0 0x80300000 0x0 0x08300000>; + no-map; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + uart0: serial@310b0000 { + compatible = "ns16550a"; + reg = <0x0 0x310b0000 0x0 0x10000>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <50000000>; + current-speed = <115200>; + status = "okay"; + }; + + }; + + aliases { serial0 = &uart0; }; + l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-block-size = <64>; + cache-size = <1048576>; + }; + +}; diff --git a/nemu_board/dts/test_workload_builder.py b/nemu_board/dts/test_workload_builder.py new file mode 100644 index 0000000..90ab5bf --- /dev/null +++ b/nemu_board/dts/test_workload_builder.py @@ -0,0 +1,360 @@ +"""Run: python3 -m unittest discover -s dts -p 'test_*.py' -v. + +Set WORKLOAD_BUILDER to a checkout and DTC/FDTGET for firmware integration. +""" +import os +from pathlib import Path +import re +import shutil +import subprocess +import sys +import tempfile +import unittest + +from DTSGen import DTSGen + +HERE = Path(__file__).resolve().parent +DTC = os.environ.get("DTC") or shutil.which("dtc") +FDTGET = os.environ.get("FDTGET") or shutil.which("fdtget") +BUILDER = os.environ.get("WORKLOAD_BUILDER") + + +def generate(*args, check=True): + return subprocess.run([sys.executable, str(HERE / "generate-workload-builder-dts.py"), + *map(str, args)], text=True, capture_output=True, check=check) + + +class GeneratorTests(unittest.TestCase): + def test_reservations_do_not_leak_between_instances(self): + first = DTSGen() + first.add_reserved_memory(0x80000000, 0x100000) + self.assertNotIn("reserved-memory", DTSGen().gen_dts()) + + def test_generated_rng_seed_is_annotated(self): + self.assertIn('/* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */', + DTSGen().gen_dts()) + + def test_existing_cli_timebase_is_applied(self): + result = subprocess.run([sys.executable, str(HERE / "DTSGen.py"), + "--timebase-freq", "1000000"], + check=True, text=True, capture_output=True) + self.assertIn("timebase-frequency = <1000000>;", result.stdout) + + def test_vector_filter_preserves_rv64_prefix(self): + text = generate("--profile", "qemu-nemu", "--no-vector").stdout + self.assertRegex(text, r'riscv,isa = "rv64imafdch_') + self.assertNotRegex(text, r'"(?:v|zv[^"]*)"') + self.assertNotIn("sstc", text) + + def test_isa_override_is_replacement(self): + text = generate("--isa-extensions", "i", "m", "a", "zicsr").stdout + self.assertIn('riscv,isa-extensions = "i", "m", "a", "zicsr";', text) + self.assertNotIn('"smcntrpmf"', text) + + def test_kunminghu_isa_configs(self): + default = generate().stdout + self.assertIn( + 'riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_' + 'svpbmt_sdtrig_smcsrind_sscsrind_svade";', default) + + v2 = generate("--isa-config", "kunminghu-v2").stdout + self.assertIn( + 'riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_' + 'svpbmt_sdtrig_smcsrind_sscsrind_svade";', v2) + self.assertIn('riscv,isa-base = "rv64i";', v2) + value = re.search(r"riscv,isa-extensions = (?P.*?);", v2, re.DOTALL)["value"] + self.assertEqual(re.findall(r'"([^"]+)"', value), """ + i m a f d c h sdtrig sha shcounterenw shgatpa shlcofideleg + shtvala shvsatpa shvstvala shvstvecd smcsrind smdbltrp smmpm + smnpm smstateen ss1p13 ssccptr sscofpmf sscounterenw sscsrind + ssdbltrp ssnpm sspm ssstateen ssstrict sstc sstvala sstvecd + ssu64xl supm sv39 sv48 svade svbare svinval svnapot svpbmt + za64rs zacas zawrs zba zbb zbc zbkb zbkc zbkx zbs zca zcb + zcmop zfa zfh zfhmin zic64b ziccamoa ziccif zicclsm ziccrse + zicntr zicond zicsr zifencei zihintntl zihintpause zihpm zimop + zkn zknd zkne zknh zksed zksh zkt + """.split()) + + def test_invalid_configs_fail(self): + for args in [ + ("--harts", "129"), ("--harts", "2"), + ("--profile", "nemu", "--harts", "2"), + ("--memory-size", "0"), + ("--profile", "nemu", "--memory-size", "0x400000"), + ("--profile", "qemu-nemu", "--harts", "2", "--memory-size", "0x8600000"), + ("--isa-extensions", "i", "smaia"), + ("--isa-extensions", "i", "zvbb"), + ("--isa-extensions", "i", "v"), + ("--profile", "nemu", "--isa-config", "kunminghu-v2"), + ("--exclude-isa", "i"), ("--output", "wrong.dtb"), + ]: + with self.subTest(args=args): + result = generate(*args, check=False) + self.assertNotEqual(result.returncode, 0) + self.assertEqual(result.stdout, "") + + @unittest.skipUnless(BUILDER, "WORKLOAD_BUILDER not set") + def test_builder_wrapper_generation(self): + script = Path(BUILDER) / "scripts/generate-nemu-board-dts.py" + with tempfile.TemporaryDirectory() as tmp: + root = Path(tmp) + for name, has_checkpoint in [ + ("xiangshan-qemu-nemu-mem2g", False), + ("xiangshan-qemu-nemu-2hart-mem16g", True), + ]: + with self.subTest(name=name): + output = root / f"{name}.dts.in" + subprocess.run([sys.executable, str(script), "--name", name, + "--output", str(output)], check=True) + text = output.read_text() + checkpoint = re.search( + r"checkpoint@80300000\s*\{(?P.*?)\};", text, re.DOTALL) + self.assertEqual(checkpoint is not None, has_checkpoint) + if checkpoint: + self.assertIn( + "reg = <0x0 0x80300000 0x0 0x08300000>;", + checkpoint["body"]) + self.assertIn("no-map;", checkpoint["body"]) + + fpga_name = "xiangshan-fpga-noAIA-mem16g-novec" + v3 = root / "v3.dts.in" + subprocess.run([sys.executable, str(script), "--name", fpga_name, + "--output", str(v3)], check=True) + explicit_v3 = root / "explicit-v3.dts.in" + subprocess.run([sys.executable, str(script), "--name", fpga_name, + "--output", str(explicit_v3), + "--isa-config", "kunminghu-v3"], check=True) + self.assertEqual(v3.read_text(), explicit_v3.read_text()) + + v2 = root / "v2.dts.in" + subprocess.run([sys.executable, str(script), "--name", fpga_name, + "--output", str(v2), + "--isa-config", "kunminghu-v2"], check=True) + v2_text = v2.read_text() + self.assertIn('riscv,isa = "rv64imafdch_', v2_text) + self.assertIn('"ss1p13"', v2_text) + self.assertNotIn('"v"', v2_text) + + vector_v2 = root / "vector-v2.dts.in" + subprocess.run([ + sys.executable, str(script), "--name", "xiangshan-fpga-noAIA-mem16g", + "--output", str(vector_v2), "--isa-config", "kunminghu-v2", + ], check=True) + self.assertIn('riscv,isa = "rv64imafdcvh_', vector_v2.read_text()) + self.assertIn('"v"', vector_v2.read_text()) + + invalid_profile = subprocess.run([ + sys.executable, str(script), "--name", "xiangshan-qemu-nemu-mem2g", + "--output", str(root / "qemu-v2.dts.in"), + "--isa-config", "kunminghu-v2", + ], text=True, capture_output=True) + self.assertNotEqual(invalid_profile.returncode, 0) + self.assertIn("--isa-config is supported by the FPGA noAIA profile only", + invalid_profile.stderr) + + custom = root / "custom.dts.in" + custom.write_text("custom template\n") + subprocess.run([ + sys.executable, str(script), "--name", "custom", + "--output", str(custom), "--isa-config", "kunminghu-v2", + "--preserve-existing-unsupported", + ], check=True) + self.assertEqual(custom.read_text(), "custom template\n") + + missing = root / "missing.dts.in" + result = subprocess.run([ + sys.executable, str(script), "--name", "missing", + "--output", str(missing), "--preserve-existing-unsupported", + ], text=True, capture_output=True) + self.assertNotEqual(result.returncode, 0) + self.assertIn("unsupported DTS basename: missing", result.stderr) + + custom_dir = root / "dts" + custom_dir.mkdir() + (custom_dir / "vendor-board.dts.in").write_text("vendor template\n") + copied = root / "vendor-board.dts.in" + subprocess.run([ + sys.executable, str(script), "--name", "vendor-board", + "--output", str(copied), "--custom-template-dir", str(custom_dir), + ], check=True) + self.assertEqual(copied.read_text(), "vendor template\n") + + absent_dir = root / "absent-dts" / "absent-board.dts.in" + absent = subprocess.run([ + sys.executable, str(script), "--name", "absent-board", + "--output", str(absent_dir), "--custom-template-dir", + str(custom_dir), + ], text=True, capture_output=True) + self.assertNotEqual(absent.returncode, 0) + self.assertFalse(absent_dir.exists()) + + recognized = root / "xiangshan.dts.in" + recognized.write_text("stale generated template\n") + subprocess.run([ + sys.executable, str(script), "--name", "xiangshan", + "--output", str(recognized), "--preserve-existing-unsupported", + ], check=True) + self.assertTrue(recognized.read_text().startswith( + "/* Generated by nemu_board for workload-builder. */")) + + @unittest.skipUnless(BUILDER, "WORKLOAD_BUILDER not set") + def test_fpga_isa_matches_existing_template(self): + original = (Path(BUILDER) / "dts/xiangshan-fpga-noAIA-novec.dts.in").read_text() + output = generate().stdout + def extensions(text): + value = re.search(r"riscv,isa-extensions\s*=([^;]+);", text)[1] + return set(re.findall(r'"([^"]+)"', value)) + self.assertEqual(extensions(original), extensions(output)) + self.assertEqual(re.search(r'riscv,isa = "[^"]+";', original)[0], + re.search(r'riscv,isa = "[^"]+";', output)[0]) + self.assertNotIn("riscv,cbop-block-size", output) + self.assertIn("timebase-frequency = <1000000>;", output) + soc = re.search(r" soc \{\n(?P.*)\n \};", output, re.DOTALL)["body"] + self.assertIn('compatible = "freechips,rocketchip-unknown-soc", "simple-bus";', soc) + self.assertIn("clint: clint@38000000", soc) + self.assertIn("plic: interrupt-controller@3c000000", soc) + self.assertEqual(soc.count('reg-names = "control";'), 3) + + @unittest.skipUnless(DTC and FDTGET and BUILDER, "DTC, FDTGET and WORKLOAD_BUILDER required") + def test_builder_isa_config_reaches_packed_dtb(self): + name = "xiangshan-fpga-noAIA-mem16g-novec" + dtbs = {} + for isa_config, expected, absent in [ + (None, "zicbom", "zca"), + ("kunminghu-v3", "zicbom", "zca"), + ("kunminghu-v2", "zca", "zicbom")]: + with self.subTest(isa_config=isa_config), tempfile.TemporaryDirectory() as tmp: + root = Path(tmp) + templates = root / "templates" + gcpt, kernel = root / "gcpt.bin", root / "Image" + gcpt.write_bytes(b"GCPT" * 16) + kernel.write_bytes(b"KERNEL" * 1024) + sbi_dir = root / "sbi" + sbi = sbi_dir / "build/platform/generic/firmware/fw_jump.bin" + sbi.parent.mkdir(parents=True) + sbi.write_bytes(b"SBI" * 128) + workload = root / "workload" + workload.mkdir() + (workload / "rootfs.cpio").write_bytes(b"INITRAMFS" * 1024) + env = dict(os.environ, DTC=str(DTC), DEFAULT_DTB=name, + MULTIHART="0", HARTS="1") + for key in ("DTB_MEMORY_PROFILE", "DTB_MIN_MEMORY_BYTES", + "DTB_REQUIRED_MIN_MEMORY_BYTES", "FIRMWARE_OUTPUT"): + env.pop(key, None) + if isa_config: + env["DTS_ISA_CONFIG"] = isa_config + else: + env.pop("DTS_ISA_CONFIG", None) + packed = subprocess.run( + ["bash", str(Path(BUILDER) / "scripts/build-firmware-linux.sh"), + str(gcpt), str(sbi_dir), str(templates), str(kernel), str(workload)], + env=env, text=True, capture_output=True) + self.assertEqual(packed.returncode, 0, packed.stderr) + dtb = workload / "dt" / f"{name}.dtb" + extensions = subprocess.check_output( + [str(FDTGET), str(dtb), "/cpus/cpu@0", "riscv,isa-extensions"], + text=True).split() + self.assertIn(expected, extensions) + self.assertNotIn(absent, extensions) + dtbs[isa_config] = dtb.read_bytes() + self.assertEqual(dtbs[None], dtbs["kunminghu-v3"]) + self.assertNotEqual(dtbs[None], dtbs["kunminghu-v2"]) + + @unittest.skipUnless(DTC and FDTGET and BUILDER, "DTC, FDTGET and WORKLOAD_BUILDER required") + def test_real_builder_packs_generated_templates(self): + for profile, harts, memory_gib in [ + ("fpga-noaia-novec", 1, 2), ("nemu", 1, None), + ("qemu-nemu", 1, 8), ("qemu-nemu", 2, 16), ("qemu-nemu", 128, 64), + ]: + with self.subTest(profile=profile, harts=harts), tempfile.TemporaryDirectory() as tmp: + root = Path(tmp) + templates = root / "templates" + args = ["--profile", profile, "--harts", harts, + "--output", templates / "generated.dts.in"] + if memory_gib: + args += ["--memory-gib", memory_gib] + generate(*args) + # Distinct small payloads exercise packaging, not CPU execution. + gcpt, kernel = root / "gcpt.bin", root / "Image" + gcpt.write_bytes(b"GCPT" * 16) + kernel.write_bytes(b"KERNEL" * 1024) + sbi_dir = root / "sbi" + sbi = sbi_dir / "build/platform/generic/firmware/fw_jump.bin" + sbi.parent.mkdir(parents=True) + sbi.write_bytes(b"SBI" * 128) + workload = root / "workload" + workload.mkdir() + initrd = workload / "rootfs.cpio" + initrd.write_bytes(b"INITRAMFS" * 1024) + env = dict(os.environ, DTC=str(DTC), DEFAULT_DTB="generated", + MULTIHART="1" if harts > 1 else "0", HARTS=str(harts)) + for key in ("DTB_MEMORY_PROFILE", "DTB_MIN_MEMORY_BYTES", + "DTB_REQUIRED_MIN_MEMORY_BYTES", "FIRMWARE_OUTPUT"): + env.pop(key, None) + packed = subprocess.run( + ["bash", str(Path(BUILDER) / "scripts/build-firmware-linux.sh"), + str(gcpt), str(sbi_dir), str(templates), str(kernel), str(workload)], + env=env, text=True, capture_output=True) + self.assertEqual(packed.returncode, 0, packed.stderr) + dtb = workload / "dt/generated.dtb" + def prop(node, name): + value = subprocess.check_output( + [str(FDTGET), "-t", "x", str(dtb), node, name], text=True) + return [int(cell, 16) for cell in value.split()] + self.assertEqual(prop("/cpus", "timebase-frequency"), [1000000]) + size = (memory_gib << 30) if memory_gib else (128 << 20) + self.assertEqual(prop("/memory@80000000", "reg"), + [0, 0x80000000, size >> 32, size & 0xffffffff]) + cpus = subprocess.check_output( + [str(FDTGET), "-l", str(dtb), "/cpus"], text=True).split() + self.assertEqual(len(cpus), harts) + self.assertEqual(prop(f"/cpus/cpu@{harts - 1:x}", "reg"), [harts - 1]) + interrupt_parent = "/soc/" if profile == "fpga-noaia-novec" else "/" + plic_name = ("interrupt-controller@3c000000" + if profile == "fpga-noaia-novec" else "plic@3c000000") + for name, irqs in (("clint@38000000", (3, 7)), (plic_name, (11, 9))): + actual = prop(interrupt_parent + name, "interrupts-extended") + if name.startswith("plic") and profile == "nemu": + irqs = (9, 11) + self.assertEqual(actual[1::2], list(irqs) * harts) + expected_handles = [] + for hart in range(harts): + handle = prop(f"/cpus/cpu@{hart:x}/interrupt-controller", "phandle")[0] + expected_handles.extend([handle, handle]) + self.assertEqual(actual[0::2], expected_handles) + if profile == "fpga-noaia-novec": + def strings(node, name): + value = subprocess.check_output( + [str(FDTGET), str(dtb), node, name], text=True) + return value.split() + self.assertEqual(strings("/soc", "compatible"), + ["freechips,rocketchip-unknown-soc", "simple-bus"]) + self.assertEqual(strings("/soc/clint@38000000", "reg-names"), + ["control"]) + self.assertEqual(strings( + "/soc/interrupt-controller@3c000000", "reg-names"), + ["control"]) + self.assertEqual(prop("/cpus/cpu@0", "timebase-frequency"), + [1000000]) + if harts > 1: + self.assertEqual(prop("/reserved-memory/checkpoint@80300000", "reg"), + [0, 0x80300000, 0, 0x8300000]) + start = prop("/chosen", "linux,initrd-start") + end = prop("/chosen", "linux,initrd-end") + initrd_start = (start[0] << 32) | start[1] + initrd_end = (end[0] << 32) | end[1] + self.assertEqual(initrd_end - initrd_start, initrd.stat().st_size) + with (workload / "fw_payload.bin").open("rb") as image: + self.assertEqual(image.read(gcpt.stat().st_size), gcpt.read_bytes()) + image.seek(1024 * 1024) + self.assertEqual(image.read(sbi.stat().st_size), sbi.read_bytes()) + image.seek(2048 * 1024) + self.assertEqual(image.read(dtb.stat().st_size), dtb.read_bytes()) + image.seek(0x08600000 if harts > 1 else 0x00400000) + self.assertEqual(image.read(kernel.stat().st_size), kernel.read_bytes()) + image.seek(initrd_start - 0x80000000) + self.assertEqual(image.read(), initrd.read_bytes()) + + +if __name__ == "__main__": + unittest.main() diff --git a/nemu_board/dts/workload-builder-profiles.json b/nemu_board/dts/workload-builder-profiles.json new file mode 100644 index 0000000..ba39e15 --- /dev/null +++ b/nemu_board/dts/workload-builder-profiles.json @@ -0,0 +1,226 @@ +{ + "fpga-noaia-novec": { + "source": "https://github.com/OpenXiangShan/workload-builder/blob/aaf4d8bd7d2da5351fc2640c8d61c9d849d69342/dts/xiangshan-fpga-noAIA-novec.dts.in", + "memory_size": 2147483648, + "isa_extensions": [ + "i", + "m", + "a", + "f", + "d", + "c", + "b", + "h", + "sdext", + "sdtrig", + "sha", + "shcounterenw", + "shgatpa", + "shlcofideleg", + "shtvala", + "shvsatpa", + "shvstvala", + "shvstvecd", + "smcdeleg", + "smcntrpmf", + "smcsrind", + "smdbltrp", + "smmpm", + "smnpm", + "smstateen", + "ss1p13", + "ssccfg", + "ssccptr", + "sscofpmf", + "sscounterenw", + "sscsrind", + "ssdbltrp", + "ssnpm", + "sspm", + "ssstateen", + "ssstrict", + "sstc", + "sstvala", + "sstvecd", + "ssu64xl", + "supm", + "sv39", + "sv48", + "svade", + "svbare", + "svinval", + "svnapot", + "svpbmt", + "za64rs", + "zacas", + "zama16b", + "zawrs", + "zba", + "zbb", + "zbc", + "zbkb", + "zbkc", + "zbkx", + "zbs", + "zcb", + "zcmop", + "zfa", + "zfh", + "zfhmin", + "zic64b", + "zicbom", + "zicbop", + "zicboz", + "ziccamoa", + "ziccamoc", + "ziccif", + "zicclsm", + "ziccrse", + "zicntr", + "zicond", + "zicsr", + "zifencei", + "zihintntl", + "zihintpause", + "zihpm", + "zimop", + "zkn", + "zknd", + "zkne", + "zknh", + "zksed", + "zksh", + "zkt" + ], + "legacy_isa": "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade", + "isa_configs": { + "kunminghu-v2": { + "isa_extensions": [ + "i", "m", "a", "f", "d", "c", "h", + "sdtrig", "sha", "shcounterenw", "shgatpa", + "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", + "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", + "smstateen", "ss1p13", "ssccptr", "sscofpmf", + "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", + "ssstateen", "ssstrict", "sstc", "sstvala", "sstvecd", + "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", + "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", + "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", + "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", + "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", + "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", + "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt" + ], + "legacy_isa": "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade" + } + } + }, + "qemu-nemu": { + "source": "https://github.com/OpenXiangShan/workload-builder/blob/aaf4d8bd7d2da5351fc2640c8d61c9d849d69342/dts/xiangshan-qemu-nemu-mem2g.dts.in", + "memory_size": 2147483648, + "isa_extensions": [ + "i", + "m", + "a", + "f", + "d", + "c", + "v", + "h", + "sdtrig", + "sha", + "shcounterenw", + "shgatpa", + "shlcofideleg", + "shtvala", + "shvsatpa", + "shvstvala", + "shvstvecd", + "smcsrind", + "smdbltrp", + "smmpm", + "smnpm", + "smstateen", + "ss1p13", + "ssccptr", + "sscofpmf", + "sscounterenw", + "sscsrind", + "ssdbltrp", + "ssnpm", + "sspm", + "ssstateen", + "ssstrict", + "sstvala", + "sstvecd", + "ssu64xl", + "supm", + "sv39", + "sv48", + "svade", + "svbare", + "svinval", + "svnapot", + "svpbmt", + "za64rs", + "zacas", + "zawrs", + "zba", + "zbb", + "zbc", + "zbkb", + "zbkc", + "zbkx", + "zbs", + "zca", + "zcb", + "zcmop", + "zfa", + "zfh", + "zfhmin", + "zic64b", + "ziccamoa", + "ziccif", + "zicclsm", + "ziccrse", + "zicntr", + "zicond", + "zicsr", + "zifencei", + "zihintntl", + "zihintpause", + "zihpm", + "zimop", + "zkn", + "zknd", + "zkne", + "zknh", + "zksed", + "zksh", + "zkt", + "zvbb", + "zvfh", + "zvfhmin", + "zvkt", + "zvl128b", + "zvl32b", + "zvl64b" + ], + "legacy_isa": "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade" + }, + "nemu": { + "source": "https://github.com/OpenXiangShan/workload-builder/blob/aaf4d8bd7d2da5351fc2640c8d61c9d849d69342/dts/xiangshan.dts.in", + "memory_size": 134217728, + "isa_extensions": [ + "i", + "m", + "a", + "f", + "d", + "c", + "h", + "v" + ], + "legacy_isa": "rv64imafdchv" + } +} From 70570447935a0aaf601ca4334061ed8317059e79 Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Fri, 11 Sep 2026 16:20:55 +0800 Subject: [PATCH 07/13] refactor(dts): consolidate generator sources --- Makefile | 4 +- README.md | 34 +- {nemu_board/dts => dts}/DTSGen.py | 0 dts/README.md | 212 +-- .../dts => dts}/build_dual_core_for_qemu.sh | 0 .../dts => dts}/build_eight_core_for_qemu.sh | 0 .../dts => dts}/build_four_core_for_qemu.sh | 0 .../dts => dts}/build_single_core_for_nemu.sh | 0 .../build_sixteen_core_for_qemu.sh | 0 {scripts => dts}/generate-nemu-board-dts.py | 22 +- .../generate-workload-builder-dts.py | 0 dts/nutshell.dts.in | 86 - dts/spike-2core.dts.in | 92 -- dts/spike.dts.in | 75 - .../workload-builder-profiles.json | 0 dts/xiangshan-fpga-AIA-mem16g.dts.in | 209 --- ...gshan-fpga-noAIA-2hart-mem16g-novec.dts.in | 244 --- ...ngshan-fpga-noAIA-2hart-mem8g-novec.dts.in | 245 --- dts/xiangshan-fpga-noAIA-32hart-mem64g.dts.in | 1393 ----------------- dts/xiangshan-fpga-noAIA-mem128g-novec.dts.in | 186 --- dts/xiangshan-fpga-noAIA-mem16g-novec.dts.in | 137 -- dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in | 186 --- dts/xiangshan-fpga-noAIA-mem24g.dts.in | 187 --- dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in | 186 --- dts/xiangshan-fpga-noAIA-mem64g.dts.in | 187 --- dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in | 187 --- dts/xiangshan-fpga-noAIA-mem8g.dts.in | 188 --- dts/xiangshan-fpga-noAIA-novec.dts.in | 187 --- dts/xiangshan-fpga-noAIA.dts.in | 188 --- dts/xiangshan-qemu-nemu-mem24g.dts.in | 142 -- dts/xiangshan-qemu-nemu-mem2g.dts.in | 142 -- dts/xiangshan-qemu-nemu-mem8g.dts.in | 142 -- dts/xiangshan.dts.in | 100 -- dts/yanqihu-2core.dts.in | 129 -- dts/yanqihu.dts.in | 100 -- nemu_board/configs/xiangshan_defconfig | 52 - .../configs/xiangshan_overlay_defconfig | 55 - nemu_board/configs/xiangshanhost_defconfig | 295 ---- nemu_board/dts/README.md | 152 -- .../generated-qemu-2hart-mem16g-novec.dts.in | 155 -- nemu_board/dts/test_workload_builder.py | 360 ----- scripts/dts-config.sh | 8 +- workloads/linux/gapbs/rules.mk | 4 +- workloads/linux/geekbench-common.mk | 2 +- workloads/linux/rocksdb/rules.mk | 4 +- workloads/linux/spec2006/rules.mk | 4 +- workloads/linux/spec2017/rules.mk | 4 +- workloads/linux/spec2026/rules.mk | 4 +- workloads/linux/specjbb2015/rules.mk | 2 +- 49 files changed, 110 insertions(+), 6181 deletions(-) rename {nemu_board/dts => dts}/DTSGen.py (100%) rename {nemu_board/dts => dts}/build_dual_core_for_qemu.sh (100%) rename {nemu_board/dts => dts}/build_eight_core_for_qemu.sh (100%) rename {nemu_board/dts => dts}/build_four_core_for_qemu.sh (100%) rename {nemu_board/dts => dts}/build_single_core_for_nemu.sh (100%) rename {nemu_board/dts => dts}/build_sixteen_core_for_qemu.sh (100%) rename {scripts => dts}/generate-nemu-board-dts.py (94%) rename {nemu_board/dts => dts}/generate-workload-builder-dts.py (100%) delete mode 100644 dts/nutshell.dts.in delete mode 100644 dts/spike-2core.dts.in delete mode 100644 dts/spike.dts.in rename {nemu_board/dts => dts}/workload-builder-profiles.json (100%) delete mode 100644 dts/xiangshan-fpga-AIA-mem16g.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-2hart-mem16g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-2hart-mem8g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-32hart-mem64g.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem128g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem16g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem24g.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem64g.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-mem8g.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA-novec.dts.in delete mode 100644 dts/xiangshan-fpga-noAIA.dts.in delete mode 100644 dts/xiangshan-qemu-nemu-mem24g.dts.in delete mode 100644 dts/xiangshan-qemu-nemu-mem2g.dts.in delete mode 100644 dts/xiangshan-qemu-nemu-mem8g.dts.in delete mode 100644 dts/xiangshan.dts.in delete mode 100644 dts/yanqihu-2core.dts.in delete mode 100644 dts/yanqihu.dts.in delete mode 100644 nemu_board/configs/xiangshan_defconfig delete mode 100644 nemu_board/configs/xiangshan_overlay_defconfig delete mode 100644 nemu_board/configs/xiangshanhost_defconfig delete mode 100644 nemu_board/dts/README.md delete mode 100644 nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in delete mode 100644 nemu_board/dts/test_workload_builder.py diff --git a/Makefile b/Makefile index 3cc01fb..f5218a3 100644 --- a/Makefile +++ b/Makefile @@ -77,8 +77,8 @@ GCPT_SERIAL_PORT ?= $(if $(filter 1,$(MULTIHART)),0x310b0000,) GCPT_DTB_CONFIG_HASH := $(shell printf '%s\n' "$(GCPT_DEFAULT_DTB)" | sha256sum | cut -d ' ' -f 1) GCPT_CONFIG_STAMP := $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint-config/mode.$(GCPT_CONFIGURE_MODE).serial-port.$(GCPT_SERIAL_PORT),build/LibCheckpointAlpha-config/dtb.$(GCPT_DTB_CONFIG_HASH)) GCPT_SOURCES := $(if $(filter 1,$(MULTIHART)),$(shell find $(GCPT_SOURCE_DIR) -path '*/.git' -prune -o -path '*/tests' -prune -o -type f -print 2>/dev/null),$(shell find $(GCPT_SOURCE_DIR) -path '*/.git' -prune -o -type f -print 2>/dev/null)) -GCPT_DTS_SOURCES := scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json \ - $(wildcard dts/$(GCPT_DEFAULT_DTB).dts.in) +GCPT_DTS_SOURCES := dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py \ + dts/DTSGen.py dts/workload-builder-profiles.json $(GCPT_CONFIG_STAMP): mkdir -p "$(@D)" rm -f $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint-config/mode.*,build/LibCheckpointAlpha-config/dtb.*) diff --git a/README.md b/README.md index 7be0f34..1c58f76 100644 --- a/README.md +++ b/README.md @@ -166,10 +166,10 @@ A multi-hart image uses the fixed QEMU checkpoint layout: For OpenSBI, the multi-hart image uses `FW_TEXT_START=0x80100000`, `FW_JUMP_ADDR=0x88600000`, and `FW_JUMP_FDT_ADDR=0x80200000`. -The canonical single-core and multi-hart DTS memory maps, including DRAM -profiles and DTS selection examples, are in [dts/README.md](dts/README.md#single-core-physical-memory-map). +The canonical DTS generator usage, DRAM profiles, and DTS selection examples +are in [dts/README.md](dts/README.md). -For single-core images, the selected DTS is generated by `nemu_board` at build +For single-core images, the selected DTS is generated by the bundled generator at build time and is the source of truth for the DRAM base used by GCPT, OpenSBI, the firmware packer, and the exported manifest, as well as the CLINT address used by GCPT. Its generated DTS and DTB are placed in @@ -287,30 +287,16 @@ Then run `make` to build your new workload. ## Adding a Device Tree -Device-tree templates are generated at build time through -`scripts/generate-nemu-board-dts.py` and `nemu_board/dts/DTSGen.py` into -`build/generated-dts`; `DEFAULT_DTB=device_name` selects the generator profile. -Recognized basenames always use the generated template; the checked-in -`dts/*.dts.in` files are no longer read for them and remain as references. +Device trees are generated from the sources in [dts/README.md](dts/README.md). +Use `DEFAULT_DTB=device_name` to select a built-in generator profile; Make +writes the resulting template to `build/generated-dts` before compiling it. +Unknown basenames are rejected because this repository no longer carries +checked-in custom `.dts.in` templates. For generated `xiangshan-fpga-noAIA*` templates, the default ISA declaration is Kunminghu V3. Select V2 with `DTS_ISA_CONFIG=kunminghu-v2`; the DTB basename -continues to select hart count, memory size, and vector mode. - -For an unsupported custom basename, place the complete template at -`dts/.dts.in` and select it with `DEFAULT_DTB=`. It is copied into -`build/generated-dts` on each build, so it survives cleaning the build tree; a -missing unsupported basename is rejected. - -### `nemu_board` source and co-authors - -The `nemu_board/` directory is vendored as ordinary tracked files from -[OpenXiangShan/nemu_board](https://github.com/OpenXiangShan/nemu_board) at -[commit `15db1e6`](https://github.com/OpenXiangShan/nemu_board/commit/15db1e6cdf4dcbf4cc016cb8938a5f8f35b59faf), -not included as a Git submodule. - -GitHub authors and co-authors represented in the vendored history through that -revision are `chenguokai`, `xyyy1420`, `dzwduan`, `cyyself` and `Gs-ygc`. +continues to select hart count, memory size, and vector mode. See the DTS +README for generator options, validation, provenance, and contributors. Currently, the memory location of the initramfs containing the workload is passed to the kernel by device tree. So for each workload, device tree files are generated from the template on the fly, because the size of the initramfs cannot be known in advance. You should use the parameters `INITRAMFS_BEGIN` and `INITRAMFS_END` in the device tree template. diff --git a/nemu_board/dts/DTSGen.py b/dts/DTSGen.py similarity index 100% rename from nemu_board/dts/DTSGen.py rename to dts/DTSGen.py diff --git a/dts/README.md b/dts/README.md index a03fa0d..43a6f1c 100644 --- a/dts/README.md +++ b/dts/README.md @@ -1,114 +1,47 @@ -# Device Tree Reference Templates - -This directory contains the historical device tree templates for each device -configuration. Firmware builds generate recognized basenames through -`scripts/generate-nemu-board-dts.py` into `build/generated-dts`, so these files -remain only as references for the platform contracts below. Unsupported custom -basenames are read from this directory as `dts/.dts.in` and copied into -`build/generated-dts`, which keeps them outside the build tree. - -## Parameters - -These parameters are replaced with the corresponding values when building the workloads: - -- `INITRAMFS_BEGIN`: Begin address of the initramfs containing the workload. -- `INITRAMFS_END`: End address of the initramfs containing the workload. - -## Device Configurations - -- `xiangshan.dts.in`: This device tree template is for the `riscv64-xs_defconfig` NEMU configuration. -- `yanqihu.dts.in`: This device tree template is for the `riscv64-yanqihu_defconfig` NEMU configuration. -- `nutshell.dts.in`: This device tree template is for the `riscv64-nutshell_defconfig` NEMU configuration. -- `xiangshan-fpga-noAIA-novec.dts.in`: Base XiangShan FPGA DTS without vector extensions. -- `xiangshan-fpga-noAIA-mem8g-novec.dts.in`: XiangShan FPGA DTS without vector extensions, with an 8 GiB memory profile. -- `xiangshan-fpga-noAIA-mem24g-novec.dts.in`: XiangShan FPGA DTS without vector extensions, with a 24 GiB memory profile. -- `xiangshan-fpga-noAIA-mem64g-novec.dts.in`: XiangShan FPGA DTS without vector extensions, with a 64 GiB memory profile. -- `xiangshan-qemu-nemu-mem2g.dts.in`: Single-hart DTS for QEMU's `nemu` - machine, with 2 GiB of memory and a no-IRQ 16550A UART at `0x310b0000`. -- `xiangshan-qemu-nemu-mem8g.dts.in`: The same single-hart QEMU profile with - 8 GiB of memory, used by SPEC2017 rate workloads. -- `xiangshan-qemu-nemu-mem24g.dts.in`: The same single-hart QEMU profile with - 24 GiB of memory, used by SPEC2017 speed workloads. - -Multi-hart XiangShan builds require the user to select a complete DTS basename -with `DEFAULT_DTB`; the build no longer assumes a `mem8g` suffix. For example, -`DEFAULT_DTB=xiangshan-fpga-noAIA-32hart-mem64g` selects -the generated `xiangshan-fpga-noAIA-32hart-mem64g.dts.in`. The complete name -provides the hart and memory profiles; the build does not guess either value. - -## Single-Core Physical Memory Map - -Single-core images use `MULTIHART=0` and LibCheckpointAlpha. They keep the -original compact placement below; the multi-hart checkpoint-state reservation -and the `0x88600000` kernel address do not apply. This table shows the default -`0x80000000` DRAM base: - -| Physical address / range | Size or offset | Assignment | -|-------------------------|----------------|------------| -| `0x80000000–0x800fffff` | 1 MiB | LibCheckpointAlpha checkpoint-recovery program; reserved as `no-map` in the DTS | -| `0x80100000` | +1 MiB | OpenSBI firmware starts here | -| `0x801c0000` | +1.75 MiB | Device tree placed here by firmware assembly | -| `0x80200000` and above | +2 MiB | Linux kernel image, then the MiB-aligned initramfs | - -The single-core firmware packer uses `DTB_OFFSET_KB=1792`, -`SBI_OFFSET_KB=1024`, and `KERNEL_OFFSET_MB=2`. The initramfs address is -computed from the actual kernel size and starts at the next MiB boundary. The -selected single-core DTS supplies the DRAM base and capacity; no fixed 8 GiB or -64 GiB profile is imposed by this layout. - -The `memory` node's first address cell pair is the image's DRAM base. The build -uses it for GCPT, OpenSBI, kernel, initramfs, and manifest placement, and uses -the single `riscv,clint0` node to configure GCPT. - -## Multi-Hart Physical Memory Map - -All `MULTIHART=1` images use the same physical placement, regardless of -the selected DRAM capacity or hart count. The image is loaded at `0x80000000`: - -| Physical range | Size | Assignment | -|----------------|------|------------| -| `0x80000000–0x800fffff` | 1 MiB | LibCheckpoint/GCPT checkpoint-recovery program | -| `0x80100000–0x802fffff` | 2 MiB | OpenSBI firmware; the selected DTB is placed at `0x80200000` | -| `0x80300000–0x885fffff` | 131 MiB | `no-map` checkpoint register-state reservation | -| `0x88600000` and above | — | Linux kernel image, then the MiB-aligned initramfs | - -The checkpoint reservation is `[0x80300000, 0x88600000)`. LibCheckpoint uses -one 1 MiB state slot per hart and currently allocates startup/restore storage -for at most 128 harts. Therefore the build accepts `HARTS=2..128`; the 131 MiB -window includes the slots plus alignment headroom before Linux. - -The kernel address is derived from the OpenSBI placement: - -```text -FW_TEXT_START = 0x80100000 -FW_JUMP_ADDR = 0x88600000 -FW_JUMP_FDT_ADDR = 0x80200000 -``` +# DTS Generator + +This directory is the canonical source for workload-builder device-tree +generation. It contains `DTSGen.py`, the profile generator, the build-facing +basename generator, and profile data. Checked-in `.dts.in` templates are not +required; recognized `DEFAULT_DTB` names are generated into +`build/generated-dts` during the build. + +## Generate A Template -The unified addresses do not force a single DRAM size. The repository's -standard templates retain these profiles: +The profile-oriented CLI is useful when creating a template explicitly: -| Template | DRAM | -|----------|------| -| `xiangshan-fpga-noAIA-2hart-mem8g-novec` | 8 GiB | -| `xiangshan-fpga-noAIA-2hart-mem16g-novec` | 16 GiB | -| `xiangshan-fpga-noAIA-32hart-mem64g` | 64 GiB | +```sh +python3 dts/generate-workload-builder-dts.py \ + --profile fpga-noaia-novec \ + --memory-gib 16 \ + --output /tmp/custom-fpga.dts.in +``` -`xiangshan-fpga-noAIA-mem16g-novec` is the single-hart Host profile for -`virt/linux/*`. It disables AIA and vector advertisement, retains the H -extension required by RISC-V KVM, and describes exactly 16 GiB of DRAM. The -virtual build validates all three properties that affect nesting: one CPU, at -least 16 GiB, and structured ISA extension `h`. +Supported profiles are `fpga-noaia-novec`, `qemu-nemu`, and `nemu`. Use +`--harts 2..128` with `qemu-nemu` for multi-hart output. `--memory-gib` and +`--memory-size` select the DRAM capacity; `--no-vector` removes vector ISA +declarations. This CLI is for inspecting or exporting a profile; Make selects +profiles through `DEFAULT_DTB` and regenerates its own build-tree copy. The +generated file contains `INITRAMFS_BEGIN_*` and +`INITRAMFS_END_*` placeholders and must be processed by the firmware packer +before it is compiled into a DTB. -Select the complete template basename explicitly when building, for example: +The build-facing CLI accepts a complete basename and is what Make invokes: ```sh -make linux/coremark MULTIHART=1 HARTS=2 \ - DEFAULT_DTB=xiangshan-fpga-noAIA-2hart-mem8g-novec +python3 dts/generate-nemu-board-dts.py \ + --name xiangshan-qemu-nemu-2hart-mem16g \ + --output build/generated-dts/xiangshan-qemu-nemu-2hart-mem16g.dts.in ``` -Generated `xiangshan-fpga-noAIA*` templates use the Kunminghu V3 ISA -declaration by default. Select V2 independently of the DTB basename: +Built-in names include the `xiangshan`, `yanqihu`, `nutshell`, and `spike` +profiles, FPGA noAIA names, and QEMU `nemu` names of the form +`[-hart][-memg][-novec]`. Unknown names fail with an +`unsupported DTS basename` error because the repository no longer carries +static custom templates. + +For generated FPGA noAIA names, select the ISA declaration independently of +the basename: ```sh make linux/coremark \ @@ -116,35 +49,44 @@ make linux/coremark \ DTS_ISA_CONFIG=kunminghu-v2 ``` -`DTS_ISA_CONFIG` accepts `kunminghu-v2` and `kunminghu-v3`. The `-novec` -suffix still controls vector advertisement for either version. This selector -does not apply to QEMU/NEMU profiles or supplied custom templates. - -## Build-Time Multi-Hart DTS Generation - -The build invokes `scripts/generate-nemu-board-dts.py` for the selected -`DEFAULT_DTB`. Hart count and memory size are derived from the complete -basename, for example `xiangshan-qemu-nemu-2hart-mem16g-novec`. Supported -multi-hart counts are 2 through 128. Generated multi-hart FPGA and QEMU -templates reserve the fixed 131 MiB checkpoint window -`[0x80300000, 0x88600000)`. - -Built-in FPGA noAIA and QEMU names must match -`[-hart][-memg][-novec]` in that order. Multi-hart names -must explicitly specify memory size; zero memory and hart counts outside -1 through 128 are rejected. Other basenames require a matching template in -`dts/`, even if they start with a known board name. Custom templates are -refreshed from their source on every invocation; a previously generated copy -does not replace a missing source. - -The full capability block describes XiangShan hardware and is not fully -emulated by the current QEMU `nemu` path. In particular, the timer path cannot -execute the DT-advertised `sstc` CSR sequence, so generated multi-hart CPU nodes -omit `sstc`. - -For multi-core firmware, set `HARTS` in the range 2 through 128 to match both -the generated template and the QEMU checkpoint, and select that template -through `DEFAULT_DTB`. Every -multi-hart image uses DTB address `0x80200000` and kernel address -`0x88600000`; the fixed placement keeps the 131 MiB checkpoint window at -`0x80300000` clear of the boot payload. +`DTS_ISA_CONFIG` accepts `kunminghu-v2` and `kunminghu-v3`, with V3 as the +default. The `-novec` suffix still controls vector advertisement. + +## Direct DTSGen CLI + +`DTSGen.py` remains available for low-level generation: + +```sh +python3 dts/DTSGen.py --nr-harts 2 --memory-size 0x400000000 \ + --rva-profile rva23s64 | dtc -O dtb -o build/example.dtb - +``` + +The helper shell scripts in this directory demonstrate common NEMU and QEMU +hart-count configurations. They emit DTBs under `build/` and are independent +of the workload-builder firmware packer. + +## Profiles And Validation + +Profile data is stored in `workload-builder-profiles.json`. The `source` URLs +in that file document the historical workload-builder templates from which +the declarations were derived; generation itself is offline. + +The build invokes the generator and then uses `dtc` to compile the generated +template. This validates DTS generation, DTB compilation, and image assembly; +it does not prove that NEMU, QEMU, or FPGA hardware boots a workload +successfully. + +## Contributors + +The generator incorporates the `DTSGen` implementation and device-tree +conventions from OpenXiangShan's `nemu_board`. The vendored source revision is +commit `15db1e6` of +[`OpenXiangShan/nemu_board`](https://github.com/OpenXiangShan/nemu_board/commit/15db1e6cdf4dcbf4cc016cb8938a5f8f35b59faf). + +GitHub authors and co-authors represented in that revision are: + +- `chenguokai` +- `xyyy1420` +- `dzwduan` +- `cyyself` +- `Gs-ygc` diff --git a/nemu_board/dts/build_dual_core_for_qemu.sh b/dts/build_dual_core_for_qemu.sh similarity index 100% rename from nemu_board/dts/build_dual_core_for_qemu.sh rename to dts/build_dual_core_for_qemu.sh diff --git a/nemu_board/dts/build_eight_core_for_qemu.sh b/dts/build_eight_core_for_qemu.sh similarity index 100% rename from nemu_board/dts/build_eight_core_for_qemu.sh rename to dts/build_eight_core_for_qemu.sh diff --git a/nemu_board/dts/build_four_core_for_qemu.sh b/dts/build_four_core_for_qemu.sh similarity index 100% rename from nemu_board/dts/build_four_core_for_qemu.sh rename to dts/build_four_core_for_qemu.sh diff --git a/nemu_board/dts/build_single_core_for_nemu.sh b/dts/build_single_core_for_nemu.sh similarity index 100% rename from nemu_board/dts/build_single_core_for_nemu.sh rename to dts/build_single_core_for_nemu.sh diff --git a/nemu_board/dts/build_sixteen_core_for_qemu.sh b/dts/build_sixteen_core_for_qemu.sh similarity index 100% rename from nemu_board/dts/build_sixteen_core_for_qemu.sh rename to dts/build_sixteen_core_for_qemu.sh diff --git a/scripts/generate-nemu-board-dts.py b/dts/generate-nemu-board-dts.py similarity index 94% rename from scripts/generate-nemu-board-dts.py rename to dts/generate-nemu-board-dts.py index 0a8cbd5..d898141 100644 --- a/scripts/generate-nemu-board-dts.py +++ b/dts/generate-nemu-board-dts.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -"""Generate workload-builder DTS templates through nemu_board's DTSGen.""" +"""Generate workload-builder DTS templates from the bundled DTS generator.""" import argparse import importlib.util @@ -11,8 +11,8 @@ ROOT = Path(__file__).resolve().parents[1] -NEMU_BOARD_DTSGEN = ROOT / "nemu_board" / "dts" / "DTSGen.py" -PROFILE_FILE = ROOT / "nemu_board" / "dts" / "workload-builder-profiles.json" +NEMU_BOARD_DTSGEN = ROOT / "dts" / "DTSGen.py" +PROFILE_FILE = ROOT / "dts" / "workload-builder-profiles.json" DRAM_BASE = 0x80000000 VECTOR_EXTENSIONS = {"v", "zvbb", "zvfh", "zvfhmin", "zvkt", "zvl128b", "zvl32b", "zvl64b"} @@ -27,14 +27,14 @@ class UnsupportedDTSName(ValueError): def load_dtsgen(): spec = importlib.util.spec_from_file_location("nemu_board_dtsgen", NEMU_BOARD_DTSGEN) if spec is None or spec.loader is None: - raise SystemExit(f"cannot load nemu_board DTSGen.py: {NEMU_BOARD_DTSGEN}") + raise SystemExit(f"cannot load DTSGen.py: {NEMU_BOARD_DTSGEN}") module = importlib.util.module_from_spec(spec) spec.loader.exec_module(module) return module.DTSGen def parse_name(name): - """Recognize complete built-in names; leave other names to custom templates.""" + """Recognize complete built-in names.""" if not re.fullmatch(r"[A-Za-z0-9][A-Za-z0-9_.-]*", name): raise ValueError("--name must be a basename without directory components") fixed = { @@ -352,21 +352,11 @@ def main(): parser.add_argument("--isa-config", choices=["kunminghu-v3", "kunminghu-v2"], default="kunminghu-v3", help="named FPGA noAIA ISA declaration (default: kunminghu-v3)") - parser.add_argument("--custom-template-dir", type=Path, default=None, - help="directory holding user-supplied templates for " - "unsupported basenames") args = parser.parse_args() if not args.output.name.endswith(".dts.in"): parser.error("--output must end in .dts.in") try: - try: - output = render(args.name, args.isa_config) - except UnsupportedDTSName: - custom = (args.custom_template_dir / f"{args.name}.dts.in" - if args.custom_template_dir else None) - if custom is None or not custom.is_file(): - raise - output = custom.read_text(encoding="utf-8") + output = render(args.name, args.isa_config) args.output.parent.mkdir(parents=True, exist_ok=True) with tempfile.NamedTemporaryFile("w", encoding="utf-8", dir=args.output.parent, delete=False) as tmp: diff --git a/nemu_board/dts/generate-workload-builder-dts.py b/dts/generate-workload-builder-dts.py similarity index 100% rename from nemu_board/dts/generate-workload-builder-dts.py rename to dts/generate-workload-builder-dts.py diff --git a/dts/nutshell.dts.in b/dts/nutshell.dts.in deleted file mode 100644 index 204551e..0000000 --- a/dts/nutshell.dts.in +++ /dev/null @@ -1,86 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,xiangshan-kunminghu"; - - soc { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - clint@38000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&CPU0_INTC 0x03 &CPU0_INTC 0x07>; - reg = <0x00 0x38000000 0x00 0x10000>; - reg-names = "control"; - clock-frequency-mhz = <0x1f4>; - }; - - serial@40600000 { - compatible = "xilinx,uartlite", "xlnx,xps-uartlite-1.00.a"; - current-speed = <0x1c200>; - reg = <0x00 0x40600000 0x00 0x1000>; - reg-names = "control"; - }; - }; - - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; - - memory@100000000 { - device_type = "memory"; - reg = <0x00 0x80000000 0x00 0x08000000>; - phandle = <0x02>; - }; - - aliases { - serial0 = "/soc/serial@40600000"; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - timebase-frequency = <0xf4240>; - - cpu@0 { - clock-frequency = <0x00>; - compatible = "UCAS,COOSCA1.0", "riscv"; - d-cache-block-size = <0x40>; - d-cache-sets = <0x40>; - d-cache-size = <0x4000>; - d-tlb-sets = <0x01>; - d-tlb-size = <0x20>; - device_type = "cpu"; - i-cache-block-size = <0x40>; - i-cache-sets = <0x40>; - i-cache-size = <0x4000>; - i-tlb-sets = <0x01>; - i-tlb-size = <0x20>; - mmu-type = "riscv,sv39"; - next-level-cache = <0x02>; - reg = <0x00>; - riscv,isa = "rv64imafdc"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei", "zihpm"; - status = "okay"; - timebase-frequency = <0xf4240>; - tlb-split; - - CPU0_INTC: interrupt-controller { - #address-cells = <0x02>; - #interrupt-cells = <0x01>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; -}; diff --git a/dts/spike-2core.dts.in b/dts/spike-2core.dts.in deleted file mode 100644 index db75e45..0000000 --- a/dts/spike-2core.dts.in +++ /dev/null @@ -1,92 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "ucbbar,spike-bare-dev"; - model = "ucbbar,spike-bare"; - chosen { - stdout-path = &SERIAL0; - bootargs = "console=ttyS0 earlycon"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <10000000>; - CPU0: cpu@0 { - device_type = "cpu"; - reg = <0>; - status = "okay"; - compatible = "riscv"; - riscv,isa = "rv64imafdc_zicntr_zihpm"; - mmu-type = "riscv,sv57"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4>; - clock-frequency = <1000000000>; - CPU0_intc: interrupt-controller { - #address-cells = <2>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - CPU1: cpu@1 { - device_type = "cpu"; - reg = <1>; - status = "okay"; - compatible = "riscv"; - riscv,isa = "rv64imafdc_zicntr_zihpm"; - mmu-type = "riscv,sv57"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4>; - clock-frequency = <1000000000>; - CPU1_intc: interrupt-controller { - #address-cells = <2>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - }; - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x80000000>; - }; - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "ucbbar,spike-bare-soc", "simple-bus"; - ranges; - clint@2000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 &CPU1_intc 3 &CPU1_intc 7 >; - reg = <0x0 0x2000000 0x0 0x10000>; - }; - PLIC: plic@c000000 { - compatible = "riscv,plic0"; - #address-cells = <2>; - interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9 &CPU1_intc 11 &CPU1_intc 9 >; - reg = <0x0 0xc000000 0x0 0x1000000>; - riscv,ndev = <0x1f>; - riscv,max-priority = <0xf>; - #interrupt-cells = <1>; - interrupt-controller; - }; - SERIAL0: ns16550@10000000 { - compatible = "ns16550a"; - clock-frequency = <10000000>; - interrupt-parent = <&PLIC>; - interrupts = <1>; - reg = <0x0 0x10000000 0x0 0x100>; - reg-shift = <0x0>; - reg-io-width = <0x1>; - }; - }; - htif { - compatible = "ucb,htif0"; - }; -}; diff --git a/dts/spike.dts.in b/dts/spike.dts.in deleted file mode 100644 index f67ce0b..0000000 --- a/dts/spike.dts.in +++ /dev/null @@ -1,75 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "ucbbar,spike-bare-dev"; - model = "ucbbar,spike-bare"; - chosen { - stdout-path = &SERIAL0; - bootargs = "console=ttyS0 earlycon"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <10000000>; - CPU0: cpu@0 { - device_type = "cpu"; - reg = <0>; - status = "okay"; - compatible = "riscv"; - riscv,isa = "rv64imafdc_zicntr_zihpm"; - mmu-type = "riscv,sv57"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4>; - clock-frequency = <1000000000>; - CPU0_intc: interrupt-controller { - #address-cells = <2>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - }; - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x80000000>; - }; - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "ucbbar,spike-bare-soc", "simple-bus"; - ranges; - clint@2000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 >; - reg = <0x0 0x2000000 0x0 0x10000>; - }; - PLIC: plic@c000000 { - compatible = "riscv,plic0"; - #address-cells = <2>; - interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9 >; - reg = <0x0 0xc000000 0x0 0x1000000>; - riscv,ndev = <0x1f>; - riscv,max-priority = <0xf>; - #interrupt-cells = <1>; - interrupt-controller; - }; - SERIAL0: ns16550@10000000 { - compatible = "ns16550a"; - clock-frequency = <10000000>; - interrupt-parent = <&PLIC>; - interrupts = <1>; - reg = <0x0 0x10000000 0x0 0x100>; - reg-shift = <0x0>; - reg-io-width = <0x1>; - }; - }; - htif { - compatible = "ucb,htif0"; - }; -}; diff --git a/nemu_board/dts/workload-builder-profiles.json b/dts/workload-builder-profiles.json similarity index 100% rename from nemu_board/dts/workload-builder-profiles.json rename to dts/workload-builder-profiles.json diff --git a/dts/xiangshan-fpga-AIA-mem16g.dts.in b/dts/xiangshan-fpga-AIA-mem16g.dts.in deleted file mode 100644 index 98d82f8..0000000 --- a/dts/xiangshan-fpga-AIA-mem16g.dts.in +++ /dev/null @@ -1,209 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA uses the Kunminghu-v2 APLIC and IMSIC address map. - * 2. APLIC exposes 64 interrupt sources. - * 3. The FPGA DDR window exposes 16 GiB from 0x80000000. - * 4. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* Match the Kunminghu-v2 Linux CPU capability description. */ - riscv,isa = "rv64imafdcvh_smaia_smstateen_sscofpmf_sstc_zicntr_zihpm_zicboz_zicbom_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smaia", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssaia", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zabha", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* 16 GiB FPGA DDR window starting at 0x80000000. */ - reg = <0x0 0x80000000 0x4 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* CLINT remains the timer source when AIA is enabled. */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - imsics_m: imsics@3a800000 { - #address-cells = <0>; - riscv,num-ids = <0xff>; - reg = <0x0 0x3a800000 0x0 0x10000>; - msi-controller; - interrupt-controller; - #interrupt-cells = <0x00>; - compatible = "riscv,imsics"; - interrupts-extended = <&intc_cpu0 11>; - }; - - imsics_s: imsics@3b000000 { - #address-cells = <0>; - riscv,num-ids = <0xff>; - reg = <0x0 0x3b000000 0x0 0x80000>; - msi-controller; - interrupt-controller; - #interrupt-cells = <0x00>; - compatible = "riscv,imsics"; - riscv,guest-index-bits = <0x03>; - interrupts-extended = <&intc_cpu0 9>; - }; - - aplic_s: aplic@31120000 { - #address-cells = <0>; - riscv,num-sources = <0x40>; - reg = <0x0 0x31120000 0x0 0x8000>; - msi-parent = <&imsics_s>; - interrupt-controller; - #interrupt-cells = <0x02>; - compatible = "riscv,aplic"; - }; - - aplic_m: aplic@31100000 { - #address-cells = <0>; - riscv,delegate = <&aplic_s 0x01 0x40>; - riscv,children = <&aplic_s>; - riscv,num-sources = <0x40>; - reg = <0x0 0x31100000 0x0 0x8000>; - msi-parent = <&imsics_m>; - interrupt-controller; - #interrupt-cells = <0x02>; - compatible = "riscv,aplic"; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * UART16550 has no Linux interrupt wiring in this FPGA template. - * Use the SBI console after early boot. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-2hart-mem16g-novec.dts.in b/dts/xiangshan-fpga-noAIA-2hart-mem16g-novec.dts.in deleted file mode 100644 index 969c534..0000000 --- a/dts/xiangshan-fpga-noAIA-2hart-mem16g-novec.dts.in +++ /dev/null @@ -1,244 +0,0 @@ -/* - * XiangShan 2-hart/16 GiB DTS used by QEMU's nemu machine. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. QEMU's nemu machine exposes a 16550A serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu1: cpu@1 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x1>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu1: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 16 GiB memory profile for multi-hart workloads. - */ - reg = <0x0 0x80000000 0x4 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - - /* Keep the 131 MiB QEMU checkpoint window out of Linux memory. */ - checkpoint: checkpoint@80300000 { - no-map; - reg = <0x0 0x80300000 0x0 0x08300000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This QEMU configuration boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7 &intc_cpu1 3 &intc_cpu1 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535 &intc_cpu1 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9 &intc_cpu1 11 &intc_cpu1 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * QEMU's nemu machine exposes the XiangShan 16550A UART at 0x310b0000. - * It is not connected to the PLIC, matching serial_mm_init(..., NULL, ...). - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - current-speed = <115200>; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * Keep the SBI console as the primary console under QEMU/NEMU. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-2hart-mem8g-novec.dts.in b/dts/xiangshan-fpga-noAIA-2hart-mem8g-novec.dts.in deleted file mode 100644 index 454ce43..0000000 --- a/dts/xiangshan-fpga-noAIA-2hart-mem8g-novec.dts.in +++ /dev/null @@ -1,245 +0,0 @@ -/* - * XiangShan 2-hart/8 GiB DTS used by QEMU's nemu machine. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. QEMU's nemu machine exposes a 16550A serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu1: cpu@1 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x1>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu1: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 8 GiB memory profile for SPEC rate workloads and other - * large initramfs images that need more than the default footprint. - */ - reg = <0x0 0x80000000 0x2 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - - /* Keep the 131 MiB QEMU checkpoint window out of Linux memory. */ - checkpoint: checkpoint@80300000 { - no-map; - reg = <0x0 0x80300000 0x0 0x08300000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This QEMU configuration boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7 &intc_cpu1 3 &intc_cpu1 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535 &intc_cpu1 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9 &intc_cpu1 11 &intc_cpu1 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * QEMU's nemu machine exposes the XiangShan 16550A UART at 0x310b0000. - * It is not connected to the PLIC, matching serial_mm_init(..., NULL, ...). - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - current-speed = <115200>; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * Keep the SBI console as the primary console under QEMU/NEMU. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-32hart-mem64g.dts.in b/dts/xiangshan-fpga-noAIA-32hart-mem64g.dts.in deleted file mode 100644 index 767d199..0000000 --- a/dts/xiangshan-fpga-noAIA-32hart-mem64g.dts.in +++ /dev/null @@ -1,1393 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "xiangshan,nemu-board"; - model = "XiangShan"; - - chosen { - bootargs = "earlycon=sbi console=hvc0 unaligned_scalar_speed=slow unaligned_vector_speed=slow rcupdate.rcu_cpu_stall_suppress=1"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x10 0x0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <0>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu0_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu1: cpu@1 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <1>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu1_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu2: cpu@2 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <2>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu2_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu3: cpu@3 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <3>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu3_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu4: cpu@4 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <4>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu4_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu5: cpu@5 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <5>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu5_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu6: cpu@6 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <6>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu6_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu7: cpu@7 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <7>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu7_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu8: cpu@8 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <8>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu8_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu9: cpu@9 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <9>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu9_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu10: cpu@10 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <10>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu10_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu11: cpu@11 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <11>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu11_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu12: cpu@12 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <12>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu12_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu13: cpu@13 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <13>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu13_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu14: cpu@14 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <14>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu14_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu15: cpu@15 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <15>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu15_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu16: cpu@16 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <16>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu16_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu17: cpu@17 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <17>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu17_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu18: cpu@18 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <18>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu18_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu19: cpu@19 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <19>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu19_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu20: cpu@20 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <20>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu20_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu21: cpu@21 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <21>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu21_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu22: cpu@22 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <22>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu22_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu23: cpu@23 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <23>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu23_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu24: cpu@24 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <24>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu24_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu25: cpu@25 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <25>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu25_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu26: cpu@26 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <26>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu26_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu27: cpu@27 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <27>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu27_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu28: cpu@28 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <28>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu28_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu29: cpu@29 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <29>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu29_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu30: cpu@30 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <30>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu30_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu31: cpu@31 { - compatible = "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv39"; - reg = <31>; - riscv,cbom-block-size = <64>; - riscv,cbop-block-size = <64>; - riscv,cboz-block-size = <64>; - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - - cpu31_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - }; - - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, - <&cpu1_intc 3>, <&cpu1_intc 7>, - <&cpu2_intc 3>, <&cpu2_intc 7>, - <&cpu3_intc 3>, <&cpu3_intc 7>, - <&cpu4_intc 3>, <&cpu4_intc 7>, - <&cpu5_intc 3>, <&cpu5_intc 7>, - <&cpu6_intc 3>, <&cpu6_intc 7>, - <&cpu7_intc 3>, <&cpu7_intc 7>, - <&cpu8_intc 3>, <&cpu8_intc 7>, - <&cpu9_intc 3>, <&cpu9_intc 7>, - <&cpu10_intc 3>, <&cpu10_intc 7>, - <&cpu11_intc 3>, <&cpu11_intc 7>, - <&cpu12_intc 3>, <&cpu12_intc 7>, - <&cpu13_intc 3>, <&cpu13_intc 7>, - <&cpu14_intc 3>, <&cpu14_intc 7>, - <&cpu15_intc 3>, <&cpu15_intc 7>, - <&cpu16_intc 3>, <&cpu16_intc 7>, - <&cpu17_intc 3>, <&cpu17_intc 7>, - <&cpu18_intc 3>, <&cpu18_intc 7>, - <&cpu19_intc 3>, <&cpu19_intc 7>, - <&cpu20_intc 3>, <&cpu20_intc 7>, - <&cpu21_intc 3>, <&cpu21_intc 7>, - <&cpu22_intc 3>, <&cpu22_intc 7>, - <&cpu23_intc 3>, <&cpu23_intc 7>, - <&cpu24_intc 3>, <&cpu24_intc 7>, - <&cpu25_intc 3>, <&cpu25_intc 7>, - <&cpu26_intc 3>, <&cpu26_intc 7>, - <&cpu27_intc 3>, <&cpu27_intc 7>, - <&cpu28_intc 3>, <&cpu28_intc 7>, - <&cpu29_intc 3>, <&cpu29_intc 7>, - <&cpu30_intc 3>, <&cpu30_intc 7>, - <&cpu31_intc 3>, <&cpu31_intc 7>; - }; - - plic: plic@3c000000 { - compatible = "riscv,plic0"; - reg = <0x0 0x3c000000 0x0 0x4000000>; - #interrupt-cells = <1>; - interrupt-controller; - interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>, - <&cpu1_intc 11>, <&cpu1_intc 9>, - <&cpu2_intc 11>, <&cpu2_intc 9>, - <&cpu3_intc 11>, <&cpu3_intc 9>, - <&cpu4_intc 11>, <&cpu4_intc 9>, - <&cpu5_intc 11>, <&cpu5_intc 9>, - <&cpu6_intc 11>, <&cpu6_intc 9>, - <&cpu7_intc 11>, <&cpu7_intc 9>, - <&cpu8_intc 11>, <&cpu8_intc 9>, - <&cpu9_intc 11>, <&cpu9_intc 9>, - <&cpu10_intc 11>, <&cpu10_intc 9>, - <&cpu11_intc 11>, <&cpu11_intc 9>, - <&cpu12_intc 11>, <&cpu12_intc 9>, - <&cpu13_intc 11>, <&cpu13_intc 9>, - <&cpu14_intc 11>, <&cpu14_intc 9>, - <&cpu15_intc 11>, <&cpu15_intc 9>, - <&cpu16_intc 11>, <&cpu16_intc 9>, - <&cpu17_intc 11>, <&cpu17_intc 9>, - <&cpu18_intc 11>, <&cpu18_intc 9>, - <&cpu19_intc 11>, <&cpu19_intc 9>, - <&cpu20_intc 11>, <&cpu20_intc 9>, - <&cpu21_intc 11>, <&cpu21_intc 9>, - <&cpu22_intc 11>, <&cpu22_intc 9>, - <&cpu23_intc 11>, <&cpu23_intc 9>, - <&cpu24_intc 11>, <&cpu24_intc 9>, - <&cpu25_intc 11>, <&cpu25_intc 9>, - <&cpu26_intc 11>, <&cpu26_intc 9>, - <&cpu27_intc 11>, <&cpu27_intc 9>, - <&cpu28_intc 11>, <&cpu28_intc 9>, - <&cpu29_intc 11>, <&cpu29_intc 9>, - <&cpu30_intc 11>, <&cpu30_intc 9>, - <&cpu31_intc 11>, <&cpu31_intc 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - resv0@80000000 { - reg = <0x0 0x80000000 0x0 0x100000>; - no-map; - }; - resv1@80300000 { - /* Keep the 131 MiB QEMU checkpoint window out of Linux memory. */ - reg = <0x0 0x80300000 0x0 0x08300000>; - no-map; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "simple-bus"; - ranges; - - serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - }; - - }; - -}; diff --git a/dts/xiangshan-fpga-noAIA-mem128g-novec.dts.in b/dts/xiangshan-fpga-noAIA-mem128g-novec.dts.in deleted file mode 100644 index 1f58ffe..0000000 --- a/dts/xiangshan-fpga-noAIA-mem128g-novec.dts.in +++ /dev/null @@ -1,186 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 64 GiB memory profile for SPEC CPU2026 speed workloads. - */ - reg = <0x0 0x80000000 0x20 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem16g-novec.dts.in b/dts/xiangshan-fpga-noAIA-mem16g-novec.dts.in deleted file mode 100644 index f410157..0000000 --- a/dts/xiangshan-fpga-noAIA-mem16g-novec.dts.in +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Single-hart Host DTS for a virtualized workload. - * - * AIA is disabled and the H extension is advertised so Host Linux can use - * KVM. The 16 GiB profile matches the default 8 GiB Guest configuration. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0>; - status = "okay"; - mmu-type = "riscv,sv48"; - riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", - "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", - "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", - "shvstvala", "shvstvecd", "smcdeleg", - "smcntrpmf", "smcsrind", "smdbltrp", "smmpm", - "smnpm", "smstateen", "ss1p13", - "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", - "svinval", "svnapot", "svpbmt", "za64rs", - "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", - "zbkc", "zbkx", "zbs", "zcb", - "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", - "ziccrse", "zicntr", "zicond", "zicsr", - "zifencei", "zihintntl", "zihintpause", "zihpm", - "zimop", "zkn", "zknd", "zkne", - "zknh", "zksed", "zksh", "zkt"; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x4 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in b/dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in deleted file mode 100644 index e70eaf3..0000000 --- a/dts/xiangshan-fpga-noAIA-mem24g-novec.dts.in +++ /dev/null @@ -1,186 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 24 GiB memory profile for SPEC2017 and other large initramfs workloads. - */ - reg = <0x0 0x80000000 0x6 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem24g.dts.in b/dts/xiangshan-fpga-noAIA-mem24g.dts.in deleted file mode 100644 index 91ad72b..0000000 --- a/dts/xiangshan-fpga-noAIA-mem24g.dts.in +++ /dev/null @@ -1,187 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 24 GiB memory profile for SPEC2017 and other large initramfs workloads. - */ - reg = <0x0 0x80000000 0x6 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in b/dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in deleted file mode 100644 index 6b4c63a..0000000 --- a/dts/xiangshan-fpga-noAIA-mem64g-novec.dts.in +++ /dev/null @@ -1,186 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 64 GiB memory profile for SPEC CPU2026 speed workloads. - */ - reg = <0x0 0x80000000 0x10 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem64g.dts.in b/dts/xiangshan-fpga-noAIA-mem64g.dts.in deleted file mode 100644 index 099fc05..0000000 --- a/dts/xiangshan-fpga-noAIA-mem64g.dts.in +++ /dev/null @@ -1,187 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 64 GiB memory profile for SPEC CPU2026 speed workloads. - */ - reg = <0x0 0x80000000 0x10 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in b/dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in deleted file mode 100644 index f62dcb0..0000000 --- a/dts/xiangshan-fpga-noAIA-mem8g-novec.dts.in +++ /dev/null @@ -1,187 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 8 GiB memory profile for SPEC rate workloads and other - * large initramfs images that need more than the default footprint. - */ - reg = <0x0 0x80000000 0x2 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-mem8g.dts.in b/dts/xiangshan-fpga-noAIA-mem8g.dts.in deleted file mode 100644 index 93541cc..0000000 --- a/dts/xiangshan-fpga-noAIA-mem8g.dts.in +++ /dev/null @@ -1,188 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * Static 8 GiB memory profile for SPEC rate workloads and other - * large initramfs images that need more than the default footprint. - */ - reg = <0x0 0x80000000 0x2 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA-novec.dts.in b/dts/xiangshan-fpga-noAIA-novec.dts.in deleted file mode 100644 index a09289a..0000000 --- a/dts/xiangshan-fpga-noAIA-novec.dts.in +++ /dev/null @@ -1,187 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * The release XSTop.dts reports a very large simulation memory span. - * The FPGA DDR bridge exposes a 2 GiB window at 0x80000000. - */ - reg = <0x0 0x80000000 0x0 0x80000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-fpga-noAIA.dts.in b/dts/xiangshan-fpga-noAIA.dts.in deleted file mode 100644 index be4f24c..0000000 --- a/dts/xiangshan-fpga-noAIA.dts.in +++ /dev/null @@ -1,188 +0,0 @@ -/* - * XiangShan FPGA DTS used by the fpga board flow. - * - * 1. AIA is disabled, so Linux should only see the legacy CLINT + PLIC path. - * 2. UART16550 is exposed as the serial console. - */ - -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "xiangshan,Kunminghu-dev"; - #address-cells = <2>; - #size-cells = <2>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0x0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - /* - * Keep the Linux-friendly CPU capability description from the - * workload template while using the FPGA board interrupt/peripheral - * map below. - */ - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "b", "v", "h", - "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccfg", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", "sstc", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - intc_cpu0: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory: memory@80000000 { - device_type = "memory"; - /* - * The release XSTop.dts reports a very large simulation memory span. - * The FPGA DDR bridge exposes a 2 GiB window at 0x80000000. - */ - reg = <0x0 0x80000000 0x0 0x80000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - - /* - * This FPGA image boots without AIA. Describe only the CLINT + PLIC - * interrupt topology that the software stack should probe. - */ - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 3 &intc_cpu0 7>; - }; - - debug-controller@38020000 { - compatible = "sifive,debug-013", "riscv,debug-013"; - debug-attach = "jtag"; - reg = <0x0 0x38020000 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 65535>; - }; - - PLIC: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&intc_cpu0 11 &intc_cpu0 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* - * Board-specific FPGA peripheral: the external AXI UART16550 used as - * the Linux console on fpga. Keep the 32-bit MMIO spacing and the - * 50 MHz input clock to match the FPGA wrapper. - */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - //interrupt-parent = <&PLIC>; - //interrupts = <40>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - /* - * On this FPGA DTS the UART16550 interrupt is not wired into Linux - * (`interrupt-parent` / `interrupts` are intentionally absent above). - * `ttyS0` can still print early boot logs via polling/earlycon, but the - * normal console path becomes unreliable once Linux switches away from - * earlycon. When the UART interrupt is absent, use the SBI console - * (`hvc0`) instead. - */ - bootargs = "console=hvc0 earlycon=sbi loglevel=8"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; -}; diff --git a/dts/xiangshan-qemu-nemu-mem24g.dts.in b/dts/xiangshan-qemu-nemu-mem24g.dts.in deleted file mode 100644 index bffe840..0000000 --- a/dts/xiangshan-qemu-nemu-mem24g.dts.in +++ /dev/null @@ -1,142 +0,0 @@ -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "qemu,nemu-single-core"; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "v", "h", - "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x6 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7>; - }; - - plic: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* QEMU's nemu machine exposes the XiangShan 16550A UART at 0x310b0000. */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; -}; diff --git a/dts/xiangshan-qemu-nemu-mem2g.dts.in b/dts/xiangshan-qemu-nemu-mem2g.dts.in deleted file mode 100644 index 76fb26a..0000000 --- a/dts/xiangshan-qemu-nemu-mem2g.dts.in +++ /dev/null @@ -1,142 +0,0 @@ -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "qemu,nemu-single-core"; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "v", "h", - "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x80000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7>; - }; - - plic: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* QEMU's nemu machine exposes the XiangShan 16550A UART at 0x310b0000. */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; -}; diff --git a/dts/xiangshan-qemu-nemu-mem8g.dts.in b/dts/xiangshan-qemu-nemu-mem8g.dts.in deleted file mode 100644 index 1e5d707..0000000 --- a/dts/xiangshan-qemu-nemu-mem8g.dts.in +++ /dev/null @@ -1,142 +0,0 @@ -/dts-v1/; - -/ { - compatible = "freechips,rocketchip-unknown-dev"; - model = "qemu,nemu-single-core"; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - reg = <0>; - status = "okay"; - - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - mmu-type = "riscv,sv48"; - clock-frequency = <0>; - timebase-frequency = <1000000>; - tlb-split; - - riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = - "i", "m", "a", "f", "d", "c", "v", "h", - "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcsrind", "smdbltrp", - "smmpm", "smnpm", "smstateen", - "ss1p13", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", - "sspm", "ssstateen", "ssstrict", - "sstvala", "sstvecd", "ssu64xl", "supm", - "sv39", "sv48", "svade", "svbare", "svinval", - "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", - "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", - "zic64b", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", - "zicntr", "zicond", "zicsr", "zifencei", - "zihintntl", "zihintpause", "zihpm", "zimop", - "zkn", "zknd", "zkne", "zknh", "zksed", - "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", - "zvkt", "zvl128b", "zvl32b", "zvl64b"; - riscv,cbom-block-size = <0x40>; - riscv,cboz-block-size = <0x40>; - - next-level-cache = <&l2_cache>; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - }; - }; - - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x2 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - reserved0: buffer@0 { - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - - soc { - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7>; - }; - - plic: interrupt-controller@3c000000 { - compatible = "riscv,plic0"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x0 0x3c000000 0x0 0x4000000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - /* QEMU's nemu machine exposes the XiangShan 16550A UART at 0x310b0000. */ - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <0x2>; - reg-io-width = <0x4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; - }; - }; - - aliases { - serial0 = &uart0; - }; - - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - stdout-path = "serial0:115200n8"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; -}; diff --git a/dts/xiangshan.dts.in b/dts/xiangshan.dts.in deleted file mode 100644 index 71f2a8e..0000000 --- a/dts/xiangshan.dts.in +++ /dev/null @@ -1,100 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-dev"; - model = "freechips,rocketchip-unknown"; - L18: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - L3: debug-controller@0 { - compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L4 65535>; - reg = <0x0 0x0 0x0 0x1000>; - reg-names = "control"; - }; - L2: clint@38000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&L4 3 &L4 7>; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - clock-frequency-mhz = <500>; - }; - L14: serial@40600000 { - compatible = "xlnx,xps-uartlite-1.00.a"; - interrupt-parent = <&PLIC>; - interrupts = <3>; - current-speed = <115200>; - reg = <0x0 0x40600000 0x0 0x1000>; - reg-names = "control"; - }; - - }; - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; - L11: memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x08000000>; - }; - L12: reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - reserved0: buffer@0{ - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - L19: cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - L6: cpu@0 { - clock-frequency = <0>; - compatible = "UCAS,COOSCA1.0", "riscv"; - d-cache-block-size = <64>; - d-cache-sets = <64>; - d-cache-size = <16384>; - d-tlb-sets = <1>; - d-tlb-size = <32>; - device_type = "cpu"; - i-cache-block-size = <64>; - i-cache-sets = <64>; - i-cache-size = <16384>; - i-tlb-sets = <1>; - i-tlb-size = <32>; - mmu-type = "riscv,sv39"; - next-level-cache = <&L11>; - reg = <0x0>; - riscv,isa = "rv64imafdchv"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4096>; - status = "okay"; - timebase-frequency = <1000000>; - tlb-split; - L4: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - PLIC: interrupt-controller@3c000000 { - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&L4 9 &L4 11>; - reg = <0 0x3c000000 0 0x4000000>; - reg-names = "control"; - riscv,max-priority = <7>; - riscv,ndev = <64>; - }; -}; diff --git a/dts/yanqihu-2core.dts.in b/dts/yanqihu-2core.dts.in deleted file mode 100644 index a50b6a3..0000000 --- a/dts/yanqihu-2core.dts.in +++ /dev/null @@ -1,129 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-dev"; - model = "freechips,rocketchip-unknown"; - L18: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - L3: debug-controller@0 { - compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L4 65535>; - reg = <0x0 0x0 0x0 0x1000>; - reg-names = "control"; - }; - L2: clint@38000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&L4 3 &L4 7 &L5 3 &L5 7>; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - clock-frequency-mhz = <500>; - }; - L14: serial@40600000 { - compatible = "xlnx,xps-uartlite-1.00.a"; - interrupt-parent = <&PLIC>; - interrupts = <3>; - current-speed = <115200>; - reg = <0x0 0x40600000 0x0 0x1000>; - reg-names = "control"; - }; - - }; - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; - L11: memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x08000000>; - }; - L12: reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - reserved0: buffer@0{ - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - L19: cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - L6: cpu@0 { - clock-frequency = <0>; - compatible = "UCAS,COOSCA1.0", "riscv"; - d-cache-block-size = <64>; - d-cache-sets = <64>; - d-cache-size = <16384>; - d-tlb-sets = <1>; - d-tlb-size = <32>; - device_type = "cpu"; - i-cache-block-size = <64>; - i-cache-sets = <64>; - i-cache-size = <16384>; - i-tlb-sets = <1>; - i-tlb-size = <32>; - mmu-type = "riscv,sv39"; - next-level-cache = <&L11>; - reg = <0x0>; - riscv,isa = "rv64imafdc"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4096>; - status = "okay"; - timebase-frequency = <1000000>; - tlb-split; - L4: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - L7: cpu@1 { - clock-frequency = <0>; - compatible = "UCAS,COOSCA1.0", "riscv"; - d-cache-block-size = <64>; - d-cache-sets = <64>; - d-cache-size = <16384>; - d-tlb-sets = <1>; - d-tlb-size = <32>; - device_type = "cpu"; - i-cache-block-size = <64>; - i-cache-sets = <64>; - i-cache-size = <16384>; - i-tlb-sets = <1>; - i-tlb-size = <32>; - mmu-type = "riscv,sv39"; - next-level-cache = <&L11>; - reg = <0x1>; - riscv,isa = "rv64imafdc"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4096>; - status = "okay"; - timebase-frequency = <1000000>; - tlb-split; - L5: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - PLIC: interrupt-controller@3c000000 { - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&L4 9 &L4 11 &L5 9 &L5 11>; - reg = <0 0x3c000000 0 0x4000000>; - reg-names = "control"; - riscv,max-priority = <7>; - riscv,ndev = <64>; - }; -}; diff --git a/dts/yanqihu.dts.in b/dts/yanqihu.dts.in deleted file mode 100644 index 4237671..0000000 --- a/dts/yanqihu.dts.in +++ /dev/null @@ -1,100 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-dev"; - model = "freechips,rocketchip-unknown"; - L18: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-soc", "simple-bus"; - ranges; - L3: debug-controller@0 { - compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L4 65535>; - reg = <0x0 0x0 0x0 0x1000>; - reg-names = "control"; - }; - L2: clint@38000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&L4 3 &L4 7>; - reg = <0x0 0x38000000 0x0 0x10000>; - reg-names = "control"; - clock-frequency-mhz = <500>; - }; - L14: serial@40600000 { - compatible = "xlnx,xps-uartlite-1.00.a"; - interrupt-parent = <&PLIC>; - interrupts = <3>; - current-speed = <115200>; - reg = <0x0 0x40600000 0x0 0x1000>; - reg-names = "control"; - }; - - }; - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - linux,initrd-start = ; - linux,initrd-end = ; - /* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */ - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - }; - L11: memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x08000000>; - }; - L12: reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - reserved0: buffer@0{ - no-map; - reg = <0x0 0x80000000 0x0 0x100000>; - }; - }; - L19: cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - L6: cpu@0 { - clock-frequency = <0>; - compatible = "UCAS,COOSCA1.0", "riscv"; - d-cache-block-size = <64>; - d-cache-sets = <64>; - d-cache-size = <16384>; - d-tlb-sets = <1>; - d-tlb-size = <32>; - device_type = "cpu"; - i-cache-block-size = <64>; - i-cache-sets = <64>; - i-cache-size = <16384>; - i-tlb-sets = <1>; - i-tlb-size = <32>; - mmu-type = "riscv,sv39"; - next-level-cache = <&L11>; - reg = <0x0>; - riscv,isa = "rv64imafdc"; - riscv,pmpregions = <16>; - riscv,pmpgranularity = <4096>; - status = "okay"; - timebase-frequency = <1000000>; - tlb-split; - L4: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - PLIC: interrupt-controller@3c000000 { - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&L4 9 &L4 11>; - reg = <0 0x3c000000 0 0x4000000>; - reg-names = "control"; - riscv,max-priority = <7>; - riscv,ndev = <64>; - }; -}; diff --git a/nemu_board/configs/xiangshan_defconfig b/nemu_board/configs/xiangshan_defconfig deleted file mode 100644 index 86270c8..0000000 --- a/nemu_board/configs/xiangshan_defconfig +++ /dev/null @@ -1,52 +0,0 @@ -CONFIG_DEFAULT_HOSTNAME="(lvna)" -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_LOG_BUF_SHIFT=15 -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="${RISCV_ROOTFS_HOME}/rootfsimg/initramfs-emu.txt" -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -CONFIG_NONPORTABLE=y -CONFIG_SMP=y -CONFIG_RISCV_SBI_V01=y -# CONFIG_BLOCK is not set -# CONFIG_BINFMT_SCRIPT is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_COMPACTION is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_STANDALONE is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -# CONFIG_ALLOW_DEV_COREDUMP is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_VT_CONSOLE is not set -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_EARLYCON_RISCV_SBI=y -CONFIG_SERIAL_UARTLITE=y -CONFIG_SERIAL_UARTLITE_CONSOLE=y -CONFIG_HVC_RISCV_SBI=y -CONFIG_HW_RANDOM_TIMERIOMEM=y -# CONFIG_DEVMEM is not set -# CONFIG_HWMON is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_FILE_LOCKING is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_PROC_CHILDREN=y -# CONFIG_SYSFS is not set -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_PRINTK_TIME=y -CONFIG_STACKTRACE=y -CONFIG_RCU_CPU_STALL_TIMEOUT=300 -# CONFIG_RCU_TRACE is not set -# CONFIG_FTRACE is not set -# CONFIG_RUNTIME_TESTING_MENU is not set diff --git a/nemu_board/configs/xiangshan_overlay_defconfig b/nemu_board/configs/xiangshan_overlay_defconfig deleted file mode 100644 index 1e16e4f..0000000 --- a/nemu_board/configs/xiangshan_overlay_defconfig +++ /dev/null @@ -1,55 +0,0 @@ -CONFIG_DEFAULT_HOSTNAME="(lvna)" -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_LOG_BUF_SHIFT=15 -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="/nfs/home/jiaxiaoyu/workspace/checkpoint_script_update/scripts/buffer/scripts/gcc_s04_initramfs-spec.txt" -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -CONFIG_NONPORTABLE=y -CONFIG_SMP=y -CONFIG_RISCV_SBI_V01=y -# CONFIG_BLOCK is not set -# CONFIG_BINFMT_SCRIPT is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_COMPACTION is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_STANDALONE is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -# CONFIG_ALLOW_DEV_COREDUMP is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_VT_CONSOLE is not set -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_EARLYCON_RISCV_SBI=y -CONFIG_SERIAL_UARTLITE=y -CONFIG_SERIAL_UARTLITE_CONSOLE=y -CONFIG_HVC_RISCV_SBI=y -CONFIG_HW_RANDOM_TIMERIOMEM=y -# CONFIG_DEVMEM is not set -# CONFIG_HWMON is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_FILE_LOCKING is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_OVERLAY_FS=y -CONFIG_OVERLAY_FS_XINO_AUTO=y -CONFIG_OVERLAY_FS_METACOPY=y -CONFIG_PROC_CHILDREN=y -# CONFIG_SYSFS is not set -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_PRINTK_TIME=y -CONFIG_STACKTRACE=y -CONFIG_RCU_CPU_STALL_TIMEOUT=300 -# CONFIG_RCU_TRACE is not set -# CONFIG_FTRACE is not set -# CONFIG_RUNTIME_TESTING_MENU is not set diff --git a/nemu_board/configs/xiangshanhost_defconfig b/nemu_board/configs/xiangshanhost_defconfig deleted file mode 100644 index fa9c560..0000000 --- a/nemu_board/configs/xiangshanhost_defconfig +++ /dev/null @@ -1,295 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_NO_HZ_IDLE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BPF_SYSCALL=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_CGROUPS=y -CONFIG_MEMCG=y -CONFIG_CGROUP_SCHED=y -CONFIG_CFS_BANDWIDTH=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_CGROUP_PIDS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_BPF=y -CONFIG_NAMESPACES=y -CONFIG_USER_NS=y -CONFIG_CHECKPOINT_RESTORE=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -CONFIG_PROFILING=y -CONFIG_ARCH_MICROCHIP=y -CONFIG_ARCH_RENESAS=y -CONFIG_ARCH_SIFIVE=y -CONFIG_ARCH_SOPHGO=y -CONFIG_SOC_STARFIVE=y -CONFIG_ARCH_SUNXI=y -CONFIG_ARCH_THEAD=y -CONFIG_ARCH_VIRT=y -CONFIG_ARCH_CANAAN=y -CONFIG_NONPORTABLE=y -CONFIG_SMP=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m -CONFIG_CPUFREQ_DT=y -CONFIG_ACPI_CPPC_CPUFREQ=m -CONFIG_VIRTUALIZATION=y -CONFIG_KVM=y -CONFIG_ACPI=y -CONFIG_JUMP_LABEL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_XFRM_USER=m -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_INET_ESP=m -CONFIG_NETFILTER=y -CONFIG_BRIDGE_NETFILTER=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_IP_VS=m -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_NFCT=y -CONFIG_NF_LOG_ARP=m -CONFIG_NF_LOG_IPV4=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=m -CONFIG_NF_LOG_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_VLAN_FILTERING=y -CONFIG_VLAN_8021Q=m -CONFIG_NET_SCHED=y -CONFIG_NET_CLS_CGROUP=m -CONFIG_NETLINK_DIAG=y -CONFIG_CGROUP_NET_PRIO=y -CONFIG_CAN=m -CONFIG_NET_9P=y -CONFIG_NET_9P_VIRTIO=y -CONFIG_PCI=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCI_HOST_GENERIC=y -CONFIG_PCIE_XILINX=y -CONFIG_PCIE_FU740=y -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_SPI_NOR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_VIRTIO_BLK=y -CONFIG_BLK_DEV_NVME=m -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_DEV_SR=y -CONFIG_SCSI_VIRTIO=y -CONFIG_ATA=y -CONFIG_SATA_AHCI=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_MD=y -CONFIG_BLK_DEV_DM=m -CONFIG_DM_THIN_PROVISIONING=m -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_MACVLAN=m -CONFIG_IPVLAN=m -CONFIG_VXLAN=m -CONFIG_VETH=m -CONFIG_VIRTIO_NET=y -CONFIG_MACB=y -CONFIG_E1000E=y -CONFIG_R8169=y -CONFIG_RAVB=y -CONFIG_STMMAC_ETH=m -CONFIG_MICREL_PHY=y -CONFIG_MICROSEMI_PHY=y -CONFIG_CAN_RCAR_CANFD=m -CONFIG_INPUT_MOUSEDEV=y -CONFIG_KEYBOARD_SUN4I_LRADC=m -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_EARLYCON_RISCV_SBI=y -CONFIG_SERIAL_UARTLITE=m -CONFIG_SERIAL_SH_SCI=y -CONFIG_HVC_RISCV_SBI=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_TIMERIOMEM=y -CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_MV64XXX=m -CONFIG_I2C_RIIC=m -CONFIG_SPI=y -CONFIG_SPI_RSPI=m -CONFIG_SPI_SIFIVE=y -CONFIG_SPI_SUN6I=y -# CONFIG_PTP_1588_CLOCK is not set -CONFIG_GPIO_SIFIVE=y -CONFIG_CPU_THERMAL=y -CONFIG_RZG2L_THERMAL=y -CONFIG_WATCHDOG=y -CONFIG_SUNXI_WATCHDOG=y -CONFIG_RENESAS_RZG2LWDT=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_DRM=m -CONFIG_DRM_RADEON=m -CONFIG_DRM_NOUVEAU=m -CONFIG_DRM_SUN4I=m -CONFIG_DRM_VIRTIO_GPU=m -CONFIG_FB=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_WM8978=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_USB=y -CONFIG_USB_OTG=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_RENESAS_USBHS=m -CONFIG_USB_STORAGE=y -CONFIG_USB_UAS=y -CONFIG_USB_MUSB_HDRC=m -CONFIG_USB_MUSB_SUNXI=m -CONFIG_NOP_USB_XCEIV=m -CONFIG_USB_GADGET=y -CONFIG_USB_RENESAS_USBHS_UDC=m -CONFIG_USB_CONFIGFS=m -CONFIG_USB_CONFIGFS_SERIAL=y -CONFIG_USB_CONFIGFS_ACM=y -CONFIG_USB_CONFIGFS_OBEX=y -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -CONFIG_USB_CONFIGFS_ECM_SUBSET=y -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -CONFIG_USB_CONFIGFS_F_FS=y -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_DWCMSHC=y -CONFIG_MMC_SDHCI_CADENCE=y -CONFIG_MMC_SPI=y -CONFIG_MMC_SDHI=y -CONFIG_MMC_DW=y -CONFIG_MMC_DW_STARFIVE=y -CONFIG_MMC_SUNXI=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_SUN6I=y -CONFIG_DMADEVICES=y -CONFIG_DMA_SUN6I=m -CONFIG_DW_AXI_DMAC=y -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_INPUT=y -CONFIG_VIRTIO_MMIO=y -CONFIG_CLK_SOPHGO_CV1800=y -CONFIG_SUN8I_DE2_CCU=m -CONFIG_RENESAS_OSTM=y -CONFIG_SUN50I_IOMMU=y -CONFIG_RPMSG_CHAR=y -CONFIG_RPMSG_CTRL=y -CONFIG_RPMSG_VIRTIO=y -CONFIG_IIO=y -CONFIG_PHY_SUN4I_USB=m -CONFIG_PHY_RCAR_GEN3_USB2=y -CONFIG_LIBNVDIMM=y -CONFIG_NVMEM_SUNXI_SID=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_AUTOFS_FS=y -CONFIG_OVERLAY_FS=m -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_HUGETLBFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_ROOT_NFS=y -CONFIG_9P_FS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=m -CONFIG_SECURITY=y -CONFIG_SECURITY_SELINUX=y -CONFIG_SECURITY_APPARMOR=y -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_CRYPTO_USER_API_HASH=y -CONFIG_CRYPTO_DEV_VIRTIO=y -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_PAGEALLOC=y -CONFIG_SCHED_STACK_END_CHECK=y -CONFIG_DEBUG_VM=y -CONFIG_DEBUG_VM_PGFLAGS=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_DEBUG_PER_CPU_MAPS=y -CONFIG_SOFTLOCKUP_DETECTOR=y -CONFIG_WQ_WATCHDOG=y -CONFIG_DEBUG_TIMEKEEPING=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_RWSEMS=y -CONFIG_DEBUG_ATOMIC_SLEEP=y -CONFIG_DEBUG_LIST=y -CONFIG_DEBUG_PLIST=y -CONFIG_DEBUG_SG=y -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_EQS_DEBUG=y -# CONFIG_FTRACE is not set -# CONFIG_RUNTIME_TESTING_MENU is not set -CONFIG_MEMTEST=y diff --git a/nemu_board/dts/README.md b/nemu_board/dts/README.md deleted file mode 100644 index 0a5e528..0000000 --- a/nemu_board/dts/README.md +++ /dev/null @@ -1,152 +0,0 @@ -# 生成 workload-builder 设备树模板 - -`generate-workload-builder-dts.py` 复用本目录的 `DTSGen`，可以独立输出 -workload-builder 使用的 `.dts.in` 模板。当前 workload-builder 构建会通过 -`scripts/generate-nemu-board-dts.py` 自动调用同一个 `DTSGen`，并将模板写入 -`build/generated-dts`。 - -需要 **Python 3.12 或更高版本**（现有 DTSGen 使用 Python 3.12 的 f-string 语法）。 -生成阶段不需要 dtc；workload-builder 构建时仍使用自己的 dtc。 - -## 单核 FPGA：当前 noAIA-novec 配置 - -假设 nemu_board 和 workload-builder 在同一父目录，在 nemu_board 根目录执行： - -```sh -python3 dts/generate-workload-builder-dts.py \ - --profile fpga-noaia-novec \ - --memory-gib 2 \ - --output ../workload-builder/build/generated-dts/generated-fpga-noaia-novec.dts.in - -make -C ../workload-builder linux/coremark \ - DEFAULT_DTB=generated-fpga-noaia-novec -``` - -输出使用新名称，避免覆盖已有模板。将 `--memory-gib` 改为 8、16、24、 -64 等可以生成其他内存容量。声明容量必须与实际目标一致。 - -## QEMU nemu：单核或多核 - -```sh -python3 dts/generate-workload-builder-dts.py \ - --profile qemu-nemu --harts 4 --memory-gib 16 --no-vector \ - --output ../workload-builder/build/generated-dts/generated-qemu-4hart-mem16g-novec.dts.in - -make -C ../workload-builder linux/coremark \ - PLATFORM=qemu MULTIHART=1 HARTS=4 \ - DEFAULT_DTB=generated-qemu-4hart-mem16g-novec -``` - -单核使用 `--harts 1`，构建时使用 `PLATFORM=qemu MULTIHART=0`。 -多核范围为 2..128，生成器与 make 的核数必须一致。 -当前 builder 的多核镜像用于 QEMU checkpoint 流程，因此多核只接受 -`qemu-nemu` profile；不把它标称为已验证的多核 FPGA 启动方案。 - -## NEMU：UARTLite 配置 - -```sh -python3 dts/generate-workload-builder-dts.py \ - --profile nemu --memory-gib 8 \ - --output ../workload-builder/build/generated-dts/generated-nemu-mem8g.dts.in - -make -C ../workload-builder linux/coremark \ - DEFAULT_DTB=generated-nemu-mem8g -``` - -不指定容量时，`nemu` profile 使用现有 `xiangshan.dts.in` 的 128 MiB。 -较大的 workload 需要显式增加内存。 - -## Profile 定义和边界 - -| Profile | 默认内存 | UART | PLIC 中断源 | MMU | 默认 ISA 来源 | -|---|---|---|---|---|---| -| fpga-noaia-novec | 2 GiB | 16550A @ 0x310b0000，无 IRQ | 66 | Sv48 | xiangshan-fpga-noAIA-novec.dts.in | -| qemu-nemu | 2 GiB | 16550A @ 0x310b0000，无 IRQ | 66 | Sv48 | xiangshan-qemu-nemu-mem2g.dts.in | -| nemu | 128 MiB | UARTLite @ 0x40600000，PLIC IRQ 3 | 64 | Sv39 | xiangshan.dts.in | - -所有 profile 使用 DRAM 基地址 0x80000000、CLINT 0x38000000、 -PLIC 0x3c000000 和 1 MHz 时间基准，默认使用 SBI 控制台。 -NEMU profile 保留其源模板的 PLIC S/M context 顺序；另外两个使用 M/S 顺序。 - -ISA 来源固定于 workload-builder 提交 -`aaf4d8bd7d2da5351fc2640c8d61c9d849d69342`，完整来源链接在 -`workload-builder-profiles.json` 中。生成时不联网。 -这些列表是现有模板的声明，不是硬件能力验证结果。FPGA 默认保留 -`smcntrpmf`、`smcdeleg` 等原有声明，不擅自认定目标支持或不支持。 -NEMU 源模板没有结构化列表，其默认列表由原有单字母 ISA 字符串推导。 - -这是接口兼容生成器，不是源模板的逐字复制。FPGA profile 将 CLINT/PLIC、 -PLIC 节点名、SoC compatible、`reg-names` 和 CPU/ISA 属性对齐到现有 FPGA -模板；节点标签、空白和其他描述性属性仍可能不同。NEMU 原模板将 -`next-level-cache` 指向 memory 节点，生成器不复制这一引用。 -FPGA/QEMU 仍描述 64 KiB L1、1 MiB L2 和 48-entry I/D TLB。 -不支持 AIA 节点生成，也不复制 kmh-v2.dtsi 的 PCIe、PMEM 或 EINJ/ERST 节点。 - -## 调整 ISA 和启动配置 - -- FPGA profile 默认使用现有 Kunminghu V3 ISA 声明；传入 - `--isa-config kunminghu-v2` 可切换为 Kunminghu V2。该选项只改变 - CPU ISA 声明，不改变板级拓扑；CBO block-size 属性会按所选扩展列表 - 一并生成或省略。 -- `--isa-extensions i m a f d c zicsr zifencei`：完全替换扩展列表，不与 - RVA profile 合并。此时 legacy ISA 字符串也按该列表生成。 -- `--exclude-isa smcntrpmf smcdeleg`：从默认或自定义列表移除指定扩展， - 同时从 legacy ISA 字符串删除对应声明。 -- `--no-vector`：同时移除 `v` 和所有 `zv*`，保留 `rv64` 前缀。 -- QEMU profile 始终去掉 `sstc`，匹配当前 builder 的 timer 限制。 -- `fpga-noaia-novec` 拒绝向量声明；所有 profile 拒绝 `smaia/ssaia`， - 避免生成与其中断拓扑明显不一致的模板。 -- `--timebase-freq 1000000`：计时基准，单位 Hz，不是 CPU 主频。 -- `--mmu-type riscv,sv48`：覆盖 MMU 类型。 -- `--bootargs "console=hvc0 earlycon=sbi loglevel=8"`：覆盖内核参数。 -- `--memory-size 0x200000000`：按字节指定容量，与 `--memory-gib` 互斥。 -- 省略 `--output` 输出到 stdout；指定路径必须以 `.dts.in` 结尾。 - -除了上述基本一致性检查，生成器不验证所有 ISA 扩展之间的依赖关系。 -内存、计时频率、缓存信息和 ISA 声明仍需与实际 RTL/模拟器配置核对。 - -## 与 builder 的地址契约 - -生成的 chosen 节点包含： - -```dts -linux,initrd-start = ; -linux,initrd-end = ; -``` - -这些是模板占位符，必须由 builder 根据实际内核及 rootfs 大小替换， -不能直接将 .dts.in 交给 dtc 编译。 - -| 项目 | 单核 | 多核 | -|---|---|---| -| GCPT no-map 保留区 | [0x80000000, 0x80100000) | 相同 | -| checkpoint 状态 no-map 保留区 | 无 | [0x80300000, 0x88600000)，131 MiB | -| OpenSBI 地址（builder 放置） | 0x80100000 | 0x80100000 | -| DTB 地址（builder 放置） | 0x80200000 | 0x80200000 | -| 内核地址（builder 放置） | 0x80400000 | 0x88600000 | - -多核保留区大小特意写成 `0x08300000`，兼容现有 builder 的文本检查， -所以无需修改 builder 的 awk 代码。生成器不负责打包或重新计算启动地址。 -使用 workload-builder 已识别的 basename 时，make 会自动生成模板。上面的 -显式命令用于自定义 profile 或 basename；只要模板已存在，builder 会保留 -无法由内置规则识别的自定义 basename。 - -## 验证 - -```sh -python3 -m unittest discover -s dts -p 'test_*.py' -v - -# 安装 dtc/fdtget 后，使用真实 builder 打包脚本执行集成验证： -WORKLOAD_BUILDER=../workload-builder \ - python3 -m unittest discover -s dts -p 'test_*.py' -v -``` - -可通过 `DTC` 和 `FDTGET` 指定工具路径。 -集成测试覆盖 FPGA 单核、NEMU 单核、QEMU 单核、双核和 128 核， -检查 DTB 内存/中断/hart 信息、占位符替换、保留区检查，以及 -GCPT、OpenSBI、DTB、内核、initramfs 的镜像位置和内容。 -测试使用小型标记 payload，不构建真实 Linux，也不验证硬件启动。 - -原有 `DTSGen.py` CLI 保留。公共生成器同时修复了 -`--timebase-freq` 未传入构造函数、保留内存在实例之间共享，以及 -hart ID >= 10 时节点 unit-address 未用十六进制表示的问题。 diff --git a/nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in b/nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in deleted file mode 100644 index e0a0ebd..0000000 --- a/nemu_board/dts/generated-qemu-2hart-mem16g-novec.dts.in +++ /dev/null @@ -1,155 +0,0 @@ -/* Generated by nemu_board for workload-builder. */ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "freechips,rocketchip-unknown-dev"; - model = "qemu,nemu"; - - chosen { - bootargs = "console=hvc0 earlycon=sbi"; - rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>; - linux,initrd-start = ; - linux,initrd-end = ; - stdout-path = "serial0:115200n8"; - opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x4 0x0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <1000000>; - - cpu0: cpu@0 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv48"; - reg = <0>; - riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"; - status = "okay"; - clock-frequency = <0>; - tlb-split; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - next-level-cache = <&l2_cache>; - - cpu0_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - cpu1: cpu@1 { - compatible = "ICT,xiangshan", "riscv"; - device_type = "cpu"; - mmu-type = "riscv,sv48"; - reg = <1>; - riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"; - status = "okay"; - clock-frequency = <0>; - tlb-split; - i-cache-block-size = <64>; - i-cache-sets = <256>; - i-cache-size = <65536>; - i-tlb-sets = <1>; - i-tlb-size = <48>; - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <65536>; - d-tlb-sets = <1>; - d-tlb-size = <48>; - next-level-cache = <&l2_cache>; - - cpu1_intc: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - - }; - - clint: clint@38000000 { - compatible = "riscv,clint0"; - reg = <0x0 0x38000000 0x0 0x10000>; - - interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, - <&cpu1_intc 3>, <&cpu1_intc 7>; - }; - - plic: plic@3c000000 { - compatible = "riscv,plic0"; - reg = <0x0 0x3c000000 0x0 0x4000000>; - - #interrupt-cells = <1>; - interrupt-controller; - interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>, - <&cpu1_intc 11>, <&cpu1_intc 9>; - riscv,max-priority = <7>; - riscv,ndev = <66>; - }; - - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - gcpt@80000000 { - reg = <0x0 0x80000000 0x0 0x100000>; - no-map; - }; - checkpoint@80300000 { - reg = <0x0 0x80300000 0x0 0x08300000>; - no-map; - }; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "simple-bus"; - ranges; - - uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; - }; - - }; - - aliases { serial0 = &uart0; }; - l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; - }; - -}; diff --git a/nemu_board/dts/test_workload_builder.py b/nemu_board/dts/test_workload_builder.py deleted file mode 100644 index 90ab5bf..0000000 --- a/nemu_board/dts/test_workload_builder.py +++ /dev/null @@ -1,360 +0,0 @@ -"""Run: python3 -m unittest discover -s dts -p 'test_*.py' -v. - -Set WORKLOAD_BUILDER to a checkout and DTC/FDTGET for firmware integration. -""" -import os -from pathlib import Path -import re -import shutil -import subprocess -import sys -import tempfile -import unittest - -from DTSGen import DTSGen - -HERE = Path(__file__).resolve().parent -DTC = os.environ.get("DTC") or shutil.which("dtc") -FDTGET = os.environ.get("FDTGET") or shutil.which("fdtget") -BUILDER = os.environ.get("WORKLOAD_BUILDER") - - -def generate(*args, check=True): - return subprocess.run([sys.executable, str(HERE / "generate-workload-builder-dts.py"), - *map(str, args)], text=True, capture_output=True, check=check) - - -class GeneratorTests(unittest.TestCase): - def test_reservations_do_not_leak_between_instances(self): - first = DTSGen() - first.add_reserved_memory(0x80000000, 0x100000) - self.assertNotIn("reserved-memory", DTSGen().gen_dts()) - - def test_generated_rng_seed_is_annotated(self): - self.assertIn('/* ASCII: "XIANGSHAN_NEMU_BOARD_RANDOM_SEED" */', - DTSGen().gen_dts()) - - def test_existing_cli_timebase_is_applied(self): - result = subprocess.run([sys.executable, str(HERE / "DTSGen.py"), - "--timebase-freq", "1000000"], - check=True, text=True, capture_output=True) - self.assertIn("timebase-frequency = <1000000>;", result.stdout) - - def test_vector_filter_preserves_rv64_prefix(self): - text = generate("--profile", "qemu-nemu", "--no-vector").stdout - self.assertRegex(text, r'riscv,isa = "rv64imafdch_') - self.assertNotRegex(text, r'"(?:v|zv[^"]*)"') - self.assertNotIn("sstc", text) - - def test_isa_override_is_replacement(self): - text = generate("--isa-extensions", "i", "m", "a", "zicsr").stdout - self.assertIn('riscv,isa-extensions = "i", "m", "a", "zicsr";', text) - self.assertNotIn('"smcntrpmf"', text) - - def test_kunminghu_isa_configs(self): - default = generate().stdout - self.assertIn( - 'riscv,isa = "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_' - 'svpbmt_sdtrig_smcsrind_sscsrind_svade";', default) - - v2 = generate("--isa-config", "kunminghu-v2").stdout - self.assertIn( - 'riscv,isa = "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_' - 'svpbmt_sdtrig_smcsrind_sscsrind_svade";', v2) - self.assertIn('riscv,isa-base = "rv64i";', v2) - value = re.search(r"riscv,isa-extensions = (?P.*?);", v2, re.DOTALL)["value"] - self.assertEqual(re.findall(r'"([^"]+)"', value), """ - i m a f d c h sdtrig sha shcounterenw shgatpa shlcofideleg - shtvala shvsatpa shvstvala shvstvecd smcsrind smdbltrp smmpm - smnpm smstateen ss1p13 ssccptr sscofpmf sscounterenw sscsrind - ssdbltrp ssnpm sspm ssstateen ssstrict sstc sstvala sstvecd - ssu64xl supm sv39 sv48 svade svbare svinval svnapot svpbmt - za64rs zacas zawrs zba zbb zbc zbkb zbkc zbkx zbs zca zcb - zcmop zfa zfh zfhmin zic64b ziccamoa ziccif zicclsm ziccrse - zicntr zicond zicsr zifencei zihintntl zihintpause zihpm zimop - zkn zknd zkne zknh zksed zksh zkt - """.split()) - - def test_invalid_configs_fail(self): - for args in [ - ("--harts", "129"), ("--harts", "2"), - ("--profile", "nemu", "--harts", "2"), - ("--memory-size", "0"), - ("--profile", "nemu", "--memory-size", "0x400000"), - ("--profile", "qemu-nemu", "--harts", "2", "--memory-size", "0x8600000"), - ("--isa-extensions", "i", "smaia"), - ("--isa-extensions", "i", "zvbb"), - ("--isa-extensions", "i", "v"), - ("--profile", "nemu", "--isa-config", "kunminghu-v2"), - ("--exclude-isa", "i"), ("--output", "wrong.dtb"), - ]: - with self.subTest(args=args): - result = generate(*args, check=False) - self.assertNotEqual(result.returncode, 0) - self.assertEqual(result.stdout, "") - - @unittest.skipUnless(BUILDER, "WORKLOAD_BUILDER not set") - def test_builder_wrapper_generation(self): - script = Path(BUILDER) / "scripts/generate-nemu-board-dts.py" - with tempfile.TemporaryDirectory() as tmp: - root = Path(tmp) - for name, has_checkpoint in [ - ("xiangshan-qemu-nemu-mem2g", False), - ("xiangshan-qemu-nemu-2hart-mem16g", True), - ]: - with self.subTest(name=name): - output = root / f"{name}.dts.in" - subprocess.run([sys.executable, str(script), "--name", name, - "--output", str(output)], check=True) - text = output.read_text() - checkpoint = re.search( - r"checkpoint@80300000\s*\{(?P.*?)\};", text, re.DOTALL) - self.assertEqual(checkpoint is not None, has_checkpoint) - if checkpoint: - self.assertIn( - "reg = <0x0 0x80300000 0x0 0x08300000>;", - checkpoint["body"]) - self.assertIn("no-map;", checkpoint["body"]) - - fpga_name = "xiangshan-fpga-noAIA-mem16g-novec" - v3 = root / "v3.dts.in" - subprocess.run([sys.executable, str(script), "--name", fpga_name, - "--output", str(v3)], check=True) - explicit_v3 = root / "explicit-v3.dts.in" - subprocess.run([sys.executable, str(script), "--name", fpga_name, - "--output", str(explicit_v3), - "--isa-config", "kunminghu-v3"], check=True) - self.assertEqual(v3.read_text(), explicit_v3.read_text()) - - v2 = root / "v2.dts.in" - subprocess.run([sys.executable, str(script), "--name", fpga_name, - "--output", str(v2), - "--isa-config", "kunminghu-v2"], check=True) - v2_text = v2.read_text() - self.assertIn('riscv,isa = "rv64imafdch_', v2_text) - self.assertIn('"ss1p13"', v2_text) - self.assertNotIn('"v"', v2_text) - - vector_v2 = root / "vector-v2.dts.in" - subprocess.run([ - sys.executable, str(script), "--name", "xiangshan-fpga-noAIA-mem16g", - "--output", str(vector_v2), "--isa-config", "kunminghu-v2", - ], check=True) - self.assertIn('riscv,isa = "rv64imafdcvh_', vector_v2.read_text()) - self.assertIn('"v"', vector_v2.read_text()) - - invalid_profile = subprocess.run([ - sys.executable, str(script), "--name", "xiangshan-qemu-nemu-mem2g", - "--output", str(root / "qemu-v2.dts.in"), - "--isa-config", "kunminghu-v2", - ], text=True, capture_output=True) - self.assertNotEqual(invalid_profile.returncode, 0) - self.assertIn("--isa-config is supported by the FPGA noAIA profile only", - invalid_profile.stderr) - - custom = root / "custom.dts.in" - custom.write_text("custom template\n") - subprocess.run([ - sys.executable, str(script), "--name", "custom", - "--output", str(custom), "--isa-config", "kunminghu-v2", - "--preserve-existing-unsupported", - ], check=True) - self.assertEqual(custom.read_text(), "custom template\n") - - missing = root / "missing.dts.in" - result = subprocess.run([ - sys.executable, str(script), "--name", "missing", - "--output", str(missing), "--preserve-existing-unsupported", - ], text=True, capture_output=True) - self.assertNotEqual(result.returncode, 0) - self.assertIn("unsupported DTS basename: missing", result.stderr) - - custom_dir = root / "dts" - custom_dir.mkdir() - (custom_dir / "vendor-board.dts.in").write_text("vendor template\n") - copied = root / "vendor-board.dts.in" - subprocess.run([ - sys.executable, str(script), "--name", "vendor-board", - "--output", str(copied), "--custom-template-dir", str(custom_dir), - ], check=True) - self.assertEqual(copied.read_text(), "vendor template\n") - - absent_dir = root / "absent-dts" / "absent-board.dts.in" - absent = subprocess.run([ - sys.executable, str(script), "--name", "absent-board", - "--output", str(absent_dir), "--custom-template-dir", - str(custom_dir), - ], text=True, capture_output=True) - self.assertNotEqual(absent.returncode, 0) - self.assertFalse(absent_dir.exists()) - - recognized = root / "xiangshan.dts.in" - recognized.write_text("stale generated template\n") - subprocess.run([ - sys.executable, str(script), "--name", "xiangshan", - "--output", str(recognized), "--preserve-existing-unsupported", - ], check=True) - self.assertTrue(recognized.read_text().startswith( - "/* Generated by nemu_board for workload-builder. */")) - - @unittest.skipUnless(BUILDER, "WORKLOAD_BUILDER not set") - def test_fpga_isa_matches_existing_template(self): - original = (Path(BUILDER) / "dts/xiangshan-fpga-noAIA-novec.dts.in").read_text() - output = generate().stdout - def extensions(text): - value = re.search(r"riscv,isa-extensions\s*=([^;]+);", text)[1] - return set(re.findall(r'"([^"]+)"', value)) - self.assertEqual(extensions(original), extensions(output)) - self.assertEqual(re.search(r'riscv,isa = "[^"]+";', original)[0], - re.search(r'riscv,isa = "[^"]+";', output)[0]) - self.assertNotIn("riscv,cbop-block-size", output) - self.assertIn("timebase-frequency = <1000000>;", output) - soc = re.search(r" soc \{\n(?P.*)\n \};", output, re.DOTALL)["body"] - self.assertIn('compatible = "freechips,rocketchip-unknown-soc", "simple-bus";', soc) - self.assertIn("clint: clint@38000000", soc) - self.assertIn("plic: interrupt-controller@3c000000", soc) - self.assertEqual(soc.count('reg-names = "control";'), 3) - - @unittest.skipUnless(DTC and FDTGET and BUILDER, "DTC, FDTGET and WORKLOAD_BUILDER required") - def test_builder_isa_config_reaches_packed_dtb(self): - name = "xiangshan-fpga-noAIA-mem16g-novec" - dtbs = {} - for isa_config, expected, absent in [ - (None, "zicbom", "zca"), - ("kunminghu-v3", "zicbom", "zca"), - ("kunminghu-v2", "zca", "zicbom")]: - with self.subTest(isa_config=isa_config), tempfile.TemporaryDirectory() as tmp: - root = Path(tmp) - templates = root / "templates" - gcpt, kernel = root / "gcpt.bin", root / "Image" - gcpt.write_bytes(b"GCPT" * 16) - kernel.write_bytes(b"KERNEL" * 1024) - sbi_dir = root / "sbi" - sbi = sbi_dir / "build/platform/generic/firmware/fw_jump.bin" - sbi.parent.mkdir(parents=True) - sbi.write_bytes(b"SBI" * 128) - workload = root / "workload" - workload.mkdir() - (workload / "rootfs.cpio").write_bytes(b"INITRAMFS" * 1024) - env = dict(os.environ, DTC=str(DTC), DEFAULT_DTB=name, - MULTIHART="0", HARTS="1") - for key in ("DTB_MEMORY_PROFILE", "DTB_MIN_MEMORY_BYTES", - "DTB_REQUIRED_MIN_MEMORY_BYTES", "FIRMWARE_OUTPUT"): - env.pop(key, None) - if isa_config: - env["DTS_ISA_CONFIG"] = isa_config - else: - env.pop("DTS_ISA_CONFIG", None) - packed = subprocess.run( - ["bash", str(Path(BUILDER) / "scripts/build-firmware-linux.sh"), - str(gcpt), str(sbi_dir), str(templates), str(kernel), str(workload)], - env=env, text=True, capture_output=True) - self.assertEqual(packed.returncode, 0, packed.stderr) - dtb = workload / "dt" / f"{name}.dtb" - extensions = subprocess.check_output( - [str(FDTGET), str(dtb), "/cpus/cpu@0", "riscv,isa-extensions"], - text=True).split() - self.assertIn(expected, extensions) - self.assertNotIn(absent, extensions) - dtbs[isa_config] = dtb.read_bytes() - self.assertEqual(dtbs[None], dtbs["kunminghu-v3"]) - self.assertNotEqual(dtbs[None], dtbs["kunminghu-v2"]) - - @unittest.skipUnless(DTC and FDTGET and BUILDER, "DTC, FDTGET and WORKLOAD_BUILDER required") - def test_real_builder_packs_generated_templates(self): - for profile, harts, memory_gib in [ - ("fpga-noaia-novec", 1, 2), ("nemu", 1, None), - ("qemu-nemu", 1, 8), ("qemu-nemu", 2, 16), ("qemu-nemu", 128, 64), - ]: - with self.subTest(profile=profile, harts=harts), tempfile.TemporaryDirectory() as tmp: - root = Path(tmp) - templates = root / "templates" - args = ["--profile", profile, "--harts", harts, - "--output", templates / "generated.dts.in"] - if memory_gib: - args += ["--memory-gib", memory_gib] - generate(*args) - # Distinct small payloads exercise packaging, not CPU execution. - gcpt, kernel = root / "gcpt.bin", root / "Image" - gcpt.write_bytes(b"GCPT" * 16) - kernel.write_bytes(b"KERNEL" * 1024) - sbi_dir = root / "sbi" - sbi = sbi_dir / "build/platform/generic/firmware/fw_jump.bin" - sbi.parent.mkdir(parents=True) - sbi.write_bytes(b"SBI" * 128) - workload = root / "workload" - workload.mkdir() - initrd = workload / "rootfs.cpio" - initrd.write_bytes(b"INITRAMFS" * 1024) - env = dict(os.environ, DTC=str(DTC), DEFAULT_DTB="generated", - MULTIHART="1" if harts > 1 else "0", HARTS=str(harts)) - for key in ("DTB_MEMORY_PROFILE", "DTB_MIN_MEMORY_BYTES", - "DTB_REQUIRED_MIN_MEMORY_BYTES", "FIRMWARE_OUTPUT"): - env.pop(key, None) - packed = subprocess.run( - ["bash", str(Path(BUILDER) / "scripts/build-firmware-linux.sh"), - str(gcpt), str(sbi_dir), str(templates), str(kernel), str(workload)], - env=env, text=True, capture_output=True) - self.assertEqual(packed.returncode, 0, packed.stderr) - dtb = workload / "dt/generated.dtb" - def prop(node, name): - value = subprocess.check_output( - [str(FDTGET), "-t", "x", str(dtb), node, name], text=True) - return [int(cell, 16) for cell in value.split()] - self.assertEqual(prop("/cpus", "timebase-frequency"), [1000000]) - size = (memory_gib << 30) if memory_gib else (128 << 20) - self.assertEqual(prop("/memory@80000000", "reg"), - [0, 0x80000000, size >> 32, size & 0xffffffff]) - cpus = subprocess.check_output( - [str(FDTGET), "-l", str(dtb), "/cpus"], text=True).split() - self.assertEqual(len(cpus), harts) - self.assertEqual(prop(f"/cpus/cpu@{harts - 1:x}", "reg"), [harts - 1]) - interrupt_parent = "/soc/" if profile == "fpga-noaia-novec" else "/" - plic_name = ("interrupt-controller@3c000000" - if profile == "fpga-noaia-novec" else "plic@3c000000") - for name, irqs in (("clint@38000000", (3, 7)), (plic_name, (11, 9))): - actual = prop(interrupt_parent + name, "interrupts-extended") - if name.startswith("plic") and profile == "nemu": - irqs = (9, 11) - self.assertEqual(actual[1::2], list(irqs) * harts) - expected_handles = [] - for hart in range(harts): - handle = prop(f"/cpus/cpu@{hart:x}/interrupt-controller", "phandle")[0] - expected_handles.extend([handle, handle]) - self.assertEqual(actual[0::2], expected_handles) - if profile == "fpga-noaia-novec": - def strings(node, name): - value = subprocess.check_output( - [str(FDTGET), str(dtb), node, name], text=True) - return value.split() - self.assertEqual(strings("/soc", "compatible"), - ["freechips,rocketchip-unknown-soc", "simple-bus"]) - self.assertEqual(strings("/soc/clint@38000000", "reg-names"), - ["control"]) - self.assertEqual(strings( - "/soc/interrupt-controller@3c000000", "reg-names"), - ["control"]) - self.assertEqual(prop("/cpus/cpu@0", "timebase-frequency"), - [1000000]) - if harts > 1: - self.assertEqual(prop("/reserved-memory/checkpoint@80300000", "reg"), - [0, 0x80300000, 0, 0x8300000]) - start = prop("/chosen", "linux,initrd-start") - end = prop("/chosen", "linux,initrd-end") - initrd_start = (start[0] << 32) | start[1] - initrd_end = (end[0] << 32) | end[1] - self.assertEqual(initrd_end - initrd_start, initrd.stat().st_size) - with (workload / "fw_payload.bin").open("rb") as image: - self.assertEqual(image.read(gcpt.stat().st_size), gcpt.read_bytes()) - image.seek(1024 * 1024) - self.assertEqual(image.read(sbi.stat().st_size), sbi.read_bytes()) - image.seek(2048 * 1024) - self.assertEqual(image.read(dtb.stat().st_size), dtb.read_bytes()) - image.seek(0x08600000 if harts > 1 else 0x00400000) - self.assertEqual(image.read(kernel.stat().st_size), kernel.read_bytes()) - image.seek(initrd_start - 0x80000000) - self.assertEqual(image.read(), initrd.read_bytes()) - - -if __name__ == "__main__": - unittest.main() diff --git a/scripts/dts-config.sh b/scripts/dts-config.sh index 12cf836..ba24668 100755 --- a/scripts/dts-config.sh +++ b/scripts/dts-config.sh @@ -1,17 +1,15 @@ #!/usr/bin/env bash -# Generate a recognized DTS basename or refresh a custom template from its source. +# Generate a recognized DTS basename into the build template directory. dts_generate_template() { local dts_dir="$1" local default_dtb="$2" - local generator="$(dirname "${BASH_SOURCE[0]}")/generate-nemu-board-dts.py" - local custom_dir="$(dirname "${BASH_SOURCE[0]}")/../dts" + local generator="$(dirname "${BASH_SOURCE[0]}")/../dts/generate-nemu-board-dts.py" local output="$dts_dir/$default_dtb.dts.in" local isa_config="${DTS_ISA_CONFIG:-kunminghu-v3}" python3 "$generator" --name "$default_dtb" --output "$output" \ - --isa-config "$isa_config" \ - --custom-template-dir "$custom_dir" + --isa-config "$isa_config" } # Print the selected DTS address configuration as three shell words: diff --git a/workloads/linux/gapbs/rules.mk b/workloads/linux/gapbs/rules.mk index d4714c9..554b3a1 100644 --- a/workloads/linux/gapbs/rules.mk +++ b/workloads/linux/gapbs/rules.mk @@ -19,8 +19,8 @@ GAPBS_SBI_BUILD_DIR ?= $(if $(SBI_BUILD_DIR),$(SBI_BUILD_DIR),$(GAPBS_REPO_ROOT) GAPBS_SBI_BIN ?= $(if $(SBI_BIN),$(SBI_BIN),$(GAPBS_SBI_BUILD_DIR)/build/platform/generic/firmware/fw_jump.bin) GAPBS_BUILDROOT_CROSS_COMPILE ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/riscv64-linux- GAPBS_DTC ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/dtc -GAPBS_DTS_SOURCES := $(GAPBS_SCRIPTS_DIR)/generate-nemu-board-dts.py $(GAPBS_REPO_ROOT)/nemu_board/dts/DTSGen.py $(GAPBS_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ - $(wildcard $(GAPBS_REPO_ROOT)/dts/$(GAPBS_DEFAULT_DTB).dts.in) +GAPBS_DTS_SOURCES := $(GAPBS_REPO_ROOT)/dts/generate-nemu-board-dts.py $(GAPBS_REPO_ROOT)/dts/generate-workload-builder-dts.py \ + $(GAPBS_REPO_ROOT)/dts/DTSGen.py $(GAPBS_REPO_ROOT)/dts/workload-builder-profiles.json GAPBS_FIRMWARE_VARS_HASH := $(shell printf '%s\n' 'default_dtb=$(GAPBS_DEFAULT_DTB)' 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) GAPBS_FIRMWARE_VARS_STAMP := $(GAPBS_BUILD_DIR)/firmware-vars.$(GAPBS_FIRMWARE_VARS_HASH).stamp GAPBS_ALL_CASES := $(shell python3 $(GAPBS_HELPER) --list-cases) diff --git a/workloads/linux/geekbench-common.mk b/workloads/linux/geekbench-common.mk index 84eb9ed..70d02ca 100644 --- a/workloads/linux/geekbench-common.mk +++ b/workloads/linux/geekbench-common.mk @@ -29,7 +29,7 @@ build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp: rm -f "$$(@D)"/firmware-vars.*.stamp touch "$$@" -build/linux-workloads/$(1)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(GEEKBENCH_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp +build/linux-workloads/$(1)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp CROSS_COMPILE="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" \ DEFAULT_DTB="$(GEEKBENCH_DEFAULT_DTB)" \ diff --git a/workloads/linux/rocksdb/rules.mk b/workloads/linux/rocksdb/rules.mk index 9207025..7f2173f 100644 --- a/workloads/linux/rocksdb/rules.mk +++ b/workloads/linux/rocksdb/rules.mk @@ -33,8 +33,8 @@ ROCKSDB_OPT_FLAGS ?= -O3 -ftree-vectorize -ftree-loop-vectorize -ftree-slp-vecto ROCKSDB_DTC ?= $(ROCKSDB_BUILDROOT_DIR)/output/host/bin/dtc ROCKSDB_COMMON_STAMP := $(ROCKSDB_BUILD_DIR)/common.stamp ROCKSDB_PACKAGE_HELPER := $(ROCKSDB_WORKLOAD_DIR)/package-case.sh -ROCKSDB_DTS_SOURCES := $(ROCKSDB_SCRIPTS_DIR)/generate-nemu-board-dts.py $(ROCKSDB_REPO_ROOT)/nemu_board/dts/DTSGen.py $(ROCKSDB_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ - $(wildcard $(ROCKSDB_REPO_ROOT)/dts/$(ROCKSDB_DEFAULT_DTB).dts.in) +ROCKSDB_DTS_SOURCES := $(ROCKSDB_REPO_ROOT)/dts/generate-nemu-board-dts.py $(ROCKSDB_REPO_ROOT)/dts/generate-workload-builder-dts.py \ + $(ROCKSDB_REPO_ROOT)/dts/DTSGen.py $(ROCKSDB_REPO_ROOT)/dts/workload-builder-profiles.json ROCKSDB_NON_COMMON_INPUTS := $(ROCKSDB_WORKLOAD_DIR)/README.md $(ROCKSDB_WORKLOAD_DIR)/links.txt $(ROCKSDB_WORKLOAD_DIR)/rules.mk $(ROCKSDB_PACKAGE_HELPER) ROCKSDB_COMMON_INPUTS := $(filter-out $(ROCKSDB_NON_COMMON_INPUTS),$(shell find $(ROCKSDB_WORKLOAD_DIR) -type f 2>/dev/null)) ROCKSDB_CASE_FIRMWARE := $(foreach case,$(ROCKSDB_CASES),$(ROCKSDB_BUILD_DIR)/$(case)/fw_payload.bin) diff --git a/workloads/linux/spec2006/rules.mk b/workloads/linux/spec2006/rules.mk index b84a1ba..3d10c1b 100644 --- a/workloads/linux/spec2006/rules.mk +++ b/workloads/linux/spec2006/rules.mk @@ -57,8 +57,8 @@ SPEC2006_ALL_CASES := $(shell python3 $(SPEC2006_HELPER) --cases-config $(SPEC20 SPEC2006_SELECTED_CASES := $(shell python3 $(SPEC2006_HELPER) --cases-config $(SPEC2006_CASE_CONFIG) --list-cases --input-set $(SPEC2006_INPUT) 2>/dev/null) SPEC2006_IMAGE_CASES := $(if $(BENCH),$(SPEC2006_CASE),$(SPEC2006_SELECTED_CASES)) SPEC2006_ELF_TARGETS := $(foreach case,$(SPEC2006_SELECTED_CASES),$(SPEC2006_BUILD_DIR)/$(case)/elf/$(case).elf) -SPEC2006_DTS_SOURCES := $(SPEC2006_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2006_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2006_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ - $(wildcard $(SPEC2006_REPO_ROOT)/dts/$(SPEC2006_DEFAULT_DTB).dts.in) +SPEC2006_DTS_SOURCES := $(SPEC2006_REPO_ROOT)/dts/generate-nemu-board-dts.py $(SPEC2006_REPO_ROOT)/dts/generate-workload-builder-dts.py \ + $(SPEC2006_REPO_ROOT)/dts/DTSGen.py $(SPEC2006_REPO_ROOT)/dts/workload-builder-profiles.json SPEC2006_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2006_CFG))" ]; then sha256sum "$(abspath $(SPEC2006_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) SPEC2006_DEFAULT_DTB_STAMP := $(SPEC2006_BUILD_DIR)/dtb.$(shell printf '%s\n' "$(SPEC2006_DEFAULT_DTB)" "$(DTS_ISA_CONFIG)" | sha256sum | cut -d ' ' -f 1) SPEC2006_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2006_INPUT)' '$(SPEC2006_TUNE)' '$(SPEC2006_JOBS)' '$(SPEC2006_CROSS_COMPILE)' 'multihart=$(SPEC2006_MULTIHART)' 'harts=$(SPEC2006_HARTS)' | sha256sum | cut -d ' ' -f 1) diff --git a/workloads/linux/spec2017/rules.mk b/workloads/linux/spec2017/rules.mk index 306a927..30bc3a1 100644 --- a/workloads/linux/spec2017/rules.mk +++ b/workloads/linux/spec2017/rules.mk @@ -80,8 +80,8 @@ SPEC2017_CASE := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --resolve-case -- SPEC2017_ALL_CASES := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set all --mode all 2>/dev/null) SPEC2017_SELECTED_CASES := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set $(SPEC2017_INPUT) --mode $(SPEC2017_MODE) 2>/dev/null) SPEC2017_IMAGE_CASES := $(if $(BENCH),$(SPEC2017_CASE),$(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set $(SPEC2017_IMAGE_INPUT) --mode $(SPEC2017_IMAGE_MODE) 2>/dev/null)) -SPEC2017_DTS_SOURCES := $(SPEC2017_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2017_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2017_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ - $(wildcard $(SPEC2017_REPO_ROOT)/dts/$(SPEC2017_DEFAULT_DTB).dts.in) +SPEC2017_DTS_SOURCES := $(SPEC2017_REPO_ROOT)/dts/generate-nemu-board-dts.py $(SPEC2017_REPO_ROOT)/dts/generate-workload-builder-dts.py \ + $(SPEC2017_REPO_ROOT)/dts/DTSGen.py $(SPEC2017_REPO_ROOT)/dts/workload-builder-profiles.json WORKLOAD_DIRS += $(SPEC2017_BUILD_DIR) diff --git a/workloads/linux/spec2026/rules.mk b/workloads/linux/spec2026/rules.mk index 8f9540c..ae7d09a 100644 --- a/workloads/linux/spec2026/rules.mk +++ b/workloads/linux/spec2026/rules.mk @@ -46,8 +46,8 @@ SPEC2026_SPEED_DTB_MIN_MEMORY_BYTES ?= 68719476736 SPEC2026_ALL_CASES := $(shell python3 $(SPEC2026_HELPER) --list-cases --mode all 2>/dev/null) SPEC2026_SELECTED_CASES := $(shell python3 $(SPEC2026_HELPER) --list-cases --input-set $(SPEC2026_INPUT) --mode $(SPEC2026_MODE) 2>/dev/null) SPEC2026_IMAGE_CASES := $(if $(BENCH),$(BENCH),$(shell python3 $(SPEC2026_HELPER) --list-cases --input-set $(SPEC2026_IMAGE_INPUT) --mode $(SPEC2026_IMAGE_MODE) 2>/dev/null)) -SPEC2026_DTS_SOURCES := $(SPEC2026_SCRIPTS_DIR)/generate-nemu-board-dts.py $(SPEC2026_REPO_ROOT)/nemu_board/dts/DTSGen.py $(SPEC2026_REPO_ROOT)/nemu_board/dts/workload-builder-profiles.json \ - $(wildcard $(SPEC2026_REPO_ROOT)/dts/$(SPEC2026_DEFAULT_DTB).dts.in) +SPEC2026_DTS_SOURCES := $(SPEC2026_REPO_ROOT)/dts/generate-nemu-board-dts.py $(SPEC2026_REPO_ROOT)/dts/generate-workload-builder-dts.py \ + $(SPEC2026_REPO_ROOT)/dts/DTSGen.py $(SPEC2026_REPO_ROOT)/dts/workload-builder-profiles.json SPEC2026_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2026_CFG))" ]; then sha256sum "$(abspath $(SPEC2026_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) SPEC2026_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2026_INPUT)' '$(SPEC2026_TUNE)' '$(SPEC2026_JOBS)' '$(SPEC2026_CROSS_COMPILE)' '$(SPEC2026_COMPILER_ROOT)' 'jemalloc_root=$(SPEC2026_JEMALLOC_ROOT)' 'jemalloc_repo=$(SPEC2026_JEMALLOC_REPO)' 'jemalloc_commit=$(SPEC2026_JEMALLOC_COMMIT)' 'jemalloc_host=$(SPEC2026_JEMALLOC_CONFIGURE_HOST)' | sha256sum | cut -d ' ' -f 1) diff --git a/workloads/linux/specjbb2015/rules.mk b/workloads/linux/specjbb2015/rules.mk index c4eb2ce..14d50c5 100644 --- a/workloads/linux/specjbb2015/rules.mk +++ b/workloads/linux/specjbb2015/rules.mk @@ -41,7 +41,7 @@ $(SPECJBB2015_BUILD_DIR)/rootfs.cpio: $(shell find $(SPECJBB2015_DIR)) $(TOOLCHA HARTS="$(SPECJBB2015_HARTS)" MULTIHART=0 \ bash scripts/build-workload-linux.sh workloads/linux/specjbb2015 $(SPECJBB2015_BUILD_DIR) -$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: scripts/generate-nemu-board-dts.py nemu_board/dts/DTSGen.py nemu_board/dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) +$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) @CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" DEFAULT_DTB="$(SPECJBB2015_DEFAULT_DTB)" \ MULTIHART="$(SPECJBB2015_MULTIHART)" HARTS="$(SPECJBB2015_HARTS)" \ From c29063bdaf3b51c6111b86aefce882bb11fe6c13 Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Sat, 12 Sep 2026 20:16:44 +0800 Subject: [PATCH 08/13] fix(dts): restore custom template compatibility Share profile rendering between the DTS entry points and keep legacy and structured ISA declarations consistent. Restore explicit custom template handling and track those templates as firmware build dependencies. --- Makefile | 3 +- README.md | 7 +- dts/DTSGen.py | 41 +++-- dts/README.md | 17 +-- dts/build_dual_core_for_qemu.sh | 12 -- dts/build_eight_core_for_qemu.sh | 12 -- dts/build_four_core_for_qemu.sh | 12 -- dts/build_single_core_for_nemu.sh | 11 -- dts/build_sixteen_core_for_qemu.sh | 12 -- dts/generate-nemu-board-dts.py | 214 ++++++++++++++++++--------- dts/generate-workload-builder-dts.py | 173 ++++------------------ nemu_board/.gitignore | 4 - scripts/dts-config.sh | 12 +- workloads/linux/gapbs/rules.mk | 3 +- workloads/linux/geekbench-common.mk | 2 +- workloads/linux/rocksdb/rules.mk | 3 +- workloads/linux/spec2006/rules.mk | 3 +- workloads/linux/spec2017/rules.mk | 3 +- workloads/linux/spec2026/rules.mk | 3 +- workloads/linux/specjbb2015/rules.mk | 2 +- 20 files changed, 232 insertions(+), 317 deletions(-) delete mode 100755 dts/build_dual_core_for_qemu.sh delete mode 100755 dts/build_eight_core_for_qemu.sh delete mode 100755 dts/build_four_core_for_qemu.sh delete mode 100755 dts/build_single_core_for_nemu.sh delete mode 100755 dts/build_sixteen_core_for_qemu.sh delete mode 100644 nemu_board/.gitignore diff --git a/Makefile b/Makefile index f5218a3..dd558d1 100644 --- a/Makefile +++ b/Makefile @@ -78,7 +78,8 @@ GCPT_DTB_CONFIG_HASH := $(shell printf '%s\n' "$(GCPT_DEFAULT_DTB)" | sha256sum GCPT_CONFIG_STAMP := $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint-config/mode.$(GCPT_CONFIGURE_MODE).serial-port.$(GCPT_SERIAL_PORT),build/LibCheckpointAlpha-config/dtb.$(GCPT_DTB_CONFIG_HASH)) GCPT_SOURCES := $(if $(filter 1,$(MULTIHART)),$(shell find $(GCPT_SOURCE_DIR) -path '*/.git' -prune -o -path '*/tests' -prune -o -type f -print 2>/dev/null),$(shell find $(GCPT_SOURCE_DIR) -path '*/.git' -prune -o -type f -print 2>/dev/null)) GCPT_DTS_SOURCES := dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py \ - dts/DTSGen.py dts/workload-builder-profiles.json + dts/DTSGen.py dts/workload-builder-profiles.json \ + $(wildcard dts/$(GCPT_DEFAULT_DTB).dts.in) $(GCPT_CONFIG_STAMP): mkdir -p "$(@D)" rm -f $(if $(filter 1,$(MULTIHART)),build/LibCheckpoint-config/mode.*,build/LibCheckpointAlpha-config/dtb.*) diff --git a/README.md b/README.md index 1c58f76..ca3070c 100644 --- a/README.md +++ b/README.md @@ -71,7 +71,8 @@ with `PLATFORM=nemu` is rejected. It creates per-hart workload directories, uses `/bin/nemu-trap` to send codes 256 and 257 before each benchmark copy and code 258 after it returns, and requires `DEFAULT_DTB` to be set to the complete DTS basename. Recognized basenames are generated into `build/generated-dts`; -the build still fails rather than guessing an omitted hart or memory profile. +an unsupported basename can be supplied explicitly as `dts/.dts.in`. +The build still fails rather than guessing an omitted hart or memory profile. Other Linux workload targets remain NEMU-only. SPECjbb2015 can be built from locally supplied licensed media and an RV64 JDK: @@ -290,8 +291,8 @@ Then run `make` to build your new workload. Device trees are generated from the sources in [dts/README.md](dts/README.md). Use `DEFAULT_DTB=device_name` to select a built-in generator profile; Make writes the resulting template to `build/generated-dts` before compiling it. -Unknown basenames are rejected because this repository no longer carries -checked-in custom `.dts.in` templates. +To add a custom device tree, place `dts/device_name.dts.in` in the repository +and select it with the same `DEFAULT_DTB=device_name` interface. For generated `xiangshan-fpga-noAIA*` templates, the default ISA declaration is Kunminghu V3. Select V2 with `DTS_ISA_CONFIG=kunminghu-v2`; the DTB basename diff --git a/dts/DTSGen.py b/dts/DTSGen.py index 3cdd5f8..802b917 100755 --- a/dts/DTSGen.py +++ b/dts/DTSGen.py @@ -90,13 +90,13 @@ def add_reserved_memory(self, start: int, size: int, name: str | None = None, no def indent(text, level: int = 4): indent_str = ' ' * level return "\n".join(indent_str + line if line.strip() != "" else line for line in text.split("\n")) - + def gen_addrsize(addrsize, cell_number): res = "" for i in range(cell_number): res += f"0x{(addrsize >> (32 * (cell_number - i - 1))) & 0xFFFFFFFF:x} " return res.strip() - + def __gen_memory(self, memory_start, memory_size): return f""" memory@{memory_start:x} {{ @@ -141,13 +141,17 @@ def __gen_cpu_node(self, hart_id, isa): """.strip() def __gen_cpus(self): + cpu_nodes = "\n".join( + self.__gen_cpu_node(hart_id, self.isa_extensions) + "\n" + for hart_id in range(self.nr_harts) + ) return f""" cpus {{ #address-cells = <1>; #size-cells = <0>; timebase-frequency = <{self.timebase_freq}>; -{DTSGen.indent('\n'.join(self.__gen_cpu_node(hart_id, self.isa_extensions) + "\n" for hart_id in range(self.nr_harts)))} +{DTSGen.indent(cpu_nodes)} }}; """.strip() @@ -228,7 +232,7 @@ def __gen_reserved_memory(self): res += DTSGen.indent("\n".join(entry_lines) + "\n") res += "};" return res - + def __gen_uartlite(self, uartlite_addr, plic_addr): # https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/serial/xlnx%2Copb-uartlite.yaml # Uartlite hardware does not handle clock division, so we do @@ -251,7 +255,7 @@ def __gen_nemu_sdhci(self, sd_addr): reg = <{DTSGen.gen_addrsize(sd_addr, 2)} {DTSGen.gen_addrsize(0x1000, 2)}>; }}; """.strip() - + def __gen_soc(self): compatible_list = ", ".join(f'"{compatible}"' for compatible in self.soc_compatible) res = f""" @@ -269,7 +273,7 @@ def __gen_soc(self): res += DTSGen.indent(dev_str, 4) + "\n\n" res += "};" return res.strip() - + def sort_isa_extensions(ext_list: list): SINGLE_ORDER = list("IMAFDQLCBKJTPVH") # Helper to categorize an extension name @@ -316,8 +320,8 @@ def compare_ext(a: str, b: str): # tie-breaker: lex order on base return -1 if ca[2] < cb[2] else (1 if ca[2] > cb[2] else 0) return sorted(ext_list, key=cmp_to_key(compare_ext)) - - + + def get_isa_extensions_by_rva_profile(rva_profile: str): RVA20U64 = { "i", "m", "a", "f", "d", "c", @@ -363,13 +367,24 @@ def get_isa_extensions_by_rva_profile(rva_profile: str): elif rva_profile == "rva23s64": return DTSGen.sort_isa_extensions(list(RVA23S64)) assert False, f"Unknown rva profile string: {rva_profile}" - + def add_device(self, dev_str: str): self.soc_devices.append(dev_str) return self def gen_dts(self): compatible_list = ", ".join(f'"{compatible}"' for compatible in self.compatible) + bootargs = (DTSGen.indent(f"bootargs = {json.dumps(self.bootargs)};", 8) + if self.bootargs else "") + rng_seed = "" + if self.rng_seed: + ascii_seed = self.rng_seed.decode("ascii", "backslashreplace") + hex_seed = " ".join(f"0x{byte:02x}" for byte in self.rng_seed) + rng_seed = DTSGen.indent( + f'/* ASCII: "{ascii_seed}" */\nrng-seed = /bits/ 8 <{hex_seed}>;', 8) + memories = DTSGen.indent("\n".join( + self.__gen_memory(start, size) for (start, size) in self.memories + )) return f""" /dts-v1/; @@ -378,14 +393,14 @@ def gen_dts(self): #size-cells = <2>; compatible = {compatible_list}; model = "{self.model}"; - + chosen {{ -{DTSGen.indent(f'bootargs = {json.dumps(self.bootargs)};', 8) if self.bootargs else ''} -{DTSGen.indent(f'/* ASCII: "{self.rng_seed.decode("ascii", "backslashreplace")}" */\nrng-seed = /bits/ 8 <{" ".join(f"0x{b:02x}" for b in self.rng_seed)}>;', 8) if self.rng_seed else ''} +{bootargs} +{rng_seed} {DTSGen.indent(self.chosen_properties, 8)} }}; -{DTSGen.indent('\n'.join(self.__gen_memory(start, size) for (start, size) in self.memories))} +{memories} {DTSGen.indent(self.__gen_cpus())} diff --git a/dts/README.md b/dts/README.md index 43a6f1c..e57c8a3 100644 --- a/dts/README.md +++ b/dts/README.md @@ -2,9 +2,10 @@ This directory is the canonical source for workload-builder device-tree generation. It contains `DTSGen.py`, the profile generator, the build-facing -basename generator, and profile data. Checked-in `.dts.in` templates are not -required; recognized `DEFAULT_DTB` names are generated into -`build/generated-dts` during the build. +basename generator, and profile data. Recognized `DEFAULT_DTB` names are +generated into `build/generated-dts` during the build. An unsupported custom +basename can be supplied explicitly as `dts/.dts.in`; the build copies it +into the generated directory before packing the firmware. ## Generate A Template @@ -36,9 +37,9 @@ python3 dts/generate-nemu-board-dts.py \ Built-in names include the `xiangshan`, `yanqihu`, `nutshell`, and `spike` profiles, FPGA noAIA names, and QEMU `nemu` names of the form -`[-hart][-memg][-novec]`. Unknown names fail with an -`unsupported DTS basename` error because the repository no longer carries -static custom templates. +`[-hart][-memg][-novec]`. Unknown names use a matching +custom template passed through `--custom-template-dir`; otherwise generation +fails with an `unsupported DTS basename` error. For generated FPGA noAIA names, select the ISA declaration independently of the basename: @@ -61,10 +62,6 @@ python3 dts/DTSGen.py --nr-harts 2 --memory-size 0x400000000 \ --rva-profile rva23s64 | dtc -O dtb -o build/example.dtb - ``` -The helper shell scripts in this directory demonstrate common NEMU and QEMU -hart-count configurations. They emit DTBs under `build/` and are independent -of the workload-builder firmware packer. - ## Profiles And Validation Profile data is stored in `workload-builder-profiles.json`. The `source` URLs diff --git a/dts/build_dual_core_for_qemu.sh b/dts/build_dual_core_for_qemu.sh deleted file mode 100755 index a8965f0..0000000 --- a/dts/build_dual_core_for_qemu.sh +++ /dev/null @@ -1,12 +0,0 @@ -if [ -z "$(ls -A build)" ]; then - echo "The build directory is empty. Creating the directory..." - mkdir build -fi -python3 DTSGen.py \ - --nr-harts 2 \ - --rva-profile rva23s64 \ - --bootargs "console=hvc0 earlycon=sbi" \ - -r 0x80000000 0x100000 \ - -r 0x80300000 0x1400000 \ - --mmu-type riscv,sv48 | \ -dtc -O dtb -o build/xiangshan_dualcore.dtb - diff --git a/dts/build_eight_core_for_qemu.sh b/dts/build_eight_core_for_qemu.sh deleted file mode 100755 index 4406733..0000000 --- a/dts/build_eight_core_for_qemu.sh +++ /dev/null @@ -1,12 +0,0 @@ -if [ -z "$(ls -A build)" ]; then - echo "The build directory is empty. Creating the directory..." - mkdir build -fi -python3 DTSGen.py \ - --nr-harts 8 \ - --rva-profile rva23s64 \ - --bootargs "console=hvc0 earlycon=sbi" \ - -r 0x80000000 0x100000 \ - -r 0x80300000 0x1400000 \ - --mmu-type riscv,sv48 | \ -dtc -O dtb -o build/xiangshan_eightcore.dtb - diff --git a/dts/build_four_core_for_qemu.sh b/dts/build_four_core_for_qemu.sh deleted file mode 100755 index c51d73b..0000000 --- a/dts/build_four_core_for_qemu.sh +++ /dev/null @@ -1,12 +0,0 @@ -if [ -z "$(ls -A build)" ]; then - echo "The build directory is empty. Creating the directory..." - mkdir build -fi -python3 DTSGen.py \ - --nr-harts 4 \ - --rva-profile rva23s64 \ - --bootargs "console=hvc0 earlycon=sbi" \ - -r 0x80000000 0x100000 \ - -r 0x80300000 0x1400000 \ - --mmu-type riscv,sv48 | \ -dtc -O dtb -o build/xiangshan_fourcore.dtb - diff --git a/dts/build_single_core_for_nemu.sh b/dts/build_single_core_for_nemu.sh deleted file mode 100755 index 4784fe6..0000000 --- a/dts/build_single_core_for_nemu.sh +++ /dev/null @@ -1,11 +0,0 @@ -if [ -z "$(ls -A build)" ]; then - echo "The build directory is empty. Creating the directory..." - mkdir build -fi -python3 DTSGen.py \ - --nr-harts 1 \ - --nemu-sdhci-addr 0x40002000 \ - --rva-profile rva23s64 \ - --bootargs "console=hvc0 earlycon=sbi" \ - --mmu-type riscv,sv48 | \ -dtc -O dtb -o build/xiangshan.dtb - diff --git a/dts/build_sixteen_core_for_qemu.sh b/dts/build_sixteen_core_for_qemu.sh deleted file mode 100755 index f97863e..0000000 --- a/dts/build_sixteen_core_for_qemu.sh +++ /dev/null @@ -1,12 +0,0 @@ -if [ -z "$(ls -A build)" ]; then - echo "The build directory is empty. Creating the directory..." - mkdir build -fi -python3 DTSGen.py \ - --nr-harts 16 \ - --rva-profile rva23s64 \ - --bootargs "console=hvc0 earlycon=sbi" \ - -r 0x80000000 0x100000 \ - -r 0x80300000 0x1400000 \ - --mmu-type riscv,sv48 | \ -dtc -O dtb -o build/xiangshan_sixteencore.dtb - diff --git a/dts/generate-nemu-board-dts.py b/dts/generate-nemu-board-dts.py index d898141..8cd8ca1 100644 --- a/dts/generate-nemu-board-dts.py +++ b/dts/generate-nemu-board-dts.py @@ -179,87 +179,150 @@ def aia_devices(): };"""] -def render(name, isa_config_name="kunminghu-v3"): - nr_harts, memory = parse_name(name) +def render_profile(profile_name, *, nr_harts=1, memory=None, + isa_config_name=None, isa_extensions=None, + exclude_isa=(), vector_mode=None, + timebase_freq=1000000, mmu_type=None, bootargs=None): DTSGen = load_dtsgen() profiles = json.loads(PROFILE_FILE.read_text()) - is_novec = name.endswith("-novec") - root_nodes = [] - - if isa_config_name != "kunminghu-v3" and not name.startswith("xiangshan-fpga-noAIA"): - raise ValueError("--isa-config is supported by the FPGA noAIA profile only") - - if name.startswith("xiangshan-fpga-noAIA"): - profile = profiles["fpga-noaia-novec"] + profile = profiles[profile_name] + if isa_config_name is not None: + if profile_name != "fpga-noaia-novec": + raise ValueError("--isa-config is supported by the FPGA noAIA profile only") isa_config = (profile if isa_config_name == "kunminghu-v3" else profile["isa_configs"][isa_config_name]) - isa = set(isa_config["isa_extensions"]) - if not is_novec: - isa.update(VECTOR_EXTENSIONS) - else: - isa.difference_update(VECTOR_EXTENSIONS) - if nr_harts > 1: - isa.discard("sstc") - cpu_props = cache_properties() - cpu_props += "\ntimebase-frequency = <1000000>;" - root_nodes.append("""aliases { serial0 = &uart0; };""") - root_nodes.append("""l2_cache: l2-cache { + else: + isa_config = profile + if not 1 <= nr_harts <= 128: + raise ValueError("hart count must be in 1..128") + size = memory or profile["memory_size"] + minimum = 0x08600000 if nr_harts > 1 else 0x00400000 + if size <= minimum or size > (1 << 64) - DRAM_BASE: + raise ValueError("memory must contain the boot layout and fit in the 64-bit address space") + + isa = set(isa_extensions or isa_config["isa_extensions"]) + if any(not re.fullmatch(r"[a-z][a-z0-9]*", ext) for ext in isa): + raise ValueError("ISA extensions must be lowercase extension names") + removed = set(exclude_isa) + if vector_mode == "add": + isa.update(VECTOR_EXTENSIONS) + elif vector_mode == "remove": + removed.add("v") + removed.update(ext for ext in isa if ext == "v" or ext.startswith("zv")) + if nr_harts > 1: + removed.add("sstc") + isa.difference_update(removed) + if "i" not in isa: + raise ValueError("the RV64 generator requires the i base extension") + if {"smaia", "ssaia"} & isa: + raise ValueError("these profiles describe CLINT + PLIC, not AIA") + if "v" not in isa and any(ext.startswith("zv") for ext in isa): + raise ValueError("remove both v and its vector extensions") + + if isa_extensions is None: + parts = isa_config["legacy_isa"].split("_") + base = parts[0][4:] + for ext in removed: + if len(ext) == 1: + base = base.replace(ext, "") + if vector_mode == "add" and "v" not in base: + base = base.replace("h", "vh") + legacy_isa = "_".join( + ["rv64" + base] + [ext for ext in parts[1:] if ext not in removed] + ) + else: + legacy_isa = "rv64" + "".join(ext for ext in "imafdcbvh" if ext in isa) + legacy_isa += "".join("_" + ext for ext in DTSGen.sort_isa_extensions( + sorted(ext for ext in isa if len(ext) > 1))) + + nemu = profile_name == "nemu" + fpga = profile_name == "fpga-noaia-novec" + cpu_props = cache_properties(nemu=nemu) + if fpga: + cpu_props += f"\ntimebase-frequency = <{timebase_freq}>;" + root_nodes = [] + if nemu: + cpu_props += "\nriscv,pmpregions = <16>;\nriscv,pmpgranularity = <4096>;" + else: + cpu_props += "\nnext-level-cache = <&l2_cache>;" + root_nodes = ["aliases { serial0 = &uart0; };", """l2_cache: l2-cache { compatible = "cache"; cache-level = <2>; cache-block-size = <64>; cache-size = <1048576>; +};"""] + + gen = DTSGen( + compatible="freechips,rocketchip-unknown-dev", + model={"fpga-noaia-novec": "xiangshan,Kunminghu-dev", + "qemu-nemu": "qemu,nemu", + "nemu": "freechips,rocketchip-unknown"}[profile_name], + cpu_compatibles=["UCAS,COOSCA1.0" if nemu else "ICT,xiangshan", "riscv"], + isa_extensions=DTSGen.sort_isa_extensions(sorted(isa)), + legacy_isa=legacy_isa, + nr_harts=nr_harts, + mmu_type=mmu_type or ("riscv,sv39" if nemu else "riscv,sv48"), + timebase_freq=timebase_freq, + memories=[(DRAM_BASE, size)], + reserved_memories=[], + uartlite_addr=0x40600000 if nemu else None, + plic_ndev=64 if nemu else 66, + plic_machine_first=not nemu, + cpu_properties=cpu_props, + chosen_properties=chosen_properties("nemu" if nemu else "fpga" if fpga else "qemu"), + root_nodes=root_nodes, + cache_block_operations=["zicbom", "zicboz"] if fpga else None, + interrupts_in_soc=fpga, + soc_compatible=( + ["freechips,rocketchip-unknown-soc", "simple-bus"] + if fpga else "simple-bus"), + plic_node_name="interrupt-controller" if fpga else "plic", + interrupt_reg_names="control" if fpga else None, + bootargs=bootargs if bootargs is not None else ( + "console=hvc0 earlycon=sbi loglevel=8" if fpga + else "console=hvc0 earlycon=sbi"), + ) + gen.add_reserved_memory(DRAM_BASE, 0x100000, name="gcpt") + if nr_harts > 1: + gen.add_reserved_memory(0x80300000, 0x08300000, name="checkpoint") + if nemu: + gen.add_device("""debug-controller@0 { + compatible = "sifive,debug-013", "riscv,debug-013"; + reg = <0x0 0x0 0x0 0x1000>; + reg-names = "control"; + interrupts-extended = <&cpu0_intc 65535>; };""") - cpu_props += "\nnext-level-cache = <&l2_cache>;" - legacy_isa = isa_config["legacy_isa"] - if is_novec: - legacy_isa = legacy_isa.replace("rv64imafdcvh", "rv64imafdch") - else: - legacy_isa = legacy_isa.replace("rv64imafdch", "rv64imafdcvh") - if nr_harts > 1: - legacy_isa = legacy_isa.replace("_sstc", "") - gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", - model="xiangshan,Kunminghu-dev", - cpu_compatibles=["ICT,xiangshan", "riscv"], - isa_extensions=DTSGen.sort_isa_extensions(sorted(isa)), - legacy_isa=legacy_isa, - mmu_type="riscv,sv48", timebase_freq=1000000, - nr_harts=nr_harts, memories=[(DRAM_BASE, memory)], - reserved_memories=[], cpu_properties=cpu_props, - chosen_properties=chosen_properties("fpga"), - root_nodes=root_nodes, cache_block_operations=["zicbom", "zicboz"], - interrupts_in_soc=True, - soc_compatible=["freechips,rocketchip-unknown-soc", "simple-bus"], - plic_node_name="interrupt-controller", interrupt_reg_names="control", - plic_ndev=66, - uartlite_addr=None, - bootargs="console=hvc0 earlycon=sbi loglevel=8") + elif fpga: gen.add_device(debug_controller(nr_harts)) gen.add_device(serial16550()) - elif name.startswith("xiangshan-qemu-nemu"): - isa = set(profiles["qemu-nemu"]["isa_extensions"]) - if is_novec: - isa.difference_update(VECTOR_EXTENSIONS) - cpu_props = cache_properties() - cpu_props += "\nnext-level-cache = <&l2_cache>;" - root_nodes += ["aliases { serial0 = &uart0; };", """l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; -};"""] - gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", model="qemu,nemu", - cpu_compatibles=["ICT,xiangshan", "riscv"], - isa_extensions=DTSGen.sort_isa_extensions(sorted(isa)), - legacy_isa=(profiles["qemu-nemu"]["legacy_isa"] - if not is_novec else profiles["qemu-nemu"]["legacy_isa"].replace("rv64imafdcvh", "rv64imafdch")), - mmu_type="riscv,sv48", timebase_freq=1000000, - nr_harts=nr_harts, memories=[(DRAM_BASE, memory)], - reserved_memories=[], cpu_properties=cpu_props, - chosen_properties=chosen_properties("qemu"), root_nodes=root_nodes, - plic_ndev=66, - uartlite_addr=None, - bootargs="console=hvc0 earlycon=sbi") + else: gen.add_device(serial16550()) + + output = gen.gen_dts() + output = output.replace("0x80300000 0x0 0x8300000", "0x80300000 0x0 0x08300000") + return "/* Generated by nemu_board for workload-builder. */\n" + output + "\n" + + +def render(name, isa_config_name=None): + nr_harts, memory = parse_name(name) + DTSGen = load_dtsgen() + profiles = json.loads(PROFILE_FILE.read_text()) + is_novec = name.endswith("-novec") + + if (isa_config_name not in (None, "kunminghu-v3") + and not name.startswith("xiangshan-fpga-noAIA")): + raise ValueError("--isa-config is supported by the FPGA noAIA profile only") + + if name.startswith("xiangshan-fpga-noAIA"): + return render_profile( + "fpga-noaia-novec", nr_harts=nr_harts, memory=memory, + isa_config_name=isa_config_name, + vector_mode="remove" if is_novec else "add") + elif name.startswith("xiangshan-qemu-nemu"): + return render_profile( + "qemu-nemu", nr_harts=nr_harts, memory=memory, + isa_config_name=None, + vector_mode="remove" if is_novec else None) elif name == "xiangshan": gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", model="freechips,rocketchip-unknown", @@ -350,13 +413,22 @@ def main(): parser.add_argument("--name", required=True, help="DTS basename without .dts.in") parser.add_argument("--output", required=True, type=Path) parser.add_argument("--isa-config", choices=["kunminghu-v3", "kunminghu-v2"], - default="kunminghu-v3", help="named FPGA noAIA ISA declaration (default: kunminghu-v3)") + parser.add_argument("--custom-template-dir", type=Path, + help="directory holding user-supplied templates for " + "unsupported basenames") args = parser.parse_args() if not args.output.name.endswith(".dts.in"): parser.error("--output must end in .dts.in") try: - output = render(args.name, args.isa_config) + try: + output = render(args.name, args.isa_config) + except UnsupportedDTSName: + custom = (args.custom_template_dir / f"{args.name}.dts.in" + if args.custom_template_dir else None) + if custom is None or not custom.is_file(): + raise + output = custom.read_text(encoding="utf-8") args.output.parent.mkdir(parents=True, exist_ok=True) with tempfile.NamedTemporaryFile("w", encoding="utf-8", dir=args.output.parent, delete=False) as tmp: diff --git a/dts/generate-workload-builder-dts.py b/dts/generate-workload-builder-dts.py index 4386059..9d9646b 100644 --- a/dts/generate-workload-builder-dts.py +++ b/dts/generate-workload-builder-dts.py @@ -2,17 +2,10 @@ """Generate a workload-builder .dts.in template (not a compiled DTB).""" import argparse -import json -import re +import importlib.util from pathlib import Path -from DTSGen import DTSGen - - -PROFILES = Path(__file__).with_name("workload-builder-profiles.json") -DRAM_BASE = 0x80000000 -CHECKPOINT_START = 0x80300000 -CHECKPOINT_SIZE = 0x08300000 +GENERATOR = Path(__file__).with_name("generate-nemu-board-dts.py") def positive_int(value): @@ -22,148 +15,38 @@ def positive_int(value): return number +def load_generator(): + spec = importlib.util.spec_from_file_location("workload_builder_dts", GENERATOR) + if spec is None or spec.loader is None: + raise SystemExit(f"cannot load DTS generator: {GENERATOR}") + module = importlib.util.module_from_spec(spec) + spec.loader.exec_module(module) + return module + + def render(args): - profile = json.loads(PROFILES.read_text())[args.profile] - isa_config = profile - if args.isa_config: - if args.profile != "fpga-noaia-novec": - raise ValueError("--isa-config is supported by the FPGA profile only") - if args.isa_config != "kunminghu-v3": - isa_config = profile["isa_configs"][args.isa_config] - if not 1 <= args.harts <= 128: - raise ValueError("--harts must be in 1..128") if args.harts > 1 and args.profile != "qemu-nemu": raise ValueError("workload-builder multi-hart firmware requires --profile qemu-nemu") - size = args.memory_size or profile["memory_size"] - minimum = 0x08600000 if args.harts > 1 else 0x00400000 - if size <= minimum or size > (1 << 64) - DRAM_BASE: - raise ValueError("memory must contain the boot layout and fit in the 64-bit address space") - - isa = list(dict.fromkeys(args.isa_extensions or isa_config["isa_extensions"])) - if any(not re.fullmatch(r"[a-z][a-z0-9]*", ext) for ext in isa): - raise ValueError("ISA extensions must be lowercase extension names") - removed = set(args.exclude_isa) - if args.no_vector: - removed.add("v") - removed.update(ext for ext in isa if ext == "v" or ext.startswith("zv")) - # Match workload-builder's QEMU nemu timer restrictions. - if args.profile == "qemu-nemu": - removed.add("sstc") - isa = [ext for ext in isa if ext not in removed] - if "i" not in isa: - raise ValueError("the RV64 generator requires the i base extension") - if {"smaia", "ssaia"} & set(isa): - raise ValueError("these profiles describe CLINT + PLIC, not AIA") - if "v" not in isa and any(ext.startswith("zv") for ext in isa): - raise ValueError("use --no-vector to remove both v and its vector extensions") - if args.profile == "fpga-noaia-novec" and ( - "v" in isa or any(ext.startswith("zv") for ext in isa)): - raise ValueError("fpga-noaia-novec cannot advertise vector extensions") - - # Preserve the source template's legacy ISA string unless overridden. - if args.isa_extensions is None: - parts = isa_config["legacy_isa"].split("_") - base = parts[0][4:] # Do not remove the v in the rv64 prefix. - for ext in removed: - if len(ext) == 1: - base = base.replace(ext, "") - legacy_isa = "_".join(["rv64" + base] + [ext for ext in parts[1:] if ext not in removed]) - else: - legacy_isa = "rv64" + "".join(ext for ext in "imafdcbvh" if ext in isa) - legacy_isa += "".join("_" + ext for ext in isa if len(ext) > 1) - - nemu = args.profile == "nemu" - fpga = args.profile == "fpga-noaia-novec" - chosen = """linux,initrd-start = ; -linux,initrd-end = ;""" - if not nemu: - chosen += """ -stdout-path = "serial0:115200n8"; -opensbi-config { - compatible = "opensbi,config"; - cold-boot-harts = <&cpu0>; -};""" - cache_size, cache_sets, tlb_size = (16384, 64, 32) if nemu else (65536, 256, 48) - cpu_properties = 'status = "okay";\nclock-frequency = <0>;' - if fpga: - cpu_properties += f'\ntimebase-frequency = <{args.timebase_freq}>;' - cpu_properties += '\ntlb-split;' - for kind in ("i", "d"): - cpu_properties += f""" -{kind}-cache-block-size = <64>; -{kind}-cache-sets = <{cache_sets}>; -{kind}-cache-size = <{cache_size}>; -{kind}-tlb-sets = <1>; -{kind}-tlb-size = <{tlb_size}>;""" - root_nodes = [] - if not nemu: - cpu_properties += "\nnext-level-cache = <&l2_cache>;" - root_nodes += ['aliases { serial0 = &uart0; };', """l2_cache: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-block-size = <64>; - cache-size = <1048576>; -};"""] - else: - cpu_properties += "\nriscv,pmpregions = <16>;\nriscv,pmpgranularity = <4096>;" - - gen = DTSGen( - compatible="freechips,rocketchip-unknown-dev", - model={"fpga-noaia-novec": "xiangshan,Kunminghu-dev", - "qemu-nemu": "qemu,nemu", "nemu": "freechips,rocketchip-unknown"}[args.profile], - cpu_compatibles=["UCAS,COOSCA1.0" if nemu else "ICT,xiangshan", "riscv"], - isa_extensions=isa, - legacy_isa=legacy_isa, + if args.profile == "fpga-noaia-novec" and args.isa_extensions is not None: + has_vector = any(ext == "v" or ext.startswith("zv") + for ext in args.isa_extensions) + if has_vector and not args.no_vector: + raise ValueError("fpga-noaia-novec cannot advertise vector extensions") + vector_mode = "remove" if ( + args.no_vector or args.profile == "fpga-noaia-novec") else None + generator = load_generator() + return generator.render_profile( + args.profile, nr_harts=args.harts, - mmu_type=args.mmu_type or ("riscv,sv39" if nemu else "riscv,sv48"), + memory=args.memory_size, + isa_config_name=args.isa_config, + isa_extensions=args.isa_extensions, + exclude_isa=args.exclude_isa, + vector_mode=vector_mode, timebase_freq=args.timebase_freq, - memories=[(DRAM_BASE, size)], - reserved_memories=[], - uartlite_addr=0x40600000 if nemu else None, - plic_ndev=64 if nemu else 66, - plic_machine_first=not nemu, - cpu_properties=cpu_properties, - chosen_properties=chosen, - root_nodes=root_nodes, - cache_block_operations=["zicbom", "zicboz"] if fpga else None, - interrupts_in_soc=fpga, - soc_compatible=( - ["freechips,rocketchip-unknown-soc", "simple-bus"] - if fpga else "simple-bus"), - plic_node_name="interrupt-controller" if fpga else "plic", - interrupt_reg_names="control" if fpga else None, - bootargs=args.bootargs if args.bootargs is not None else ( - "console=hvc0 earlycon=sbi loglevel=8" if args.profile == "fpga-noaia-novec" - else "console=hvc0 earlycon=sbi"), + mmu_type=args.mmu_type, + bootargs=args.bootargs, ) - gen.add_reserved_memory(DRAM_BASE, 0x100000, name="gcpt") - if args.harts > 1: - gen.add_reserved_memory(CHECKPOINT_START, CHECKPOINT_SIZE, name="checkpoint") - if not nemu: - gen.add_device("""uart0: serial@310b0000 { - compatible = "ns16550a"; - reg = <0x0 0x310b0000 0x0 0x10000>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <50000000>; - current-speed = <115200>; - status = "okay"; -};""") - if args.profile != "qemu-nemu": - debug_addr = 0 if nemu else 0x38020000 - gen.add_device(f"""debug-controller@{debug_addr:x} {{ - compatible = "sifive,debug-013", "riscv,debug-013"; - reg = <0x0 0x{debug_addr:x} 0x0 0x1000>; - reg-names = "control"; - interrupts-extended = <&cpu0_intc 65535>; - {'debug-attach = "jtag";' if not nemu else ''} -}};""") - # workload-builder aaf4d8b validates this field textually with awk. - # Keep its exact spelling, even though the unpadded value is equivalent. - dts = gen.gen_dts().replace( - "reg = <0x0 0x80300000 0x0 0x8300000>;", - "reg = <0x0 0x80300000 0x0 0x08300000>;") - return "/* Generated by nemu_board for workload-builder. */\n" + dts + "\n" def main(): diff --git a/nemu_board/.gitignore b/nemu_board/.gitignore deleted file mode 100644 index cca2b2c..0000000 --- a/nemu_board/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -*.dtb -dts/build/ -/generated-*.dts.in -/nemu-board-workload-builder.patch diff --git a/scripts/dts-config.sh b/scripts/dts-config.sh index ba24668..f4f408d 100755 --- a/scripts/dts-config.sh +++ b/scripts/dts-config.sh @@ -1,15 +1,19 @@ #!/usr/bin/env bash -# Generate a recognized DTS basename into the build template directory. +# Generate a recognized DTS basename or refresh a custom template from its source. dts_generate_template() { local dts_dir="$1" local default_dtb="$2" local generator="$(dirname "${BASH_SOURCE[0]}")/../dts/generate-nemu-board-dts.py" + local custom_dir="$(dirname "${BASH_SOURCE[0]}")/../dts" local output="$dts_dir/$default_dtb.dts.in" - local isa_config="${DTS_ISA_CONFIG:-kunminghu-v3}" + local args=(--name "$default_dtb" --output "$output" + --custom-template-dir "$custom_dir") - python3 "$generator" --name "$default_dtb" --output "$output" \ - --isa-config "$isa_config" + if [[ "$default_dtb" == xiangshan-fpga-noAIA* ]]; then + args+=(--isa-config "${DTS_ISA_CONFIG:-kunminghu-v3}") + fi + python3 "$generator" "${args[@]}" } # Print the selected DTS address configuration as three shell words: diff --git a/workloads/linux/gapbs/rules.mk b/workloads/linux/gapbs/rules.mk index 554b3a1..708e875 100644 --- a/workloads/linux/gapbs/rules.mk +++ b/workloads/linux/gapbs/rules.mk @@ -20,7 +20,8 @@ GAPBS_SBI_BIN ?= $(if $(SBI_BIN),$(SBI_BIN),$(GAPBS_SBI_BUILD_DIR)/build/platfor GAPBS_BUILDROOT_CROSS_COMPILE ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/riscv64-linux- GAPBS_DTC ?= $(GAPBS_BUILDROOT_DIR)/output/host/bin/dtc GAPBS_DTS_SOURCES := $(GAPBS_REPO_ROOT)/dts/generate-nemu-board-dts.py $(GAPBS_REPO_ROOT)/dts/generate-workload-builder-dts.py \ - $(GAPBS_REPO_ROOT)/dts/DTSGen.py $(GAPBS_REPO_ROOT)/dts/workload-builder-profiles.json + $(GAPBS_REPO_ROOT)/dts/DTSGen.py $(GAPBS_REPO_ROOT)/dts/workload-builder-profiles.json \ + $(wildcard $(GAPBS_REPO_ROOT)/dts/$(GAPBS_DEFAULT_DTB).dts.in) GAPBS_FIRMWARE_VARS_HASH := $(shell printf '%s\n' 'default_dtb=$(GAPBS_DEFAULT_DTB)' 'dts_isa_config=$(DTS_ISA_CONFIG)' | sha256sum | cut -d ' ' -f 1) GAPBS_FIRMWARE_VARS_STAMP := $(GAPBS_BUILD_DIR)/firmware-vars.$(GAPBS_FIRMWARE_VARS_HASH).stamp GAPBS_ALL_CASES := $(shell python3 $(GAPBS_HELPER) --list-cases) diff --git a/workloads/linux/geekbench-common.mk b/workloads/linux/geekbench-common.mk index 70d02ca..01c0d42 100644 --- a/workloads/linux/geekbench-common.mk +++ b/workloads/linux/geekbench-common.mk @@ -29,7 +29,7 @@ build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp: rm -f "$$(@D)"/firmware-vars.*.stamp touch "$$@" -build/linux-workloads/$(1)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp +build/linux-workloads/$(1)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(wildcard dts/$(GEEKBENCH_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-sbi.sh scripts/dts-config.sh scripts/build-firmware-linux.sh build/linux-workloads/$(1)/rootfs.cpio $(LINUX_IMAGE) build/opensbi/build/platform/generic/firmware/fw_jump.bin build/linux-workloads/$(1)/firmware-vars.$(GEEKBENCH_FIRMWARE_VARS_HASH).stamp CROSS_COMPILE="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" \ DEFAULT_DTB="$(GEEKBENCH_DEFAULT_DTB)" \ diff --git a/workloads/linux/rocksdb/rules.mk b/workloads/linux/rocksdb/rules.mk index 7f2173f..2e57f80 100644 --- a/workloads/linux/rocksdb/rules.mk +++ b/workloads/linux/rocksdb/rules.mk @@ -34,7 +34,8 @@ ROCKSDB_DTC ?= $(ROCKSDB_BUILDROOT_DIR)/output/host/bin/dtc ROCKSDB_COMMON_STAMP := $(ROCKSDB_BUILD_DIR)/common.stamp ROCKSDB_PACKAGE_HELPER := $(ROCKSDB_WORKLOAD_DIR)/package-case.sh ROCKSDB_DTS_SOURCES := $(ROCKSDB_REPO_ROOT)/dts/generate-nemu-board-dts.py $(ROCKSDB_REPO_ROOT)/dts/generate-workload-builder-dts.py \ - $(ROCKSDB_REPO_ROOT)/dts/DTSGen.py $(ROCKSDB_REPO_ROOT)/dts/workload-builder-profiles.json + $(ROCKSDB_REPO_ROOT)/dts/DTSGen.py $(ROCKSDB_REPO_ROOT)/dts/workload-builder-profiles.json \ + $(wildcard $(ROCKSDB_REPO_ROOT)/dts/$(ROCKSDB_DEFAULT_DTB).dts.in) ROCKSDB_NON_COMMON_INPUTS := $(ROCKSDB_WORKLOAD_DIR)/README.md $(ROCKSDB_WORKLOAD_DIR)/links.txt $(ROCKSDB_WORKLOAD_DIR)/rules.mk $(ROCKSDB_PACKAGE_HELPER) ROCKSDB_COMMON_INPUTS := $(filter-out $(ROCKSDB_NON_COMMON_INPUTS),$(shell find $(ROCKSDB_WORKLOAD_DIR) -type f 2>/dev/null)) ROCKSDB_CASE_FIRMWARE := $(foreach case,$(ROCKSDB_CASES),$(ROCKSDB_BUILD_DIR)/$(case)/fw_payload.bin) diff --git a/workloads/linux/spec2006/rules.mk b/workloads/linux/spec2006/rules.mk index 3d10c1b..ff5ce69 100644 --- a/workloads/linux/spec2006/rules.mk +++ b/workloads/linux/spec2006/rules.mk @@ -58,7 +58,8 @@ SPEC2006_SELECTED_CASES := $(shell python3 $(SPEC2006_HELPER) --cases-config $(S SPEC2006_IMAGE_CASES := $(if $(BENCH),$(SPEC2006_CASE),$(SPEC2006_SELECTED_CASES)) SPEC2006_ELF_TARGETS := $(foreach case,$(SPEC2006_SELECTED_CASES),$(SPEC2006_BUILD_DIR)/$(case)/elf/$(case).elf) SPEC2006_DTS_SOURCES := $(SPEC2006_REPO_ROOT)/dts/generate-nemu-board-dts.py $(SPEC2006_REPO_ROOT)/dts/generate-workload-builder-dts.py \ - $(SPEC2006_REPO_ROOT)/dts/DTSGen.py $(SPEC2006_REPO_ROOT)/dts/workload-builder-profiles.json + $(SPEC2006_REPO_ROOT)/dts/DTSGen.py $(SPEC2006_REPO_ROOT)/dts/workload-builder-profiles.json \ + $(wildcard $(SPEC2006_REPO_ROOT)/dts/$(SPEC2006_DEFAULT_DTB).dts.in) SPEC2006_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2006_CFG))" ]; then sha256sum "$(abspath $(SPEC2006_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) SPEC2006_DEFAULT_DTB_STAMP := $(SPEC2006_BUILD_DIR)/dtb.$(shell printf '%s\n' "$(SPEC2006_DEFAULT_DTB)" "$(DTS_ISA_CONFIG)" | sha256sum | cut -d ' ' -f 1) SPEC2006_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2006_INPUT)' '$(SPEC2006_TUNE)' '$(SPEC2006_JOBS)' '$(SPEC2006_CROSS_COMPILE)' 'multihart=$(SPEC2006_MULTIHART)' 'harts=$(SPEC2006_HARTS)' | sha256sum | cut -d ' ' -f 1) diff --git a/workloads/linux/spec2017/rules.mk b/workloads/linux/spec2017/rules.mk index 30bc3a1..8c54aff 100644 --- a/workloads/linux/spec2017/rules.mk +++ b/workloads/linux/spec2017/rules.mk @@ -81,7 +81,8 @@ SPEC2017_ALL_CASES := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases SPEC2017_SELECTED_CASES := $(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set $(SPEC2017_INPUT) --mode $(SPEC2017_MODE) 2>/dev/null) SPEC2017_IMAGE_CASES := $(if $(BENCH),$(SPEC2017_CASE),$(shell $(SPEC2017_PYTHON) $(SPEC2017_HELPER) --list-cases --input-set $(SPEC2017_IMAGE_INPUT) --mode $(SPEC2017_IMAGE_MODE) 2>/dev/null)) SPEC2017_DTS_SOURCES := $(SPEC2017_REPO_ROOT)/dts/generate-nemu-board-dts.py $(SPEC2017_REPO_ROOT)/dts/generate-workload-builder-dts.py \ - $(SPEC2017_REPO_ROOT)/dts/DTSGen.py $(SPEC2017_REPO_ROOT)/dts/workload-builder-profiles.json + $(SPEC2017_REPO_ROOT)/dts/DTSGen.py $(SPEC2017_REPO_ROOT)/dts/workload-builder-profiles.json \ + $(wildcard $(SPEC2017_REPO_ROOT)/dts/$(SPEC2017_DEFAULT_DTB).dts.in) WORKLOAD_DIRS += $(SPEC2017_BUILD_DIR) diff --git a/workloads/linux/spec2026/rules.mk b/workloads/linux/spec2026/rules.mk index ae7d09a..5f60d85 100644 --- a/workloads/linux/spec2026/rules.mk +++ b/workloads/linux/spec2026/rules.mk @@ -47,7 +47,8 @@ SPEC2026_ALL_CASES := $(shell python3 $(SPEC2026_HELPER) --list-cases --mode all SPEC2026_SELECTED_CASES := $(shell python3 $(SPEC2026_HELPER) --list-cases --input-set $(SPEC2026_INPUT) --mode $(SPEC2026_MODE) 2>/dev/null) SPEC2026_IMAGE_CASES := $(if $(BENCH),$(BENCH),$(shell python3 $(SPEC2026_HELPER) --list-cases --input-set $(SPEC2026_IMAGE_INPUT) --mode $(SPEC2026_IMAGE_MODE) 2>/dev/null)) SPEC2026_DTS_SOURCES := $(SPEC2026_REPO_ROOT)/dts/generate-nemu-board-dts.py $(SPEC2026_REPO_ROOT)/dts/generate-workload-builder-dts.py \ - $(SPEC2026_REPO_ROOT)/dts/DTSGen.py $(SPEC2026_REPO_ROOT)/dts/workload-builder-profiles.json + $(SPEC2026_REPO_ROOT)/dts/DTSGen.py $(SPEC2026_REPO_ROOT)/dts/workload-builder-profiles.json \ + $(wildcard $(SPEC2026_REPO_ROOT)/dts/$(SPEC2026_DEFAULT_DTB).dts.in) SPEC2026_CFG_HASH := $(shell if [ -f "$(abspath $(SPEC2026_CFG))" ]; then sha256sum "$(abspath $(SPEC2026_CFG))" | cut -d ' ' -f 1; else printf 'missing'; fi) SPEC2026_BUILD_VARS_HASH := $(shell printf '%s\n' '$(SPEC2026_INPUT)' '$(SPEC2026_TUNE)' '$(SPEC2026_JOBS)' '$(SPEC2026_CROSS_COMPILE)' '$(SPEC2026_COMPILER_ROOT)' 'jemalloc_root=$(SPEC2026_JEMALLOC_ROOT)' 'jemalloc_repo=$(SPEC2026_JEMALLOC_REPO)' 'jemalloc_commit=$(SPEC2026_JEMALLOC_COMMIT)' 'jemalloc_host=$(SPEC2026_JEMALLOC_CONFIGURE_HOST)' | sha256sum | cut -d ' ' -f 1) diff --git a/workloads/linux/specjbb2015/rules.mk b/workloads/linux/specjbb2015/rules.mk index 14d50c5..70be4c8 100644 --- a/workloads/linux/specjbb2015/rules.mk +++ b/workloads/linux/specjbb2015/rules.mk @@ -41,7 +41,7 @@ $(SPECJBB2015_BUILD_DIR)/rootfs.cpio: $(shell find $(SPECJBB2015_DIR)) $(TOOLCHA HARTS="$(SPECJBB2015_HARTS)" MULTIHART=0 \ bash scripts/build-workload-linux.sh workloads/linux/specjbb2015 $(SPECJBB2015_BUILD_DIR) -$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) +$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) @CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" DEFAULT_DTB="$(SPECJBB2015_DEFAULT_DTB)" \ MULTIHART="$(SPECJBB2015_MULTIHART)" HARTS="$(SPECJBB2015_HARTS)" \ From dccae237e4c87e8c26aea2dc37de86a2da03fc2a Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Mon, 14 Sep 2026 11:06:10 +0800 Subject: [PATCH 09/13] fix(dts): remove source in json file --- dts/workload-builder-profiles.json | 3 --- 1 file changed, 3 deletions(-) diff --git a/dts/workload-builder-profiles.json b/dts/workload-builder-profiles.json index ba39e15..2ab78b7 100644 --- a/dts/workload-builder-profiles.json +++ b/dts/workload-builder-profiles.json @@ -1,6 +1,5 @@ { "fpga-noaia-novec": { - "source": "https://github.com/OpenXiangShan/workload-builder/blob/aaf4d8bd7d2da5351fc2640c8d61c9d849d69342/dts/xiangshan-fpga-noAIA-novec.dts.in", "memory_size": 2147483648, "isa_extensions": [ "i", @@ -116,7 +115,6 @@ } }, "qemu-nemu": { - "source": "https://github.com/OpenXiangShan/workload-builder/blob/aaf4d8bd7d2da5351fc2640c8d61c9d849d69342/dts/xiangshan-qemu-nemu-mem2g.dts.in", "memory_size": 2147483648, "isa_extensions": [ "i", @@ -209,7 +207,6 @@ "legacy_isa": "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade" }, "nemu": { - "source": "https://github.com/OpenXiangShan/workload-builder/blob/aaf4d8bd7d2da5351fc2640c8d61c9d849d69342/dts/xiangshan.dts.in", "memory_size": 134217728, "isa_extensions": [ "i", From 24a14586ef3816258e14354a11cf0a44bd8bf0cb Mon Sep 17 00:00:00 2001 From: rezado <1908819406@qq.com> Date: Mon, 14 Sep 2026 11:54:55 +0800 Subject: [PATCH 10/13] feat(dts): support Kunminghu V2 for qemu-nemu --- README.md | 10 +- dts/README.md | 7 +- dts/generate-nemu-board-dts.py | 11 +- dts/generate-workload-builder-dts.py | 2 +- dts/workload-builder-profiles.json | 216 ++------------------------- scripts/dts-config.sh | 3 +- 6 files changed, 30 insertions(+), 219 deletions(-) diff --git a/README.md b/README.md index ca3070c..ceb4662 100644 --- a/README.md +++ b/README.md @@ -294,10 +294,12 @@ writes the resulting template to `build/generated-dts` before compiling it. To add a custom device tree, place `dts/device_name.dts.in` in the repository and select it with the same `DEFAULT_DTB=device_name` interface. -For generated `xiangshan-fpga-noAIA*` templates, the default ISA declaration is -Kunminghu V3. Select V2 with `DTS_ISA_CONFIG=kunminghu-v2`; the DTB basename -continues to select hart count, memory size, and vector mode. See the DTS -README for generator options, validation, provenance, and contributors. +For generated `xiangshan-fpga-noAIA*` and `xiangshan-qemu-nemu*` templates, the +default ISA declaration is Kunminghu V3. Select V2 with +`DTS_ISA_CONFIG=kunminghu-v2`; for QEMU `nemu`, this uses the intersection of +the QEMU and Kunminghu V2 ISA declarations. The DTB basename continues to +select hart count, memory size, and vector mode. See the DTS README for +generator options, validation, provenance, and contributors. Currently, the memory location of the initramfs containing the workload is passed to the kernel by device tree. So for each workload, device tree files are generated from the template on the fly, because the size of the initramfs cannot be known in advance. You should use the parameters `INITRAMFS_BEGIN` and `INITRAMFS_END` in the device tree template. diff --git a/dts/README.md b/dts/README.md index e57c8a3..1114497 100644 --- a/dts/README.md +++ b/dts/README.md @@ -41,8 +41,8 @@ profiles, FPGA noAIA names, and QEMU `nemu` names of the form custom template passed through `--custom-template-dir`; otherwise generation fails with an `unsupported DTS basename` error. -For generated FPGA noAIA names, select the ISA declaration independently of -the basename: +For generated FPGA noAIA and QEMU `nemu` names, select the ISA declaration +independently of the basename: ```sh make linux/coremark \ @@ -51,7 +51,8 @@ make linux/coremark \ ``` `DTS_ISA_CONFIG` accepts `kunminghu-v2` and `kunminghu-v3`, with V3 as the -default. The `-novec` suffix still controls vector advertisement. +default. For QEMU `nemu`, V2 uses the intersection of the QEMU and Kunminghu +V2 ISA declarations. The `-novec` suffix still controls vector advertisement. ## Direct DTSGen CLI diff --git a/dts/generate-nemu-board-dts.py b/dts/generate-nemu-board-dts.py index 8cd8ca1..10123a4 100644 --- a/dts/generate-nemu-board-dts.py +++ b/dts/generate-nemu-board-dts.py @@ -187,8 +187,8 @@ def render_profile(profile_name, *, nr_harts=1, memory=None, profiles = json.loads(PROFILE_FILE.read_text()) profile = profiles[profile_name] if isa_config_name is not None: - if profile_name != "fpga-noaia-novec": - raise ValueError("--isa-config is supported by the FPGA noAIA profile only") + if profile_name not in {"fpga-noaia-novec", "qemu-nemu"}: + raise ValueError("--isa-config is supported by the FPGA noAIA and qemu-nemu profiles only") isa_config = (profile if isa_config_name == "kunminghu-v3" else profile["isa_configs"][isa_config_name]) else: @@ -310,8 +310,9 @@ def render(name, isa_config_name=None): is_novec = name.endswith("-novec") if (isa_config_name not in (None, "kunminghu-v3") - and not name.startswith("xiangshan-fpga-noAIA")): - raise ValueError("--isa-config is supported by the FPGA noAIA profile only") + and not (name.startswith("xiangshan-fpga-noAIA") + or name.startswith("xiangshan-qemu-nemu"))): + raise ValueError("--isa-config is supported by the FPGA noAIA and qemu-nemu profiles only") if name.startswith("xiangshan-fpga-noAIA"): return render_profile( @@ -321,7 +322,7 @@ def render(name, isa_config_name=None): elif name.startswith("xiangshan-qemu-nemu"): return render_profile( "qemu-nemu", nr_harts=nr_harts, memory=memory, - isa_config_name=None, + isa_config_name=isa_config_name, vector_mode="remove" if is_novec else None) elif name == "xiangshan": gen = DTSGen(compatible="freechips,rocketchip-unknown-dev", diff --git a/dts/generate-workload-builder-dts.py b/dts/generate-workload-builder-dts.py index 9d9646b..26ca521 100644 --- a/dts/generate-workload-builder-dts.py +++ b/dts/generate-workload-builder-dts.py @@ -61,7 +61,7 @@ def main(): parser.add_argument("--mmu-type", choices=["riscv,sv39", "riscv,sv48", "riscv,sv57"]) parser.add_argument("--bootargs") parser.add_argument("--isa-config", choices=["kunminghu-v3", "kunminghu-v2"], - help="Named FPGA ISA declaration (default: kunminghu-v3)") + help="Named FPGA or QEMU ISA declaration (default: kunminghu-v3)") parser.add_argument("--isa-extensions", nargs="+", help="Replace the profile's ISA list") parser.add_argument("--exclude-isa", nargs="+", default=[], help="Remove exact extension names") parser.add_argument("--no-vector", action="store_true", help="Remove v and all zv* declarations") diff --git a/dts/workload-builder-profiles.json b/dts/workload-builder-profiles.json index 2ab78b7..1dcaaf0 100644 --- a/dts/workload-builder-profiles.json +++ b/dts/workload-builder-profiles.json @@ -1,223 +1,29 @@ { "fpga-noaia-novec": { "memory_size": 2147483648, - "isa_extensions": [ - "i", - "m", - "a", - "f", - "d", - "c", - "b", - "h", - "sdext", - "sdtrig", - "sha", - "shcounterenw", - "shgatpa", - "shlcofideleg", - "shtvala", - "shvsatpa", - "shvstvala", - "shvstvecd", - "smcdeleg", - "smcntrpmf", - "smcsrind", - "smdbltrp", - "smmpm", - "smnpm", - "smstateen", - "ss1p13", - "ssccfg", - "ssccptr", - "sscofpmf", - "sscounterenw", - "sscsrind", - "ssdbltrp", - "ssnpm", - "sspm", - "ssstateen", - "ssstrict", - "sstc", - "sstvala", - "sstvecd", - "ssu64xl", - "supm", - "sv39", - "sv48", - "svade", - "svbare", - "svinval", - "svnapot", - "svpbmt", - "za64rs", - "zacas", - "zama16b", - "zawrs", - "zba", - "zbb", - "zbc", - "zbkb", - "zbkc", - "zbkx", - "zbs", - "zcb", - "zcmop", - "zfa", - "zfh", - "zfhmin", - "zic64b", - "zicbom", - "zicbop", - "zicboz", - "ziccamoa", - "ziccamoc", - "ziccif", - "zicclsm", - "ziccrse", - "zicntr", - "zicond", - "zicsr", - "zifencei", - "zihintntl", - "zihintpause", - "zihpm", - "zimop", - "zkn", - "zknd", - "zkne", - "zknh", - "zksed", - "zksh", - "zkt" - ], + "isa_extensions": ["i", "m", "a", "f", "d", "c", "b", "h", "sdext", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcdeleg", "smcntrpmf", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccfg", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstc", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zama16b", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccamoa", "ziccamoc", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"], "legacy_isa": "rv64imafdch_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade", "isa_configs": { "kunminghu-v2": { - "isa_extensions": [ - "i", "m", "a", "f", "d", "c", "h", - "sdtrig", "sha", "shcounterenw", "shgatpa", - "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", - "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", - "smstateen", "ss1p13", "ssccptr", "sscofpmf", - "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", - "ssstateen", "ssstrict", "sstc", "sstvala", "sstvecd", - "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", - "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", - "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", - "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", - "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", - "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt" - ], + "isa_extensions": ["i", "m", "a", "f", "d", "c", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstc", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"], "legacy_isa": "rv64imafdcvh_smstateen_sscofpmf_sstc_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade" } } }, "qemu-nemu": { "memory_size": 2147483648, - "isa_extensions": [ - "i", - "m", - "a", - "f", - "d", - "c", - "v", - "h", - "sdtrig", - "sha", - "shcounterenw", - "shgatpa", - "shlcofideleg", - "shtvala", - "shvsatpa", - "shvstvala", - "shvstvecd", - "smcsrind", - "smdbltrp", - "smmpm", - "smnpm", - "smstateen", - "ss1p13", - "ssccptr", - "sscofpmf", - "sscounterenw", - "sscsrind", - "ssdbltrp", - "ssnpm", - "sspm", - "ssstateen", - "ssstrict", - "sstvala", - "sstvecd", - "ssu64xl", - "supm", - "sv39", - "sv48", - "svade", - "svbare", - "svinval", - "svnapot", - "svpbmt", - "za64rs", - "zacas", - "zawrs", - "zba", - "zbb", - "zbc", - "zbkb", - "zbkc", - "zbkx", - "zbs", - "zca", - "zcb", - "zcmop", - "zfa", - "zfh", - "zfhmin", - "zic64b", - "ziccamoa", - "ziccif", - "zicclsm", - "ziccrse", - "zicntr", - "zicond", - "zicsr", - "zifencei", - "zihintntl", - "zihintpause", - "zihpm", - "zimop", - "zkn", - "zknd", - "zkne", - "zknh", - "zksed", - "zksh", - "zkt", - "zvbb", - "zvfh", - "zvfhmin", - "zvkt", - "zvl128b", - "zvl32b", - "zvl64b" - ], - "legacy_isa": "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade" + "isa_extensions": ["i", "m", "a", "f", "d", "c", "v", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt", "zvbb", "zvfh", "zvfhmin", "zvkt", "zvl128b", "zvl32b", "zvl64b"], + "legacy_isa": "rv64imafdcvh_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade", + "isa_configs": { + "kunminghu-v2": { + "isa_extensions": ["i", "m", "a", "f", "d", "c", "h", "sdtrig", "sha", "shcounterenw", "shgatpa", "shlcofideleg", "shtvala", "shvsatpa", "shvstvala", "shvstvecd", "smcsrind", "smdbltrp", "smmpm", "smnpm", "smstateen", "ss1p13", "ssccptr", "sscofpmf", "sscounterenw", "sscsrind", "ssdbltrp", "ssnpm", "sspm", "ssstateen", "ssstrict", "sstvala", "sstvecd", "ssu64xl", "supm", "sv39", "sv48", "svade", "svbare", "svinval", "svnapot", "svpbmt", "za64rs", "zacas", "zawrs", "zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx", "zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin", "zic64b", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkn", "zknd", "zkne", "zknh", "zksed", "zksh", "zkt"], + "legacy_isa": "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade" + } + } }, "nemu": { "memory_size": 134217728, - "isa_extensions": [ - "i", - "m", - "a", - "f", - "d", - "c", - "h", - "v" - ], + "isa_extensions": ["i", "m", "a", "f", "d", "c", "h", "v"], "legacy_isa": "rv64imafdchv" } } diff --git a/scripts/dts-config.sh b/scripts/dts-config.sh index f4f408d..6ad67cc 100755 --- a/scripts/dts-config.sh +++ b/scripts/dts-config.sh @@ -10,7 +10,8 @@ dts_generate_template() { local args=(--name "$default_dtb" --output "$output" --custom-template-dir "$custom_dir") - if [[ "$default_dtb" == xiangshan-fpga-noAIA* ]]; then + if [[ "$default_dtb" == xiangshan-fpga-noAIA* || + "$default_dtb" == xiangshan-qemu-nemu* ]]; then args+=(--isa-config "${DTS_ISA_CONFIG:-kunminghu-v3}") fi python3 "$generator" "${args[@]}" From f8e6d25d682d8a6bfcc966660af4a75e73f9db0a Mon Sep 17 00:00:00 2001 From: Jiabin Wu <66947239+rezado@users.noreply.github.com> Date: Tue, 15 Sep 2026 14:39:07 +0800 Subject: [PATCH 11/13] Add debug controller condition for multiple harts Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com> --- dts/generate-nemu-board-dts.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/dts/generate-nemu-board-dts.py b/dts/generate-nemu-board-dts.py index 10123a4..5f93fd1 100644 --- a/dts/generate-nemu-board-dts.py +++ b/dts/generate-nemu-board-dts.py @@ -296,6 +296,8 @@ def render_profile(profile_name, *, nr_harts=1, memory=None, gen.add_device(debug_controller(nr_harts)) gen.add_device(serial16550()) else: + if nr_harts > 1: + gen.add_device(debug_controller(nr_harts)) gen.add_device(serial16550()) output = gen.gen_dts() From 95baca02a8dda0aee6f9fed1492d75ef107778f4 Mon Sep 17 00:00:00 2001 From: Jiabin Wu <66947239+rezado@users.noreply.github.com> Date: Tue, 15 Sep 2026 14:44:03 +0800 Subject: [PATCH 12/13] Update build dependencies for fw_payload.bin Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com> --- workloads/linux/specjbb2015/rules.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workloads/linux/specjbb2015/rules.mk b/workloads/linux/specjbb2015/rules.mk index 70be4c8..809f0bc 100644 --- a/workloads/linux/specjbb2015/rules.mk +++ b/workloads/linux/specjbb2015/rules.mk @@ -41,7 +41,7 @@ $(SPECJBB2015_BUILD_DIR)/rootfs.cpio: $(shell find $(SPECJBB2015_DIR)) $(TOOLCHA HARTS="$(SPECJBB2015_HARTS)" MULTIHART=0 \ bash scripts/build-workload-linux.sh workloads/linux/specjbb2015 $(SPECJBB2015_BUILD_DIR) -$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) +$(SPECJBB2015_BUILD_DIR)/fw_payload.bin: dts/generate-nemu-board-dts.py dts/generate-workload-builder-dts.py dts/DTSGen.py dts/workload-builder-profiles.json $(wildcard dts/$(SPECJBB2015_DEFAULT_DTB).dts.in) $(GCPT_BIN) scripts/build-firmware-linux.sh scripts/dts-config.sh $(SPECJBB2015_ROOTFS_STAMP) $(SPECJBB2015_FIRMWARE_STAMP) $(SPECJBB2015_BUILD_DIR)/rootfs.cpio $(LINUX_IMAGE) $(SBI_BIN) @CROSS_COMPILE="$(abspath $(BUILDROOT_DIR)/output/host/bin)/riscv64-linux-" \ DTC="$(abspath $(BUILDROOT_DIR)/output/host/bin)/dtc" DEFAULT_DTB="$(SPECJBB2015_DEFAULT_DTB)" \ MULTIHART="$(SPECJBB2015_MULTIHART)" HARTS="$(SPECJBB2015_HARTS)" \ From 96e8fc699ef8496fb06f5e262d20addea994e133 Mon Sep 17 00:00:00 2001 From: Jiabin Wu <66947239+rezado@users.noreply.github.com> Date: Tue, 15 Sep 2026 14:44:20 +0800 Subject: [PATCH 13/13] Simplify profile data explanation in README Removed unnecessary details about source URLs and streamlined the explanation of profile data storage. Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com> --- dts/README.md | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/dts/README.md b/dts/README.md index 1114497..a475243 100644 --- a/dts/README.md +++ b/dts/README.md @@ -65,9 +65,8 @@ python3 dts/DTSGen.py --nr-harts 2 --memory-size 0x400000000 \ ## Profiles And Validation -Profile data is stored in `workload-builder-profiles.json`. The `source` URLs -in that file document the historical workload-builder templates from which -the declarations were derived; generation itself is offline. +Profile data is stored in `workload-builder-profiles.json`; generation itself is +offline. The build invokes the generator and then uses `dtc` to compile the generated template. This validates DTS generation, DTB compilation, and image assembly;