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- Reviewed couple of online resources related to RISC-V design.
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**Discussion:** I understand most of the material in the papers and the RTL code in `nyu-core` but don't fully understand the C++ portion.
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## Week4: 02/09/26 - 02/15/26
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- Completed lab 5.
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- Had meeting with the leadership team.
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[ProcDesign Project repository](https://github.com/Ghqlq/ProcDesign) - New folder: lab-5
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**Discussion:** In lab 5 there isn't much to do so as an exercise for myself I created a simple working rtl design along with a C++ tb using Verilator.
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