@@ -749,8 +749,8 @@ class AC101Source : public I2SSource {
749749 #endif
750750 char send_buff[3 ];
751751 send_buff[0 ] = reg_addr;
752- send_buff[1 ] = ( val >> 8 ) & 0xff ;
753- send_buff[2 ] = val & 0xff ;
752+ send_buff[1 ] = uint8_t (( val >> 8 ) & 0xff ) ;
753+ send_buff[2 ] = uint8_t ( val & 0xff ) ;
754754 Wire.beginTransmission (AC101_ADDR);
755755 Wire.write ((const uint8_t *)send_buff, 3 );
756756 uint8_t i2cErr = Wire.endTransmission (); // i2cErr == 0 means OK
@@ -765,112 +765,39 @@ class AC101Source : public I2SSource {
765765 _ac101I2cBegin ();
766766
767767 #define CHIP_AUDIO_RS 0x00
768- #define PLL_CTRL1 0x01
769- #define PLL_CTRL2 0x02
770768 #define SYSCLK_CTRL 0x03
771769 #define MOD_CLK_ENA 0x04
772770 #define MOD_RST_CTRL 0x05
773771 #define I2S_SR_CTRL 0x06
774772 #define I2S1LCK_CTRL 0x10
775773 #define I2S1_SDOUT_CTRL 0x11
776- #define I2S1_SDIN_CTRL 0x12
777774 #define I2S1_MXR_SRC 0x13
778- #define I2S1_VOL_CTRL1 0x14
779- #define I2S1_VOL_CTRL2 0x15
780- #define I2S1_VOL_CTRL3 0x16
781- #define I2S1_VOL_CTRL4 0x17
782- #define I2S1_MXR_GAIN 0x18
783775 #define ADC_DIG_CTRL 0x40
784- #define ADC_VOL_CTRL 0x41
785- #define HMIC_CTRL1 0x44
786- #define HMIC_CTRL2 0x45
787- #define HMIC_STATUS 0x46
788- #define DAC_DIG_CTRL 0x48
789- #define DAC_VOL_CTRL 0x49
790- #define DAC_MXR_SRC 0x4c
791- #define DAC_MXR_GAIN 0x4d
792776 #define ADC_APC_CTRL 0x50
793777 #define ADC_SRC 0x51
794778 #define ADC_SRCBST_CTRL 0x52
795779 #define OMIXER_DACA_CTRL 0x53
796780 #define OMIXER_SR 0x54
797- #define OMIXER_BST1_CTRL 0x55
798781 #define HPOUT_CTRL 0x56
799- #define SPKOUT_CTRL 0x58
800- #define AC_DAC_DAPCTRL 0xa0
801- #define AC_DAC_DAPHHPFC 0xa1
802- #define AC_DAC_DAPLHPFC 0xa2
803- #define AC_DAC_DAPLHAVC 0xa3
804- #define AC_DAC_DAPLLAVC 0xa4
805- #define AC_DAC_DAPRHAVC 0xa5
806- #define AC_DAC_DAPRLAVC 0xa6
807- #define AC_DAC_DAPHGDEC 0xa7
808- #define AC_DAC_DAPLGDEC 0xa8
809- #define AC_DAC_DAPHGATC 0xa9
810- #define AC_DAC_DAPLGATC 0xaa
811- #define AC_DAC_DAPHETHD 0xab
812- #define AC_DAC_DAPLETHD 0xac
813- #define AC_DAC_DAPHGKPA 0xad
814- #define AC_DAC_DAPLGKPA 0xae
815- #define AC_DAC_DAPHGOPA 0xaf
816- #define AC_DAC_DAPLGOPA 0xb0
817- #define AC_DAC_DAPOPT 0xb1
818- #define DAC_DAP_ENA 0xb5
819-
820- _ac101I2cWrite (CHIP_AUDIO_RS, 0x123 ); // Reset (any value written does a reset)
821- vTaskDelay (1000 / portTICK_PERIOD_MS);
822- _ac101I2cWrite (SPKOUT_CTRL, 0xe880 );
823-
824- // Enable the PLL from 256*44.1KHz MCLK source
825- _ac101I2cWrite (PLL_CTRL1, 0x014f );
826- // res |= ac101_write_reg(PLL_CTRL2, 0x83c0);
827- _ac101I2cWrite (PLL_CTRL2, 0x8600 );
828-
829- // Clocking system
830- _ac101I2cWrite (SYSCLK_CTRL, 0x8b08 );
831- _ac101I2cWrite (MOD_CLK_ENA, 0x800c );
832- _ac101I2cWrite (MOD_RST_CTRL, 0x800c );
833- _ac101I2cWrite (I2S_SR_CTRL, 0b0111000000000000 ); // sample rate 22050 Hz
834- // AIF config
835- _ac101I2cWrite (I2S1LCK_CTRL, 0x8850 ); // BCLK/LRCK
836- _ac101I2cWrite (I2S1_SDOUT_CTRL, 0xc000 ); //
837- _ac101I2cWrite (I2S1_SDIN_CTRL, 0xc000 );
838- _ac101I2cWrite (I2S1_MXR_SRC, 0x2200 ); //
839-
840- _ac101I2cWrite (ADC_SRCBST_CTRL, 0xccc4 );
841- _ac101I2cWrite (ADC_SRC, 0x2020 );
842- _ac101I2cWrite (ADC_DIG_CTRL, 0x8000 );
843- _ac101I2cWrite (ADC_APC_CTRL, 0xbbc3 );
844-
845- // Path Configuration
846- _ac101I2cWrite (DAC_MXR_SRC, 0xcc00 );
847- _ac101I2cWrite (DAC_DIG_CTRL, 0x8000 );
848- _ac101I2cWrite (OMIXER_SR, 0x0081 );
849- _ac101I2cWrite (OMIXER_DACA_CTRL, 0xf080 ); // }
850-
851- // * Enable Speaker output
852- // _ac101I2cWrite(0x58, 0xeabd);
853-
854- _ac101I2cWrite (ADC_SRC, 0b0000010000001000 ); // Line-in to ADC
855- _ac101I2cWrite (ADC_DIG_CTRL, 0x8000 );
856- _ac101I2cWrite (ADC_APC_CTRL, 0x3bc0 );
857- // I2S1_SDOUT_CTRL
858- // res |= _ac101I2cWrite(PLL_CTRL2, 0x8120);
859- _ac101I2cWrite (MOD_CLK_ENA, 0x800c );
860- _ac101I2cWrite (MOD_RST_CTRL, 0x800c );
861- // res |= _ac101I2cWrite(0x06, 0x3000);
862- // * Enable Headphoe output
863- _ac101I2cWrite (OMIXER_DACA_CTRL, 0xff80 );
864- _ac101I2cWrite (HPOUT_CTRL, 0xc3c1 );
865- _ac101I2cWrite (HPOUT_CTRL, 0xcb00 );
866- vTaskDelay (100 / portTICK_PERIOD_MS);
867- _ac101I2cWrite (HPOUT_CTRL, 0xfbc0 );
868-
869- _ac101I2cWrite (OMIXER_SR, 0b0000010000001000 ); // default all 0
870-
871- // * Enable Speaker output
872- _ac101I2cWrite (SPKOUT_CTRL, 0xeabd );
873782
783+ _ac101I2cWrite (CHIP_AUDIO_RS, 0x123 ); // I think anything written here is a reset as 0x123 is kinda suss.
784+
785+ delay (100 );
786+
787+ _ac101I2cWrite (SYSCLK_CTRL, 0b0000100000001000 ); // System Clock is I2S MCLK
788+ _ac101I2cWrite (MOD_CLK_ENA, 0b1000000000001000 ); // I2S and ADC Clock Enable
789+ _ac101I2cWrite (MOD_RST_CTRL, 0b1000000000001000 ); // I2S and ADC Clock Enable
790+ _ac101I2cWrite (I2S_SR_CTRL, 0b0100000000000000 ); // set to 22050hz just in case
791+ _ac101I2cWrite (I2S1LCK_CTRL, 0b1000000000110000 ); // set I2S slave mode, 24-bit word size
792+ _ac101I2cWrite (I2S1_SDOUT_CTRL, 0b1100000000000000 ); // I2S enable Left/Right channels
793+ _ac101I2cWrite (I2S1_MXR_SRC, 0b0010001000000000 ); // I2S digital Mixer, ADC L/R data
794+ _ac101I2cWrite (ADC_SRCBST_CTRL, 0b0000000000000100 ); // mute all boosts. last 3 bits are reserved/default
795+ _ac101I2cWrite (OMIXER_SR, 0b0000010000001000 ); // Line L/R to output mixer
796+ _ac101I2cWrite (ADC_SRC, 0b0000010000001000 ); // Line L/R to ADC
797+ _ac101I2cWrite (ADC_DIG_CTRL, 0b1000000000000000 ); // Enable ADC
798+ _ac101I2cWrite (ADC_APC_CTRL, 0b1011100100000000 ); // ADC L/R enabled, 0dB gain
799+ _ac101I2cWrite (OMIXER_DACA_CTRL, 0b0011111110000000 ); // L/R Analog Output Mixer enabled, headphone DC offset default
800+ _ac101I2cWrite (HPOUT_CTRL, 0b1111101111110001 ); // Headphone out from Analog Mixer stage, no reduction in volume
874801
875802 }
876803
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